cd00091951

AN2317
Application Note
STPM01 Programmable, Single-Phase
Energy Metering IC External Circuits
Introduction
The STPM01 is implemented in an advanced 0.35µm BCD6 technology. It is designed for
active, reactive, and apparent energy measurement, including Root Mean Square (V RMS
and I RMS), instantaneous, and harmonic voltage and current.
This application note describes the STPM01 external circuits which are comprised of:
Note:
April 2006
●
a crystal oscillator,
●
a power supply circuit,
●
a voltage sensing circuit, and
●
two current sensing circuits.
This document should be used in conjunction with the STPM01 datasheet.
Rev 1
1/27
www.st.com
Contents
AN2317 - Application
Contents
1
External Circuit Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1
2/27
1.1.1
Primary Current Sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.1.2
Secondary current sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.2
Anti-aliasing Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.3
Voltage Sensing Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
1.4
Crosstalk Cancellation Network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
1.5
Capacitive Power Supply Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
1.6
2
Current Sensing Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.5.1
Varistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
1.5.2
Capacitive Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
1.5.3
EMC Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Clock Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
AN2317 - Application
List of Figures
List of Figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
STPM01 External Circuit Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Primary Current Sensing Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current Sense Transformer-to-Power Line Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Shunt Module-to-Power Line Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Anti-aliasing Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Anti-aliasing Effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Anti-aliasing Filter Magnitude Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Anti-aliasing Filter Phase Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Voltage Sensing Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Crosstalk Network. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Capacitive power supply (with EMC Filter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Capacitive Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Internal RC Recommended Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Quartz Recommended Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
External Clock Source Recommended Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3/27
External Circuit Design
1
AN2317 - Application
External Circuit Design
Figure 1 on page 5 shows an implementation example of the STPM01 in a simple Stepper
Counter Connector design. The main external circuits include:
4/27
●
a Current Sensing Circuit,
●
an Anti-aliasing Filter on page 11,
●
a Voltage Sensing Circuit on page 15,
●
a Capacitive Power Supply Circuit on page 18, and
●
a Clock Generation on page 24 (RC oscillator, quartz, or external clock).
AN2317 - Application
External Circuit Design
STPM01 External Circuit Schematics
10N
C19
2
PI
G08 10-2V
D1
20
LED
1
2
1 VDD
4
5
8
9
10
CLKIN
VDDA
VIN
VOIP
VIP
IIP1
IIN2
IIN1
IIP2
6
VDDA 7
8
D9 SRD 200mcd
9
10
2
1
2
2.4K
R17
1
2
SBG
SDA
SCL
SCS
SYN
19
18
3
15
17
16
14
13
12
1 R15 2
11
2
10N
2
1
1
4194.304kHz 1
2
R13 2
1
1.0k
2M
2
15P
R1
1M
Y1
C13
21
SYN
2
4
5
C12
1
VDD
1
2
3
1
C8
30.1R
TR1
SCS
1
1
2
1.0k
1
R5
E4622/X503
4
SCL
MOP
VCC
7
R2
MON
VSS CLKOUT
6
VDDA
SDA
D8 SRD 200mcd
D7 SRD 200mcd
U1
STPM01E
2
2
1
1
R18
1
1
2
2.4K
2
2
2.4K
1
2
1
1MY
C4
1.0N
C5
C7
2
1
R19
1
1MY
1MY
2
1
1N4148
1
VDD
2
2
2
R20
2
D5
2
1 1N4148
R23 2
1.0N
C6
C2
1.0N
C3
1
10N
2
47K
1
1
15P
Q4
BC8578
31
D4
2
1 1N4148
2.4K
3
1
W5
VODNIK
1
D6
SRD 200mcd
2
W6
VODNIK
1
D3
2
1 1N4148
C17
C16
1MY
1K
R22
R21
33.0R
2
Q3
BC8578
2
2
1
2
1
1
1N4148
C18
D2
2
1
1
1
10N
Figure 1.
2
ANTI-ALIASING FILTER
30.1R
1
2
1
21
R4
2
R14 2
1
10N
TR2
R3
1.0k
C9
1
R6
E4622/X503
1
4
CRYSTAL OR RTC
OSCILLATOR
2M
2
1.0k
CURRENT SENSING
1
C11
1
2
4.7my
2
1
L3
82R
1
C14
510V
V4
N
1 R24 2
2
220MYH
1
W4
VODNIK
1
L6
1.0N
1
F
2
2
1 R10 2
2
1
C20
220N
C1
1
261K
R7
2
VOLTAGE SENSING
10N
2
475R
1 R11 2
1 R12 2
150K
2.21k
2
2
2
1
470N
2
D11
W1
VODNIK
VDD
1
1
1
DIF60
2
CAPACITIVE POWER SUPPLY
1
5.6V
1
W3
VODNIK
1
R9
261K
1000M
D12
1
C15
+
2
DIF60
R8
261K
D10
1
C10
2
W2
VODNIK
1
220MYH
AI12296
5/27
External Circuit Design
1.1
AN2317 - Application
Current Sensing Circuit
The STPM01 has two external current sensing circuits (see Figure 1 on page 5):
1.1.1
1.
Primary channel, and
2.
Secondary channel.
Primary Current Sensing
The primary channel uses a current transformer to couple the mains current (see Figure 2).
The Burden resistor is used to produce a voltage between VIN1 and VIP1. The Low-pass
filter (LPF) is used to filter out the high frequency interference and has little influence on the
voltage drop between VIN1 and VIP1.
Primary Current Sensing Circuit
I1
I2
Burden Resistor
LPF
1
2
2
2
VIN1
1
C9
6.8R
1
R25
1R
R23
1
R2
1.0k
1
R1
2
+
10N
Figure 2.
2
U0
–
VIP1
1.0k
AI12297
6/27
AN2317 - Application
External Circuit Design
Primary current sensing is calculated as follows:
Equation 1
N1
I 2 = ------- ⋅ I 1
N2
Equation 2
N1
R 23 ⋅ R 25
R 23 ⋅ R 25
U 0 ≈ U A = I 2 ⋅ -------------------------------- = -------- ⋅ I 1 ⋅ -------------------------------N2
R 23 + R 25
R 23 + R 25
Assuming I1PEAK, the calculation will proceed as:
Equation 3
I 1PEAK N 2 2000
------------------ = ------- = ------------I 2PEAK N 1
1
Equation 4
I 1PEAK
I 2PEAK = -----------------= 3mA
2000
Equation 5
R 23 ⋅ R 25
U 0PEAK = U APEAK = I 2PEAK ⋅ -------------------------- = 2.6mV
R 23 + R 25
The maximum differential input voltage between VIN1 and V IP1 is dependent on the
Programmable Gain Amplifier (PGA) selection. For the purposes of this application, use 8x
as the gain value, then U 0PEAK = 0.15V.
Equation 6
U APEAK = U 0PEAK = 0.15V
Equation 7
R 23 + R 25
I 2PEAK = U APEAK ⋅ -------------------------- = 172mA
R 23 ⋅ R 25
Equation 8
I 1PEAK = 2000I 2 PEAK = 344A
Equation 9
I 1PEAK
I 1RMS = ------------------ = 243A
2
7/27
External Circuit Design
AN2317 - Application
The primary current sensing circuit can be connected to mains as follows (see Figure 3):
1.
The hot line voltage wire must be connected to pin F of the module.
Normally, this wire is also connected to the hot line current wire. However, during
production or to verify phases, this wire may be connected to some other line voltage
source.
2.
The neutral line voltage wire must be connected to pin N of the module.
This wire is also connected to the neutral line current wire.
3.
The hot line current wire must be placed through the current transformer TR1 hole
(becoming the hot load wire).
Use insulated 4mm2 copper wire.
4.
The neutral line current wire must be placed through the current transformer TR2 hole.
Use insulated 4mm2 copper wire.
Figure 3.
Current Sense Transformer-to-Power Line Connections
Neutral Line
Neutral Load
Hot Line
F
Hot Load
N
TR2
TR1
W6
W5
*
Comp side
P1
AI12298
8/27
AN2317 - Application
1.1.2
External Circuit Design
Secondary current sensing
The secondary channel uses shunt resistor structure (see Figure 4). The 420µW shunt
resistor is used to maximize the use of the dynamic range of the current sensing circuit.
However, there are some important considerations when selecting a shunt structure for
energy metering applications.
●
The power dissipation in the shunt must be minimized.
The maximum rated current for this design element is 20A, so the maximum power
dissipated in the shunt is calculated as follows:
2
( 20A ) × 420μΩ = 168mW
●
The higher power dissipation may make it difficult to manage the thermal issues.
Although the shunt is manufactured from manganin material, which is an alloy with a
low thermal resistance, an apparent error may occur when it reaches a high
temperature.
●
The shunt should be able to resist the shortage of the phase circuit.
This reduces the shunt resistance is much as possible.
The design values used are:
–
Mains voltage = 220V RMS,
–
Ib = 2A, and
–
Shunt resistance = 420µΩ.
The remaining design elements calculated from these values are as follows:
–
Voltage across shunt:
2A × 420μΩ = 0.00084V
–
Mains power dissipation:
220V × 2A = 0.44kW
–
Error:
1.68 × 10
–3
⁄ 0.44 × 10
–3
× 100percent = 0.0004percent
9/27
External Circuit Design
AN2317 - Application
The secondary current sensing circuit can be connected to the mains as shown in Figure 4:
1.
The hot line voltage wire must be connected to pin N of the module.
Normally, this wire is also connected to the hot line current wire. However, during
production or to verify phases, this wire may be connected to some other line voltage
source.
2.
The neutral line voltage wire must be connected to pin F of the module.
This wire is also connected to the neutral line current wire, which passes by the
module.
3.
The hot line current wire must be connected to the Shunt pole which is close to pin N of
the module.
Use insulated 4mm2 copper wire.
4.
The hot load current wire must be connected to the Shunt pole which is close to the
edge of the module.
Use insulated 4mm2 copper wire.
Figure 4.
Shunt Module-to-Power Line Connections
Neutral
Hot Line
F
Hot Load
N
Shunt
*
Comp side
P1
W6
W5
LED
NLC
TPR
DIR
AI12299
10/27
AN2317 - Application
1.2
External Circuit Design
Anti-aliasing Filter
The anti-aliasing filter (Figure 5) is a low-pass filter. It reduces high frequency levels which
may cause distortion due to the sampling (aliasing) that occurs before the analog inputs of
an analog-to-digital converter (ADC) are introduced into the application (see Figure 6).
Filtering is easily implemented with a resistor-capacitor (RC) single-pole circuit which
obtains an attenuation of –20dB/dec.
Figure 5.
Anti-aliasing Filter
R
C
UO
UI
R
C
AI12900
Figure 6.
Anti-aliasing Effect
Image
Frequencies
0
2
450
Frequency - kHz
900
AI12901
11/27
External Circuit Design
AN2317 - Application
The anti-aliasing filter magnitude and phase response can be calculated as follows:
Equation 10
1
--------UO
jωc
1
A u = -------- = -------------------- = ------------------------1
1 + jωRC
UI
R + --------jωc
Note:
The cutoff frequency is expressed as:
1
1
f p = --------- = ---------------2πτ
2πRC
So Equation 10 can be changed to:
Equation 11
1
1
A u = -------------------- = -------------------f
f
1 + j ⋅ ---1 + j ⋅ ---fp
fp
Equation 12
1
A u = ---------------------f 2
1 + ⎛ ----⎞
⎝ f p⎠
The phase is expressed as:
Equation 13
f
ϕ = – arc tan ---fp
In the module:
R = 2 • 103KΩ and
C = 10nF, so then
1
f p = ---------------- = 7961.8Hz
2πRC
12/27
AN2317 - Application
External Circuit Design
According to Equation 12 and Equation 13 on page 12, the filter’s magnitude and phase
response can be seen in Figure 7 and Figure 8 on page 14.
●
When f = 50Hz:
Equation 14
ϕ = – 0.35°
and
Equation 15
Au ≈ 1
●
When f = 60Hz:
Equation 16
ϕ = – 0.43°
and
Equation 17
Au ≈ 1
Assume that the current lags the voltage by a phase angle, δ. After an anti-aliasing filter, a
phase error (ϕ) is introduced into the STPM01. The power factor (PF) error is calculated as:
Equation 18
cos δ – cos ( δ + ϕ )
error PF = ----------------------------------------------- ⋅ 100percent
cos δ
When,
δ = –60° (PF = –0.5), and
f = 50Hz,
according to Equation 14, a phase error, ϕ = –0.35° has occurred:
Equation 19
cos ( – 60° ) – cos ( – 60° – 0.35° )
error PF = ---------------------------------------------------------------------------------- ⋅ 100percent = 1percent
cos ( – 60° )
This indicates that even a small phase error will translate into a significant measurement
error at a low power factor. Thus correct phase matching is required in this situation.
13/27
External Circuit Design
Figure 7.
AN2317 - Application
Anti-aliasing Filter Magnitude Response
Decibels (dB)
0
–20
–40
–60
Figure 8.
10
100
1000
10000
Frequency (Hz)
100000
1000000
AI12902
Anti-aliasing Filter Phase Response
0
Degrees (°)
–20
–40
–60
–80
–100
10
100
1000
10000
Frequency (Hz)
100000
1000000
AI12903
14/27
AN2317 - Application
1.3
External Circuit Design
Voltage Sensing Circuit
The STPM01 normally uses a resistor divider as voltage input channel (see Figure 9). The
783kΩ resistor is separated into three 261kΩ, in-series resistors (see Figure 1 on page 5),
which ensure that a high voltage transient will not bypass the resistor. These three resistors
also reduce the potential across the resistors, thereby decreasing the possibility of arcing.
The following resistors are used as the resistor divider when the mains voltage is present:
●
R‘ = 783KΩ, and
●
R5=475Ω.
C11 and (R 19+ R15) create a filter which prevents Electromagnetic Interference (EMI)
created by the circuit from migrating onto the Line or Neutral busses (see Equation 20
through Equation 24 on page 16).
Figure 9.
Voltage Sensing Circuit
R'
V1
783k
R5
475
Z1
R19
42.2k
Z2
L2
1m
C11
22n
R6
475
R'
R15
100
V2
783k
AI12904
15/27
External Circuit Design
AN2317 - Application
Equation 20
Z 1 = ( R 19 + R 15 ) = 42.3KΩ
Equation 21
( R 5 + R6 ) ⋅ Z 1
Z 2 = -----------------------------------= 930Ω
R 5 + R6 + Z 1
Equation 22
Z
⎧
-----2= 110 2V , U 1 = 0.046V
⎪ V
2
U 1 = – U 2 = ---------------------- ⋅ V mains = ⎨ m ains
2R′ + Z 2
⎪ V m ains = 220 2V , U 1 = 0.092V
⎩
Equation 23
Z2
⎧
-----= 110 2V , U 0 = 0.092V
⎪ V
2
U 0 = U 1 – U 2 = ------------------- ⋅ V mains = ⎨ mains
Z
⎪ V mains = 220 2V , U 0 = 0.185V
R′ + ------2⎩
2
Z1 has little influence on the U0, thus:
Equation 24
R5
U 0 ≈ ------------------R′ + R 5
Note:
16/27
For a specific U 0, choose an appropriate combination of resistors (R5 and R’) to get that
particular U 0 value.
AN2317 - Application
1.4
External Circuit Design
Crosstalk Cancellation Network
The voltage front end handles voltages of considerable amplitude, which makes it a
potential source of noise. Disturbances are readily emitted into current measurement
circuitry where it will interfere with the actual signal to be measured. Typically, this shows as
a non-linear error at small signal amplitudes and non-unity power factors.
At unity power factor, voltage and current signals are in phase and crosstalk between
voltage and current channels merely appears as a gain error, which can be calibrated.
When voltage and current are not in phase, crosstalk will have a non-linear effect on the
measurements, which cannot be calibrated.
Crosstalk is minimized by means of good PCB planning and the proper use of filter
components in the crosstalk network. Recommended filter components are shown in
Figure 10. The network subtracts a signal proportional to the voltage input from the current
input. This prevents crosstalking within the STPM01. The signal subtraction is calculated in
Equation 25 and Equation 26.
Equation 25
R15
R15
V R15 = ----------------------------- ⋅ V VCI ≅ ----------- ⋅ V VCI
R19 + R15
R19
Equation 26
–6
R1 R15
R1
R1
V CCI = ------------------------- ⋅ V R15 ≅ ----------- ⋅ V R15 = ----------- ⋅ ----------- ⋅ V VCI ≅ 1.18e V VCI
R21 R19
R21 + R1
R21
Note:
This network must be applied to every STPM01 design, from the voltage channel to each
current channel.
Figure 10. Crosstalk Network
+
R19
42.2k
VVCI
Voltage
Channel
Input
–
R21
2M
R15
100
R1
1k
–
VCCI
Current
Channel
Input
+
AI12908
17/27
External Circuit Design
1.5
AN2317 - Application
Capacitive Power Supply Circuit
The capacitive power supply circuit is shown in Figure 10 and includes:
●
a varistor,
●
the capacitive power supply, and
●
the Electromagnetic Compatibility (EMC) filter.
Figure 11. Capacitive power supply (with EMC Filter)
Transient
Protection
Filter 1
L1
220m
LINE
Current
Limiter
R1
Voltage
Divider
C2
82R
470n
Filter 2
D1
VDD
DIF60
2
RV1
510V
C1
1n
D2
DIF60
C3
1000m
D3
5.1V
1
NEUTRAL
L2
220m
GND
AI12909
1.5.1
Varistor
The varistor is a surge protection device that is connected directly across the AC input.
When a power surge or voltage spike exceeding a specified voltage (varistor voltage) is
sensed, the varistor's resistance rapidly decreases, creating an instant shunt path for the
overvoltage, thereby saving the sensitive control panel components. The varistor and the
line fuse are subject to damage or weakened because the shunt path creates a short circuit.
An essential point of varistor selection is that the varistor can handle the peak pulse current,
which is 110% of the maximum current at which the varistor voltage does not change. If the
peak pulse current rating is insufficient, then the varistor may be damaged. The main
voltage is 220V RMS, and sometimes the maximum will reach 265VRMS.Thus, an MOKS
K10*300V varistor is chosen for this application.
18/27
AN2317 - Application
1.5.2
External Circuit Design
Capacitive Power Supply
There are several ways to convert AC voltage into the DC voltage required by STPM01.
Traditionally, this is done with a transformer and rectifier circuit. There is also switching
power supply solution. However, these two solutions are expensive and take up a
considerable amount of PCB space.
To provide a low-cost, alternative solution, a transformerless power supply can be used (see
Figure 12).
Figure 12. Capacitive Power Supply
R1
C2
82R
470n
IIN
D1
VDD
LINE
DIF60
2
UIN
D2
DIF60
C3
1000m
D3
5.1V
1
NEUTRAL
GND
AI12914
19/27
External Circuit Design
AN2317 - Application
The input current (IIN) is limited by R 1 and the capacitive reactance of C2 (see Equation 28
and Equation 29), and is expressed as:
Equation 27
V IN ( RMS )
I IN = -----------------------X C2 + R 1
where,
XC2 = C2 reactance.
Note:
R1 is used to limit inrush current, but it dissipates power.
By adding a low-cost half-wave rectifier, current is allowed to be supplied by the source
during the positive half, where,
●
VINRMS = RMS voltage of the half-wave AC waveform, and is expressed as follows:
Equation 28
1 V PEAK – V Z
V IN ( RM S ) = --- ⋅ ------------------------------2
2
where,
VPEAK = mains peak voltage (i.e. United States = 115V/60Hz and
Europe = 220V/50Hz), and
VZ = the voltage drop across D1 and D 3.
●
XC2 = Capacitor reactance, and is expressed as:
Equation 29
1
X C2 = ---------------2πfC 2
By substituting the values expressed in Equation 27 with those in Equation 28 and Equation
29, the results are as follows:
Equation 30
2V m ains – V Z
V PEAK – V Z
I IN = ---------------------------------------= ---------------------------------------2 2 ( X C2 + R 1 )
2 2 ( X C2 + R 1 )
Assuming that the voltage drop across each diode is 0.7V, then the total voltage drop is
expressed as:
Equation 31
V Z = V D1 + V D3 = 5 + 0.7 ⋅ 2 = 6.4V
20/27
AN2317 - Application
External Circuit Design
When these application parameters are considered:
Vmains = 220VAC,
f = 50Hz, and
VZ = 6.4V (see Equation 31), the calculated IIN would be:
Equation 32
I IN = 15.7mA
Selecting components in the circuit is a critical consideration. As a general rule, components
should be sized at twice the maximum power calculated for each device.
For example, by using the IIN value in Equation 32 and VDD = 5V to choose an appropriate
Zener diode, the results required to make the selection are expressed as follows:
Equation 33
2
V DD = I IN ⋅ R 1 = 0.02W
and
Equation 34
P D3 = V D3 ⋅ I IN = 5.1 ⋅ 0.0157 = 0.08W
Thus, a ZMM SOD 80*5.1V G Zener Diode is used.
21/27
External Circuit Design
1.5.3
AN2317 - Application
EMC Filter
EMC has become an important power supply parameter. In order to deal with common and
differential mode noise, a two-part AC filter is added (see Figure 11 on page 18).
●
Differential filter (Filter 1)
Inductors L1/L2, and C 1 represent a differential filter for DM (differential mode) noise
trying to enter the power supply. DM noise is produced by current flowing along either
the Line or Neutral conductor, and returning by the respective other. This produces a
noise voltage between the Line and Neutral conductors.
The filter will be designed for at least 10 times the line frequency, thereby resulting in a
frequency of 600Hz. The indication is then, that the cutoff frequency (fC) must not be
below 600Hz.
Capacitor C1 is X Class capacitor, used to reduce differential noise. To ensure that C 1
does not fail because of the surge or short circuit current, it must be able to withstand
twice the mains voltage value. Keeping this requirement in mind, fC is calculated as
follows:
Equation 35
1
f C ≈ ----------------------------------------------- = 7.59Hz
2π ( L 1 + L2 ) ⋅ C 1
Note:
22/27
Generally, a specific f C value is chosen, then the inductors are tuned to that value.
AN2317 - Application
●
External Circuit Design
Capacitor filter (C3, Filter 2)
Capacitor C3 is used as a filter. Considering load RL, the size of C3 must satisfy the
requirements expressed in Equation 36:
Equation 36
R L C = ( 15 ∼ 25 )T
In fact, considering that the charge stored in the capacitor is:
Equation 37
IL T = Q
where,
IL = the load current, and
T = the AC sine wave period, and
the output ripple voltage is expressed as:
Equation 38
Q
ΔV = ---C
then the capacitor C value can be calculated by using a fixed voltage ripple value:
Equation 39
IL T
ΔV = ------C
then, fixing our ripple to ΔV=200mV we can calculate C value accordingly.
For the purposes of this application, C is calculated as follows:
Equation 40
10mA
C = -------------------------------------- = 1000μF
200mV ⋅ 50Hz
The STPM01 power supply (VCC) configuration range is from 3.3V to 6V. While it
seems to be enough to change the D3 diode (see Equation 34) from the previously
selected ZMM SOD 80*5.1V G Zener Diode, if the output current is too high, then the
C2 value must be reduced.
Note:
Usually it is not necessary to use resistor R1 in the circuit.
23/27
External Circuit Design
1.6
AN2317 - Application
Clock Generation
All of the STPM01 internal timing is based on the CLKOUT oscillation signal. This signal can
be generated in three different ways:
●
RC (see Figure 13)
This oscillator mode can be selected using the RC configuration bit. If RC = 1, then the
STPM01 will run using the RC oscillator. A resistor connected between CLKIN and
Ground will set the RC current.
Note:
For 4MHz operation, the suggested settling resistor is 12k.
●
Quartz (see Figure 14)
The oscillator will work with an external crystal.
Figure 13. Internal RC Recommended Connections
VSS
CLKIN
CLKOUT
12k
AI12915
Figure 14. Quartz Recommended Connections
VSS
CLKIN
CLKOUT
1M
4194MHz
15pF
15pF
AI12916
24/27
AN2317 - Application
●
External Circuit Design
External Clock (see Figure 15)
The clock generator is powered from analog supply, and is responsible for two tasks:
a)
to retard the turning on of some of the function blocks after Power-on Reset (POR)
in order to help smooth start the external power supply circuitry and keep all major
loads off of the circuit, and
b)
to provide all necessary clocks for the analog and digital parts. Two nominal
frequency ranges are expected,(1) from 4.000MHz to 4.194MHz, or (2) from
8.000MHz to 8.192MHz.
Figure 15. External Clock Source Recommended Connections
VSS
CLKIN
CLKOUT
–
AI12917
25/27
Revision History
2
AN2317 - Application
Revision History
Table 1.
26/27
Document revision history
Date
Revision
14-Apr-2006
1
Changes
Initial release.
AN2317 - Application
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