cd00144693

AN2459
Application note
Digital Power Factor Correction for Tube Lamp Ballasts and
other digital power supplies controlled by an 8-bit microcontroller
1
Introduction
The electronic ballast market has undergone dramatic changes over the last few years. It
has moved from full analog, very differentiated applications made by a collection of drivers
and controllers, where use of custom ASICs was widespread, to a couple of standard
platforms.
The basic building blocks are still the same. They include a power factor corrector stage and
an inverting high voltage stage (Figure 1). On the one hand, analog platforms are targeting
the low cost/basic performance applications. Their main drivers and controllers are widely
used and well known ICs such as Power Factor Correctors (L6561/2/3) and High Voltage
Ballast Controllers (L6569x/ L6571x/ L6574). On the other hand, a new digital platform
concept has gained more interest and acceptance. A microcontroller with a simple Half
Bridge Driver (L638x) has replaced the ballast controller. The Half Bridge Driver is used
mainly for high-end applications, especially where the microcontroller has to deal with
communication tasks (e.g. using the Dali protocol).
STMicroelectronics' digital ballast reference design STEVAL-ILB002V1 introduces a safe
operating Power Factor Controller (PFC) and Ballast Controller. Even with relatively simple
microcontroller firmware routines, the results for power control and ballast protection are in
line with advanced analog controlled ballasts, while adding flexibility, for example, the
possibility to drive a wide variety of lamps, or to easily introduce different protection
schemes.
This application note deals in detail with the first block of the digital ballast, which provides
stable DC bus voltage for the halfbridge in all load conditions, as well as controlling the input
current shape which fulfills IEC standards (6.: IEC 61000-3-2 "Electromagnetic
compatibility".).
The final description of the digital ballast - the lamp control block - will be described in detail
in a separate application note.
Figure 1.
Digital ballast scheme
Input Filter
8- Bit
Microcontroller
ST7FLITE19B
January 2007
Power
Management Unit
L6382D5
Rev 1
1/35
www.st.com
Contents
AN2459 - Application note
Contents
1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2
Power Factor Correction (PFC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
4
2.1
Transition Mode operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2
Digital implementation - Enhanced One Pulse Mode . . . . . . . . . . . . . . . . . 6
Power circuits design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1
Power components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.2
Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.3
Bill of material (STEVAL-ILB002V1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Signals measurement, processing & control . . . . . . . . . . . . . . . . . . . . 15
4.1
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.2
Output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.3
Zero Current Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.4
MOSFET current measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5
Conclusion and outlook . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6
References and related materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Appendix A Components calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
7
2/35
A.1
Input capacitor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
A.2
Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
A.3
Boost inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
A.4
Power MOSFET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
A.5
Boost Diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
AN2459 - Application note
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Bill of material - PFC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Bill of material - Lamp Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Bill of material - general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
3/35
List of figures
AN2459 - Application note
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
4/35
Digital ballast scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
PFC Transition Mode principle (frequency is not to scale) . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Principle of the Enhanced One Pulse Mode, inside the ST7Lite1B . . . . . . . . . . . . . . . . . . . 7
Input voltage & current with modified EMI filter
(compared to STEVAL-ILB002V1) PF = 0.994 THD = 10.3% . . . . . . . . . . . . . . . . . . . . . . . 8
Input voltage & current measured on STEVAL-ILB002V1 (old EMI filter)
PF = 0.991 THD = 10.4% . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Schematics of STEVAL-ILB002V1 reference design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Modified EMI filter (not included in STEVAL-ILB002V1 reference design . . . . . . . . . . . . . 11
General flowchart of PFC software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Input voltage sensing circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Input voltage sensing circuit output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
The mains turn-on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Output voltage sensing circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Output voltage control loop flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Application start-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Lamp restart - behavior of the control loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Zero current crossing detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
PFC MOSFET overcurrent detection circuit and zero coil current detection circuit with
indicated testing connection and microcontroller inner structure . . . . . . . . . . . . . . . . . . . . 24
Maximum MOSFET's TON protection routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Overcurrent reaction demonstration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
AN2459 - Application note
2
Power Factor Correction (PFC)
Power Factor Correction (PFC)
Theoretically, any switching topology can be used to achieve a high power factor but, in
practice, the boost topology has become the most popular because of the advantages it
offers. These include:
●
Circuit requires the least external parts, thus it is the cheapest available.
●
Boost inductor, located between the bridge and the switch, lowers the input di/dt, thus
minimizing noise generated at the input and consequently reducing the EMI filter input
requirements.
●
Switch is source-grounded and therefore easy to drive.
Three methods of controlling the PFC preregulator are currently widely used. They are:
●
The Fixed Frequency Average Current Mode PWM.
●
The Transition Mode (TM) PWM (fixed on-time, variable frequency).
●
The peak current mode with fixed off-time.
Control of the first method is complicated and requires a sophisticated IC controller (e.g.
either ST's L4981A or ST’s L4981B which offers frequency modulation) and a considerable
component count.
Control of the second method is simpler (e.g. ST's L6561/2/3 family) and requires fewer
external parts. It is therefore much less expensive.
With the Fixed Frequency Average Current Mode method, the boost inductor operates in
continuous conduction mode, while the TM method causes the inductor to work on the
boundary between continuous and discontinuous modes. Thus, for a given throughput
power, TM operation involves higher peak currents, suggesting it is more efficient at lower
power ranges (typically below 200W). In contrast, the Fixed Frequency Average Current
Mode is recommended for higher power levels.
A third method of control, that of applying constant. Toff control, results in continuous
conduction mode. The same simple TM-controllers may be used, as may a small RC
network to set the off-time. This method is described in AN1792 (7) It is optimal for an input
power of between 200 and 400W.
2.1
Transition Mode operation
As mentioned above, the typical PFC topology used in electronic ballasts is a step-up
(boost) regulator (Figure 1) working in transition conduction mode. Figure 2 outlines the
Transition Mode principles. When the MOSFET is turned on, the inductor is charged from
the input voltage source. When the MOSFET is turned off, the boost inductor discharges its
energy into the load until its current falls to zero. When the latter occurs, the boost inductor
has no energy and a zero current (ZCD) signal is detected, due to a demagnetization
change on the auxiliary winding. This drives the MOSFET on again, whereby another
conversion cycle starts. As the drain voltage drops before turn-on, the turn-on switching
losses are minimized. Figure 2 indicates the geometric relationship of average and peak
currents. Due to the triangular shape of the inductor current, the peak current is twice the
average current.
5/35
Power Factor Correction (PFC)
Figure 2.
AN2459 - Application note
PFC Transition Mode principle (frequency is not to scale)
Peak current
enveloppe
Inductor current
Average current
On
MOSFET
On
AI12647
2.2
Digital implementation - Enhanced One Pulse Mode
To provide good switch control, as described in Chapter 2.1 above, a simple 8-bit
microcontroller may be used and a special PWM timer mode has been introduced. The
timer mode, called "Enhanced One Pulse Mode" of the PWM generator (12-bit autoreload
timer) is found inside the ST7FLITE19B microcontroller. It is explained in Figure 3 and in
datasheet ST7Lite1xB (4). In principle, when a zero current event occurs the microcontroller
will reset the timer and turn-on the PFC MOSFET. If there is no signal from ZCD, the timer
will overflow and turn-on the MOSFET anyway (it means a minimum switching frequency is
secured). The on-time of the MOSFET is set by a software control routine and is constant
during the mains half-cycle (this is detailed below in Chapter 4). The control routine
executed by the MCU alters the on-time depending on the input voltage level and the load
current.
6/35
AN2459 - Application note
Principle of the Enhanced One Pulse Mode, inside the ST7Lite1B
Timer reset caused by
ZCD
Timer reset caused by
autoreload value match
Compare event
Timer
Events ignored, because
MOSFET is turned-on
Event
Event
No event
occured
}
Figure 3.
Power Factor Correction (PFC)
ZCD
On
MOSFET
Off
AI12651
7/35
Power circuits design
AN2459 - Application note
3
Power circuits design
3.1
Power components
All components have been calculated following application note AN966 (3). A full description
of the design and selection of each component, based on the analog TM PFC controller
L6561, is also given in Appendix A. At the moment, input voltage is limited for European
mains. Future Software updates will include wide range input capability.
Besides the passive and discrete components of the microcontroller, the most important
part is the power management unit, L6382D5, which helps control the power. It provides a
stable (±2%) 5V supply for the microcontroller during the whole operation. It also supplies a
high voltage start-up. In addition, one of the general purpose gate drivers integrated inside
L6382D5 is used to translate TTL PWM signals from the microcontroller to the boost
converter gate of the MOSFET.
8/35
Figure 4.
Input voltage & current with modified EMI filter
(compared to STEVAL-ILB002V1) PF = 0.994 THD = 10.3%
Note:
Brown = Mains voltage, Blue = Input current.
AN2459 - Application note
Power circuits design
Figure 5.
Input voltage & current measured on STEVAL-ILB002V1 (old EMI filter)
PF = 0.991 THD = 10.4%
Note:
Brown = Mains voltage, Blue = Input current.
Reference board design measurements of STEVAL-ILB002V1(Figure 5) show a THD value
of 10.4% and a PF value of 0.991. Between the manufacturing of the STEVAL-ILB002V1
reference design and publication of this application note, design work has continued and
some improvements have been made. For example, EMI filter parameters have been
changed from C-L-C to C-L filters, which give better results for waveform, power factor, and
THD .This optimized version is given in Figure 7 and result in the measured waveforms
shown in Figure 4 with THD = 10.3% and PF = 0.994.
9/35
10/35
AC
L
N
PE
J1
AverageLampVoltage
PeakLampVoltage
PeakCurrent
AverageCurrent
PFC VinW aveform
PFC Vout Sense
1
2
3
4
5
6
7
8
9
10
RsenseCurrent
U1
R5
20k
R4
750k
R3
750k
ST7LITE1B 20pin
2.2nF
1000V
C8
C4
10n
20
19
18
17
16
15
14
13
12
11
R42
10k
R43
10k
2
1
R16
18
R44
10k
R45
10k
DC5V
0.6W
27k
R6
R46
R7
C27
10p
C26
10p
10
1
8 T2
18
10p
C28
LampDetection
PFC Gate Driver
1
10p
C25
C12
100nF
1
2
3
4
5
6
7
8
9
10
3
Q1 2
5
3
C14
10n
L6382
PFI
LSI
HSI
HEI
PFG
NC
TPR
GND
LSG
VCC
U2
R9
0.5
2
VREF
CSI
CSO
HEG
NC
HVSU
NC
OUT
HSG
BOOT
R10 1k
C23
68n
1
NTC1
10
R36
24k
CSI
CSO
DC5V
C5
2n7
PFC OC
2
75k
R35
C13
50V 100nF
4n7
C6
PFC VOUT Sense
20
19
18
17
16
15
14
13
12
11
STTH1R06
D2
STP5NK60Z
1
PeakLampVoltage
CSO
PFC Zero Current Detect
25V
C11
+ 47µF
1
R8
47k
PFC Mosfet Gate
Low Side Input
High Side Input
High Side Input
Low Side Input
0.6W
D12
1N4007
Not assembled
2
TRANSFORMER
PFC Gate Driver
PFC Mosfet Gate
PFC Zero Current Detect
PFC Vi
VinWaveform
D13
STTH1R06A
Out pin
100n 275VAC
C3
OSC1/CLKIN/PC0
OSC2/PC1
PA0(HS)/LTIC
PA1(HS)/ATIC
PA2(HS)/ATPWM0
PA3(HS)/ATPWM1
PA4(HS)/ATPWM2
PA5(HS)/ATPWM3/ICCDATA
PA6/MCO/ICCCLK/BREAK
PA7(HS)/COMPOUT
RsenseCurrent
BAT46
D5
RESET
COMPIN+/SS/AIN0/PB0
SCK/AIN1/PB1
MISO/AIN2/PB2
MOSI/AIN3/PB3
COMP-/CLKIN/AIN4/PB4
AIN5/PB5
AIN6/PB6
VSS
VDD
3k9
R27
4k7
R25
–
2
3
BRIDGE RB156
D7
1k
R14
R19 10
0
R21 10
0
R34
100k
R33
300k
R32
300k
R31
300k
Vcap
RsenseCurrent
R22 33
1N4148 SMD Not
assembled
D4
D6
0
22µF
22uF 450V
C7
1N4148 SMD R20 33
Not assembled
D3
0.6W
R18
+
1N4148 SMD
C19
4n7
100V
R13
10k
R12
750k
R11
750k
DC400V
R23
1
2W ,,1%
Q3
STP5NK60Z
1.8mH
L1
Out pin
Q2
STP5NK60Z
AverageLampVoltage
100nF
400V
C15
C17
10n
C16
10n
1600V
DC5V
R41
2k4
LampDetection
R30
10k
1M
R29
C18
470n
DC5V
1
2
3
4
AI12648
58W T8 lamp
J2
Vcap
R40
2k4
R39
240k
R38
240k
R37
240k
Vcap
Schematics of STEVAL-ILB002V1 reference design
RESET
C29
100n
275VAC
1
4
Figure 6.
PFC OC
C9
220nF
4
RsenseCurrent
DC5V
C20
1n
C21
470n
T1
1 CM C hoke 2
3
Schematics
10nF
R28
1k5
R26
4k7
7
10k
R24
R2
1M
350V
R1
1M
350V
3.2
C10
CSI
PeakCurrent
C22
2
470n
AverageCurrent
1n
275VAC
C2
C1
100n
275VAC
FUSE
+
F1
Power circuits design
AN2459 - Application note
AN2459 - Application note
Figure 7.
Power circuits design
Modified EMI filter (not included in STEVAL-ILB002V1 reference design
F1
FUSE
C1
100n
J1
L
N
PE
AC
275VAC
R1
1M 3
350V
+4
T1
4
1
R2
1M
350V
1
D7
BRIDGERB156
3
2 H
CM
Choke
45m
C3
2
100n 275VAC
C2
1n
275VAC
AI12646
11/35
Power circuits design
AN2459 - Application note
3.3
Bill of material (STEVAL-ILB002V1)
Table 1.
Bill of material - PFC
Reference
Part
Description
C2
2.2n
X1,Y2 ceramic capacitor
C1, C3
100n 400V
X2 capacitor
C4
10n
SMD 0805
C5
2n7
SMD 0805
C6
4n7
SMD 0805
C7
22µF
Elyt 450V
C27
10p
SMD 1206
D7
Bridge
1.5A 600V
D12
1N4007
Not assembled
F1
FUSE
Roundfuse 2A 250V
NTC1
10
NTC 5R
Q1
STP5NK60Z
TO 220
R1,R2
1M 200V
SMD 1206
R3, R4, R11, R12
750k
SMD 1206 200V
R5
20k
SMD 1206
R6
27k
0.6W, THT 0207
R7
10
SMD 1206
R8
47k
SMD 1206
R9
0.5
SMD 2512 2W 1%
R10, R14
1k
SMD 1206
R13
10k
SMD 1206
T1
Common mode
choke
Murata
T2
Transformer
0.8mH primary
J1
Connector
ARK500/3
12/35
Supplier
Order code
STMicroelectronics
STP5NK60Z
Vogt
5753201600
AN2459 - Application note
Table 2.
Power circuits design
Bill of material - Lamp Control
Reference
Part
Description
Supplier
Order code
C10
10nF
SMD 0805
C13
100nF
SMD 1206 50V
C14
10n
SMD 0805
C15
100nF
400V open case
C16
10n
1600V
C17
10n
SMD 1206
C18, C21, C22
470n
SMD 0805, 16V
C19
4n7 100V
SMD 1206
C25, C26, C28
10p
SMD 0805
C20
1n
SMD 0805
C23
68n
SMD 0805
D2
STTH1R06
DO-41 ultrafast diode
STMicroelectronics
STTH1R06
D3, D4
1N4148
Not assembled
D6
1N4148
SMD SOD80
D5
BAT46
SOD 323
STMicroelectronics
BAT46J
J2
Connector
ARK500/2
L1
1.8m
COIL
Vogt
SL 041 123 31 02
Q2, Q3
STP5NK60Z
TO 220
STMicroelectronics
STP5NK60Z
R29
1M 200V
SMD 1206
R30
10k
SMD 1206
R19, R21
33
SMD 1206
R20, R22
33
Not assembled
R23
1
1W, SMD 2512, 5%
R24, R42, R43, R44, R45
10k
SMD 0805
R25,R26
4k7
SMD 0805
R27
3k9
SMD 0805
R28
1k5
SMD 0805
R31,R32,R33,
300k
0.6W, THT 0207, 300V
R34,
100k
0.6W, THT 0207, 300V
R35
75k
SMD 1206, 200V
R36
24k
SMD 1206
R40
2k4
0.6W, THT 0207, 300V
R41
2k4
SMD 1206
R37,R38, R39
240k
0.6W, THT 0207, 300V
13/35
Power circuits design
Table 3.
AN2459 - Application note
Bill of material - general
Reference
Part
Description
C8
2.2nF
Y1
R16,R46
18
0.6W, THT 0207
R18
0
0.6W, THT 0207
D13
STTH1R06A
SM-A
C11
47µF
Elyt 35V
C12
100nF
SMD 1206
U1
ST7LITE1B 20pin
U2
L6382D5
14/35
Supplier
Order code
STMicroelectronics
STTH1R06A
DIP 20
STMicroelectronics
ST7FLIT19BF1B6
SO 20
STMicroelectronics
L6382D5
AN2459 - Application note
4
Signals measurement, processing & control
Signals measurement, processing & control
Figure 8 shows the general flow diagram of the PFC Software. It is described in a step by
step fashion in the following paragraphs.
Figure 8.
General flowchart of PFC software
Power-on
Interrupts
and
peripheral
init
PFC Init
(PWM off)
Iswitch > IPFCMAX
PFC starting
PFC running
Ballast error
Y
PFC error
(interrupt)
N
Wait for lamp insertion
or
mains restart
Reset
AI12649
15/35
Signals measurement, processing & control
4.1
AN2459 - Application note
Input voltage
The first signal used by the microcontroller is a voltage connected to the input connector.
This voltage is first divided and filtered by the circuitry shown in Figure 9. Then it is
measured by an analog to digital converter (ADC) inside the microcontroller. This signal has
several uses. The first is to avoid connecting the wrong input voltage at the beginning (i.e.
only European mains are allowed) and second to guard input over-voltage during normal
operation. The whole operation is stopped if the microcontroller detects any problems. If an
application is stopped due to a fail condition, it could be restarted only by re-lamping
(insertion of the lamp) or by mains recycling. The third use of the input voltage
measurement is to detect this recycling (disconnection and reconnection of the mains).
A fourth use of the input voltage is when it works in conjunction with the main control loop
(described in Chapter 4.2) to recognize a zero mains voltage crossing.
Figure 9.
Input voltage sensing circuit
+
750k
100n
750k
Vin
–
20k
10n
AI12652
16/35
AN2459 - Application note
Signals measurement, processing & control
Figure 10. Input voltage sensing circuit output
Note:
Brown = mains voltage, Green = voltage on ADC pin.
17/35
Signals measurement, processing & control
AN2459 - Application note
Figure 11. The mains turn-on
Mains turn-on
Input voltage check
Input voltage OK
Note:
4.2
⇒Σstart switching
Brown = mains, Green = DC output, Purple = PFC MOSFET gate.
Output voltage
The DC bus voltage (PFC output voltage) is measured by a high voltage divider with a lowpass filter (Figure 12). It is used by the software as an input for a PID regulator to calculate
the MOSFET on-time. Parameters for the regulator are not fixed but change depending on
the lamp state. This is because the electronic ballast behaves like a load with strongly
changing conditions (preheating / ignition / normal operation). Figure 13 outlines one control
cycle, and clearly shows that the regulator changes the MOSFET on-time at the
synchronization event with the mains voltage zero crossing.
18/35
AN2459 - Application note
Signals measurement, processing & control
Figure 12. Output voltage sensing circuit
DC BUS
750k
750k
DC BUS Voltage
1k
10k
4n7
AI12653
Figure 13. Output voltage control loop flowchart
PFC running
Measure VDCBUS
Change regulator constants
following
the load state
N
Lamp Control
routines
VDCBUS
within
limits?
Y
Mains voltage
zero crossing?
N
Next loop
Y
New TON
PID regulator
Set new TON
410V
STOP - Failure
AI12650
19/35
Signals measurement, processing & control
AN2459 - Application note
Figure 14 shows a DC bus voltage waveform during ballast turn-on. The precision of
regulation during normal operation (lamp is on) is ±5%. The only moment when this
accuracy is breached is at ignition phase, when there is a relative fast load change (lamp
voltage and current rise quickly). It is assumed that by improving the regulation parameters,
the ballast will also work from wide range mains (without any component change).
Figure 14. Application start-up
Note:
Brown = VDC BUS; Yellow = lamp current.
Beside the main control loop, output voltage is also used for protection. The software is
continuously supervising the output voltage value and when it reaches the upper or lower
threshold an error is detected. Overvoltage above the higher threshold could mean that
there is an unexpected fast load reduction. Alternatively, breaking the lower threshold
means a fast increase of the load. Both situation are considered dangerous and are
recognized as faults.
20/35
AN2459 - Application note
Signals measurement, processing & control
Figure 15. Lamp restart - behavior of the control loop
Lamp removed
Note:
4.3
Lamp inserted
Brown = DC bus voltage; Blue = lamp filament current.
Zero Current Detection
Detection of a zero current crossing the PFC inductor is extremely important. As described
in Section 2: Power Factor Correction (PFC), a ZCD defines the moment when the switch
should be turned-on again. A well-known method used in other analog PFC applications has
been implemented for the digital ballast. The secondary winding of PFC inductor (1:10
winding ratio) gives a correct signal for the autoreload timer (Chapter 2.2). Typical signals
are shown in Figure 16.
21/35
Signals measurement, processing & control
AN2459 - Application note
Figure 16. Zero current crossing detection
Z
C
D
ZDC Event
Note:
22/35
Green = microcontroller's input pin 18, Blue = inductor current.
AN2459 - Application note
4.4
Signals measurement, processing & control
MOSFET current measurement
The main reason for measuring a current flowing through the PFC MOSFET is to prevent
exceeding the maximum current rating and so saturating the boost inductor which results in
damaging components.
The software routines in general are too slow to perform fast reaction. For this reason, only
hardware peripherals are used, and the software is excluded from the detection of overcurrent. Two extra features of the ST7LITE19B are important for this protection:
●
the analog comparator;
●
the break function.
The comparator integrated inside the microcontroller (datasheet ST7Lite1xB, 4 section 11.6)
is a general purpose analog comparator with either an external or internal reference. Output
can be seen on an external pin (Port PA7 - pin 11), or as it is in this case used only internally
as an input for the second peripheral - the Break.
The Break function is an emergency shutdown used to stop all PWM outputs (i.e. MOSFET
gate signals). A detailed description of it may be found in the ST7FLITE19B datasheet, 4
section 11.2.3.3.
23/35
Signals measurement, processing & control
AN2459 - Application note
Figure 17. PFC MOSFET overcurrent detection circuit and zero coil current
detection circuit with indicated testing connection and microcontroller
inner structure
PFC Coil
DC BUS
22µF 450V
+
ST7FLITE19B
STPP5NK60Z
27k
1k
PFC OC
Zero Current Detect
PB0
(pin 4)
+
–
0.5
BREAK
active on rising edge
2n7
PWM0
PWM1
Voltage
reference
Interrupt
generation
on rising edge
PWM3
PA2
(pin 16)
PA3
(pin 17)
PA5
(pin 13)
Halfbridge
high side
Halfbridge
low side
PFC
Running SW
DC
Over current testing
AI12654
In order to simulate the PFC MOSFET overcurrent without stressing other components of
the digital ballast, an external DC source has to be connected in parallel with the sense
resistor R9 (0.5Ω). Afterwards, the MOSFET´s gate signal is measured, and the protection
response time may be obtained, as shown in Figure 19. Such a response time was
measured in less than 500ns, which is fast enough to prevent coil saturation and thereby
protect the MOSFET from damage.
Figure 18. Maximum MOSFET's TON protection routine
Set new TON
TONnew
N
N=0
TONMAX
Use new TON
Next loop
Y
TON = TONMAX
N++
Y
Error
N
N > NMAX
AI12655
24/35
AN2459 - Application note
Signals measurement, processing & control
In addition to the aforementioned hardware protections, another safety feature (Maximum
TON increase protection) is implemented in the software and outlined in Figure 18. During
normal operation, the PFC routine counts the number of times the pre-set MOSFET's ontime maximum (TONMAX) is reached. If the maximum count( N MAX) is exceeded an error is
introduced and the application is stopped. This condition indicates that the boost converter
is unable to reach the required output voltage.
Figure 19. Overcurrent reaction demonstration
Microcontroller stops
all PWM outputs
Overcurrent
introduced
Reaction time < 500ns
Note:
Brown = sense resistor voltage, Green = digital signal for driving MOSFET's
gate.
25/35
Conclusion and outlook
5
AN2459 - Application note
Conclusion and outlook
This application note explains the power factor correction (PFC) stage of the new digital
ballast reference design. It demonstrates a synergy between the power management unit
L6382D5 and the 8-bit microcontroller ST7FLITE19B in a fully digitally controlled
application. The reference design STEVAL-ILB002V1 is introduced with all the features and
protections required for high performance digital power supplies/ electronic ballasts.
Additional flexibility through the use of a digital approach has been highlighted as well.
The document AN1971 (2) could be referred for more information on first implementation of
a digital ballast with control based on the ST7Lite09. Other application notes for full digital
ballast (reference design STEVAL ILB002V1) are published in two further application notes.
26/35
AN2459 - Application note
6
References and related materials
References and related materials
1.
A. Loidl: "Digital ballast with PFC for Fluorescent Tube Lamps fully digitally controlled
by 8-bit microcontroller", PCIM 2006.
2.
STMicroelectronics, AN1971 ST7LITE0 Microcontrolled ballast,
http://www.st.com/stonline/products/literature/an/10534.pdf.
3.
STMicroelectronics, AN966 L6561, Enhanced Transition Mode Power Factor Corrector,
http://www.st.com/stonline/products/literature/an/5408.pdf.
4.
STMicroelectronics, ST7Lite1xB datasheet,
http://www.st.com/stonline/products/literature/ds/11929/st7lit19bf1.pdf.
5.
STMicroelectronics, L6382D5 datasheet,
http://www.st.com/stonline/products/literature/ds/11138/L6382d5.pdf.
6.
IEC 61000-3-2 "Electromagnetic compatibility".
7.
STMicroelectronics, AN1792 Design of fixed-off-time-controlled PFC pre-regulators
with the L6562, http://www.st.com/stonline/products/literature/an/10238.pdf.
27/35
Components calculation
Appendix A
AN2459 - Application note
Components calculation
This appendix presents guidelines for the calculation of power components. The content is
based on the design process defined in AN966 (3).
A.1
Input capacitor
The input high frequency filter capacitor (C3) has to attenuate the switching noise due to the
high frequency inductor current ripple (twice the average line current, Figure 9). The worst
conditions occur on the peak of the minimum rated input voltage. The maximum high
frequency voltage ripple is usually imposed between 1% and 10% of the minimum rated
input voltage. This is expressed by a coefficient ‘r’ (typically, r = 0.01 to 0.1):
High values of C 3 alleviate the burden to the EMI filter but cause the power factor and the
harmonic contents of the mains current to worsen, especially at high line and light load. On
the other hand, low values of C3 improve power factor and reduce mains current distortion
but require heavier EMI filtering and increase power dissipation in the input bridge. It is up to
the designer to find the right trade-off in their application.
A.2
Output capacitor
The output bulk capacitor (Co) selection depends on:
●
the DC output voltage;
●
the admitted overvoltage;
●
the output power;
●
the desired voltage ripple.
A voltage ripple (∆Vo = 1/2 ripple peak-to-peak value) of 100 to 120Hz (twice the mains
frequency) is a function of the capacitor impedance and the peak capacitor current (IC(2f)pk =
Io):
With a low ESR capacitor the capacitive reactance is dominant, therefore:
28/35
AN2459 - Application note
Components calculation
∆Vo is usually selected in the range 1 to 5% of the output voltage. Although ESR usually
does not affect the output ripple, it has to be taken into account for power loss calculations.
The total RMS capacitor ripple current, including mains frequency and switching frequency
components, is:
If the application has to guarantee a specified hold-up time, the selection criterion of the
capacitance will change: C o has to deliver the output power for a certain time (tHold) with a
specified maximum dropout voltage:
2
2
where Vo_min is the minimum output voltage value (which takes load regulation and output
ripple into account) and Vop_min is the minimum output operating voltage before the 'power
fail' detection from the downstream system supplied by the PFC.
A.3
Boost inductor
Designing the boost inductor involves several parameters and different approaches can be
followed. First, the inductance value must be defined. The inductance (L) is usually
determined so that the minimum switching frequency is greater than the maximum
frequency of the internal starter, to ensure a correct TM operation. Assuming unity PF, it is
possible to write:
Ton being the ON-time and Toff the OFF-time of the power MOSFET, ILpk the maximum peak
inductor current in a line cycle and θ the instantaneous line phase (θ∈ (0,π)). Note that the
ON-time is constant over a line cycle.
As previously mentioned, ILpk is twice the line-frequency peak current, which is related to
the input power and the line voltage:
29/35
Components calculation
AN2459 - Application note
Substituting this relationship in the expressions of Ton and Toff, after some algebra it is
possible to find the instantaneous switching frequency along a line cycle:
The switching frequency will be minimum at the top of the sinusoid (θ = π/2 ⇒ sin(θ) =1 ),
maximum at the zero crossings of the line voltage (θ = 0 or π ⇒ sin (θ) = 0) where Toff = 0.
The absolute minimum frequency fsw(min) can occur at either the maximum or the minimum
mains voltage, thus the inductor value is defined by:
where V irms can be either Virms(min) or Virms(max), whichever gives the lower value for L.
Once the value of L is defined, the real design of the inductor can start. Standard high
frequency ferrite (gapped core-set with bobbin) is the usual choice in PFC applications.
Selection of the most suitable one, among the various types offered by manufacturers, will
depend on technical and economic considerations.
The next step is to estimate the core size. To calculate an approximate value of the minimum
core size, the following practical equation may be used:
2
Volume ≥ 4K • L • Irms
where Volume is expressed in cm3, L in mH and the specific energy constant K depends on
the ratio of the gap length (lgap) and the effective magnetic length (le) of the ferrite core:
K ≅ 14 • 10–3 •
Ie
Igap
The ratio le/lgap is fixed by the designer.
Next, the winding has to be specified. Quantities to be defined include the turn number and
the wire cross-section.
The (maximum) instantaneous energy inside the boost inductor (1/2 × L × ILpk^2) can be
expressed in terms of energy stored in the magnetic field, given by the maximum energy
density times and the effective core volume Ve:
1
2
2
• L • ILpk
=
1
2
• ∆H • ∆B • Ve ≈
1
2
• ∆H • ∆B • Ae• Ie
where: Ae is the effective area of the core cross-section, ∆H is the swing of the magnetic
field strength and ∆B is the swing of the magnetic flux density.
30/35
AN2459 - Application note
Components calculation
An air gap needs to be introduced to prevent the core from saturating because of its high
permeability and to allow an adequate ∆H.
Despite the fact that gap length lgap is only a small per cent of le, the permeability of ferrite is
so high (for power ferrites the typical value of µr is 2500) that it is possible to assume, with
good approximation (∆H » ∆Hgap), that the whole magnetic field is concentrated in the air
gap. For instance, with an lgap/le value of 1% (which is the minimum suggested value) the
error caused by the above assumption is approximately 4%. The error is smaller if the lgap/le
ratio is larger. As a result, the fringing flux in the air gap region may be neglected and the
energy balance can be re-written as:
2
L • ILpk
≈ ∆Hgap • ∆B • Ae• Igap
The flux density ∆B, is the same throughout the core and the air gap, and is related to the
field strength inside the air gap by the well-known relationship:
∆Β = µ0 • ∆Hgap
Then, taking Ampere's law into account (but applying it only to the air gap region):
Igap • ∆Hgap ≈ N • ILpk
it is possible to obtain the following equation from the energy balance equation :
where N is the turn number of the winding.
Because N is defined, it is recommended to check the core saturation. If the core saturation
result is too close to the rated limit, it will be necessary to increase the value of lgap and
make a new calculation.
The wire gauge selection is based on limiting the copper losses to an acceptable value:
4
PCU =
3
2
• Irms • RCU
Due to the high ripple frequency, the effective wire resistance RCU, increases by skin and
proximity effects. For this reason litz wire or multi-wire solutions are recommended. Finally,
the space occupied by the winding needs to be evaluated. If it does not fit the winding area
of the bobbin, a bigger core set needs to be considered and the winding calculation
repeated. It is also necessary to add an auxiliary winding to the inductor, in order for the
ZCD pin to recognize at what point the current flowing through the inductor has fallen to
zero. The winding is a low cost thin wire and the turn number is the only parameter to be
defined.
31/35
Components calculation
A.4
AN2459 - Application note
Power MOSFET
The choice of MOSFET mainly concerns the R DSon, which depends on the output power.
The breakdown voltage is fixed by sum of the output voltage, the overvoltage and a safety
margin .
The MOSFET's power dissipation depends on conduction and switching losses.
The conduction losses are given by:
2
PON = IQrms • RDSon
where:
Switching losses due to current-voltage cross occur only at turn-off because of the TM
operation:
PCROSS = VO • Irms • tfall • fsw
where tfall is the crossover time at turn-off. At turn-on, loss is due to the discharge of the total
drain capacitance inside the MOSFET itself. In general, these losses are given by:
PCAP =
1
1.5
(3.3 • COSS • VDRAIN
+
2
2
• Cd • VDRAIN
) • fsw
where C oss is the internal drain capacitance of the MOSFET (at VDS = 25V), C d is the total
external drain parasitic capacitance and VDRAIN is the drain voltage at MOSFET turn-on. In
practice, it is possible to give only a rough estimate of the total switching losses because
both fsw and VDRAIN change along a given line half-cycle. V DRAIN, in particular, is affected
not only by the sinusoidal change of the input voltage but also by the drop due to the
resonance of the boost inductor with the total drain capacitance. At low mains voltage, this
causes VDRAIN to be zero during a significant portion of each line half-cycle. It is possible to
show that "Zero-Voltage-Switching" occurs as long as the instantaneous line voltage is less
than half the output voltage.
32/35
AN2459 - Application note
A.5
Components calculation
Boost Diode
The boost freewheeling diode is a fast recovery one. Its respective DC and RMS current
values, which are useful for loss computations, are given below:
The conduction losses can be estimated as follows:
2
PDON = Vto • IDO + Rd • IDrms
where V to (threshold voltage) and Rd (differential resistance) are parameters of the diode.
The breakdown voltage is fixed with the same criterion as the MOSFET.
33/35
Revision history
7
AN2459 - Application note
Revision history
Table 4.
34/35
Document revision history
Date
Revision
17-Jan-2007
1
Changes
Initial release.
AN2459 - Application note
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