cd00004011

AN993
Application note
Electronic ballast with PFC using L6574 and L6561
Introduction
Dedicated ICs for lamp ballast applications are now replacing the old solutions based on
bipolar transistors driven by a saturable pulse transformer.
The L6574 is a high-performance ballast driver, designed using 600-V BCD offline
technology, which ensures all the features needed to properly drive and control a fluorescent
bulb. It is provided with built-in VCO start-up sequence circuitry, protections, and an
operation amplifier for implementing a closed-loop control of the lamp current.
July 2009
Doc ID 5656 Rev 10
1/27
www.st.com
Contents
AN993
Contents
1
Half bridge converter for electronic lamp ballast . . . . . . . . . . . . . . . . . . 4
1.1
Lamp requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2
L6574 ballast driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
Device block description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1
Preheating and ignition section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.2
Control section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.3
Bootstrap section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.3.1
4
5
Description of the demonstration application . . . . . . . . . . . . . . . . . . . 15
4.1
Power factor section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2
Ballast section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.3
Preheating and ignition sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.4
Current feedback loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.5
Start-up and supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.6
Safety circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Design tips . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.1
6
2/27
Inductance and capacitor evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Dimming the lamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.1
7
Cboot selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Dimming level and lamp turn-on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Doc ID 5656 Rev 10
AN993
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Half bridge topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Internal block diagram of the L6574 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Connection of a typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Startup timing diagram and EN2 function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Timing block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Timing oscillator block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Cpre voltage and frequency shifting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Operating frequency at Cf = 470 pF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Controls timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Startup timing diagram and EN2 function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
External bootstrap diode connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
L6574 integrated bootstrap diode connection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Demonstration application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
PCB and components layouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Current feedback loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Cpre waveform (Ch1) and amplifier output (Ch2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Open load safety circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Extra voltage safety circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Simplified schematic of the lamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Preheating transfer function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Operating transfer function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Iterative process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Doc ID 5656 Rev 10
3/27
Half bridge converter for electronic lamp ballast
1
AN993
Half bridge converter for electronic lamp ballast
Voltage-fed, series-resonant half-bridge inverters are currently used for fluorescent lamps
(Figure 1). This topology facilitates operation in zero voltage switching (ZVS) resonant
mode, dramatically reducing the transistor switching losses and the electromagnetic
interference.
To design a cost-effective, compact and smart electronic lamp ballast, a dedicated IC could
be used to drive directly the power MOSFETs of the half bridge. Such controllers require a
high voltage capability for the high-side floating transistor driver.
Figure 1.
Half bridge topology
HV
DRIVER
LRES
CRES
AM01309v1
1.1
Lamp requirements
To prolong lamp life and to ensure efficient ignition of the lamp, the cathodes must be
preheated. In fact, the preheating of the filaments allows an easy strike of the lamp, reducing
the ignition voltage. During the preheating time, the lamp is characterized by a high
impedance and the current flows only in the filaments. The resistance value of the filaments
strictly depends on the type of lamp. Typically, these filaments present an initial low value (a
few Ohms) that will increase by four to five times during the preheating phase.
After the preheating phase, the lamp must be ignited by increasing the voltage across it. The
ignition voltage value also depends on the type of lamp, and it increases with the aging of
the lamp. For a typical TL 58 W, the ignition voltage value is not much less than 1000 V.
When a simple inverter with a constant switching frequency is used, external circuitry is also
necessary (for example, a PTC or discrete timer). However, with ST’s L6574 smart
controller, both the preheating and ignition functions are achieved by using simple resistors
and a capacitor, which set all the start-up procedures.
4/27
Doc ID 5656 Rev 10
AN993
2
L6574 ballast driver
L6574 ballast driver
The L6574, whose internal block diagram is shown in Figure 2, is an IC intended to drive two
power MOSFETs or IGBTs in half-bridge topology, ensuring all the features needed to
properly drive and control a fluorescent bulb. Moreover, by varying the switching frequency,
it is possible to modulate the current in the lamp and as a consequence, the output power as
well. The device is available in DIP16 and SO16N packages.
The L6574 has the following distinctive features.
●
High voltage rail up to 600 V
●
dV/dt immunity ± 50 V/ns in full temperature range
●
Driver current capability (250 mA source and 450 mA sink)
●
Switching times 80/40 ns rise fall with 1 nF load
●
CMOS shutdown input
●
Under-voltage lock-out
●
Preheat and frequency shifting timing
●
Sense operational amplifier for closed-loop control or protection features
●
High-accuracy current-controlled oscillator
●
Integrated bootstrap diode
●
Clamping on VS
●
SO16, DIP16 package.
Figure 2.
Internal block diagram of the L6574
H.V.Bus
VS
OPOUT
OPIN-
OP AMP
+
5
16 Vboot
12
-
6
BOOTSTRAP
DRIVER
UV
DETECTION
OPIN+
15 HVG
HVG
DRIVER
7
14 OUT
Imin
Rign
VREF
DRIVING
DEAD
TIME
4
Ifs
Imax
LEVEL
SHIFTER
LOGIC
Cboot
LOAD
VS
11
LVG
10
GND
8
EN1
9
EN2
Ipre
LVG
DRIVER
VREF
+
Rpre
2
CONTROL
LOGIC
Vthpre
+
VTHE
+
-
+
-
3
VTHE
VCO
Cf
1
Cpre
AM01310v1
Doc ID 5656 Rev 10
5/27
L6574 ballast driver
Figure 3.
AN993
Connection of a typical application
+
HVBus
D1
CSnub
CSupply
CBoot
D2
Qh
2
16
12
15
Rgh
R1
L_ballast
14
7
Ql
Rpre.
6
L6574
Rgl
R5
8
5
R6
D3
9
4 3
Ref.
Cb
11
1
Cres
LAMP
D4
10
R2
C3
C1
Rign.
Cf
Cpre
R4
R9
R7
C2
Rcs
R3
C4
R8
AM01311v1
Table 1.
Number
Name
Function
Cpre
Preheat timing capacitor. The capacitor Cpre sets the preheating and the frequency
shift time, according to the relations: tpre= Kpre· Cpre and tSH= KFS· Cpre (typ. Kpre=
1.5 s/ ∝F, KFS= 0.15s/∝F). This feature is obtained by charging Cpre with two different
currents. During tpre, this current is independent of the external components, so Cpre
is charged up to 3.5 V (preheat timing comparator threshold). During tSH, the current
depends on the value of Rpre (that is, on the difference between fpre and fign). In this
way tSH is always set at 0.1tpre. In steady state the voltage at pin 1 is 5 V (see
Figure 5).
2
Rpre
Maximum oscillation frequency setting. The resistance connected between this pin
and ground sets the fpre value, fixing the difference between fpre and fign(fpre> fign). At
the end of the start-up procedure, the effect current drown from Rpre is over. The
voltage at this pin is fixed at VREF = 2 V.
3
CF
Oscillator frequency setting. The capacitor CF, along with to Rpre and Rign, sets fpre
and fING. In normal operation this pin shows a triangular wave.
4
Rign
Minimum oscillation frequency setting. The resistance connected between this pin
and ground sets the fign value. The voltage at this pin is fixed at VREF = 2 V.
5
OPout
Out of the operational amplifier. To implement a feedback control loop this pin can be
connected to the Rign pin by means of appropriate circuitry.
6
OPin-
Inverting input of the operational amplifier.
7
OPin+
Non-inverting Input of the operational amplifier.
1
6/27
Description of device pins
Doc ID 5656 Rev 10
AN993
Table 1.
Number
L6574 ballast driver
Description of device pins (continued)
Name
Function
8
EN1
Enable 1. This pin (active high), forces the device into a latched shutdown state (like
in undervoltage conditions). There are two ways of resuming normal operation: the
first is by reducing the supply voltage below the undervoltage threshold and then
increasing it again until the valid supply is recognized; the second is by activating the
EN2 input (see Figure 9). The Enable 1 is specifically designed for strong faults (for
example, in case of lamp disconnection).
9
EN2
Enable 2. EN2 input (active high) restarts the start-up procedure (preheating and
ignition sequence). This feature is useful if the lamp does not turn on after the first
ignition sequence (see Figure 10).
10
GND
Ground.
11
LVG
Low-side driver output. This pin must be connected to the low-side power MOSFET
gate of the half bridge. A resistor connected between this pin and the power
MOSFET gate can be used to reduce the peak current.
12
VS
Supply voltage. This pin is connected to the supply filter capacitor (15.6 V typical).
13
N.C.
Not connected. This pin sets a distance between the pins related to the high-voltage
side and those related to the low-voltage side.
14
OUT
High-side driver floating reference. This pin must be connected close to the source of
the high-side power MOSFET or IGBT.
15
HVG
High-side driver output. This pin must be connected to the high-side power MOSFET
gate of the half bridge. A resistor connected between this pin and the power
MOSFET gate can be used to reduce the peak current.
VBOOT
Bootstrapped supply voltage. The bootstrap capacitor must be connected between
this pin and OUT. A patented integrated circuit replaces the external bootstrap diode
by means of a high-voltage DMOS, synchronously driven with the low-side power
MOSFET.
16
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Device block description
3
AN993
Device block description
The preheating control section and the bootstrap section are tightly linked to the
application’s design. This chapter describes their workings and usage.
3.1
Preheating and ignition section
The L6574’s turn-on sequence is divided into three phases: the preheating phase, the
ignition phase and the normal operation phase (Figure 4). The preheating phase is
characterized by the highest oscillation frequency (fmax) for a period Tpre. During the ignition
phase, the frequency shifts from fmax to fmin (which is the normal operating frequency) in a
period Tsh.
Figure 4.
Startup timing diagram and EN2 function
Power-O.K.
VSupply
V(Cpre)
preheating
Osc.
freq.
steady state operation
ignition
fMAX
fMIN
IL
TPRE
●
T pre = K ⋅ C pre
●
T IGN = 0.1 ⋅ T pre
Time
AM01312v1
All the above-mentioned parameters are set by carefully selecting a few external
components. Tpre and Tsh are set by means of the capacitor Cpre that is connected to pin 1.
During the preheating phase (Tpre) the capacitor Cpre is charged by means of a constant
current Ipre, which is generated internally and does not depend on any external components.
The voltage across Cpre increases linearly up to the "preheating threshold" at which the
preheating phase terminates.
Equation 1
8/27
Doc ID 5656 Rev 10
AN993
Device block description
That is to say:
Equation 2
Figure 5.
Timing block
Ifs
Ipre
Cpre
DISCHARGE
AM01313v1
Figure 6.
Timing oscillator block
TIMING
Imax
Imin
gm
Iosc
OSC
Cpre
AM01314v1
After the preheating time, the capacitor Cpre is first quickly discharged and then recharged
by the current Ifs, generating a second voltage ramp which feeds a transconductance
amplifier, as shown in Figure 6 (the switch is closed). Thus, this voltage signal is converted
into a growing current which is subtracted from Imax to produce the frequency shifting from
fmax to fmin. The current that drives the oscillator to set the frequency during this shifting is
equal to:
Equation 3
Doc ID 5656 Rev 10
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Device block description
AN993
Where:
Equation 4
Rign and Rpre are the resistors connected to pin 4 and pin 2.
At the end of the preheating time (t = Tpre), the L6574 oscillates at fmax, set by:
Equation 5
This means that the preheating frequency depends on both Rpre and Rign.
At the end of the frequency shifting (t = Tpre + Tsh), the second term of Equation 3
decreases to zero and the switching frequency is set only by Imin (that is, Rign).
Equation 6
Since the second term of Equation 3 is equal to zero, we have:
Equation 7
Note that there is no fixed voltage threshold across Cpre in which the ignition phase finishes
(that is, the end of the frequency shifting): Tsh depends on Cpre, Imax, gm, and Ifs
(Equation 7). This fact is also verified in Figure 7. By making Tsh independent of Imax, the Ifs
current has been designed to be a fraction of Imax, therefore:
Equation 8
In this way, the frequency shifting time depends only on the capacitor Cpre. The typical value
of the kfs constant (frequency shift timing constant) is 0.15 s/µF, that is:
Equation 9
So when choosing Cpre, both Tpre and Tsh are set.
The frequencies fmin and fmax depend on the resistors Rpre and Rign, but also on the
capacitor Cf (oscillator frequency setting -> capacitor at pin 3). fmin is set by choosing Cf and
Rign, then with Rpre the Δf = fmax - fmin is set.
Simplified equations can be used.
10/27
Doc ID 5656 Rev 10
AN993
Device block description
Equation 10
Equation 11
These equations fit well with the measured values, especially in the frequency range of 30 to
100 kHz. Figure 8 shows a comparison between the measured and computed data of fmin
(at Cf = 470 pF).
Figure 7.
Cpre voltage and frequency
shifting
Figure 8.
Operating frequency at Cf =
470 pF
120
V(Cpre)
measured values
computed values
time
freq
fmin(kHz)
100
80
60
preheating
ignition
40
20
40
time
60
80
Rign (kΩ)
AM01315v1
100
120
AM01316v1
To summarize:
Table 2.
Parameter dependencies
Parameter
Set by choosing...
Tpre
Cpre
Tsh
Cpre
Δf = fmax - fmax
Rpre
fmin
Rign and Cf
If Rpre is not connected at pin 2, there is no Δf, so fmax and fmin have the same value.
Furthermore, there is no Imax, that is to say there is no Ifs current. In this case, Cpre is
charged only once by Ipre = 2.3 µA up to 3.5 V (Figure 7 shows the first voltage rise only).
When Cpre is discharged, no Ifs current is present to recharge it. If Rpre is connected after
the preheating and ignition phases, pin 1(Cpre) is at 4.8 to 5 V with a current capability of a
few µA (1/6 IRpre). If Rpre is not connected, Cpre is at GND level in the normal operation
phase.
Doc ID 5656 Rev 10
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Device block description
3.2
AN993
Control section
The L6574 has two control functions, EN1 and EN2. Both functions are active high. To fully
understand how these functions work, refer to Figure 9 and Figure 10.
●
EN1 (latched enable) is dedicated to stopping all device functions and is usually
activated when a strong fault is detected (for example, when the lamp is disconnected).
This status can be cancelled in two different ways: either by reducing the supply voltage
below its minimum threshold, or by activating the second control pin EN2 (EN2
overrides EN1). When the device restarts, the start-up sequence is reactivated.
●
EN2 (repeating startup) is dedicated to restarting the preheating and ignition
procedure; it is normally activated when the application fails to ignite the lamp. When
EN2 is activated the starting procedure restarts. The L6574 operates to the maximum
frequency all the while that EN2 remains active.
Figure 9.
Controls timing diagram
VSupply
LVG
HVG
Latched enable
EN1
Forced restart
EN2
Time
12/27
Doc ID 5656 Rev 10
AM01318v1
AN993
Device block description
Figure 10. Startup timing diagram and EN2 function
VSupply
preheating
V(Cpre)
fMAX
ignition preheating
ignition
fMIN
Foult-ignition
EN2
IL
TPRE
TIGN (TSH)
Time
AM01317v1
3.3
Bootstrap section
Bootstrap circuitry is needed to supply the high-voltage section. This function is normally
accomplished by a high-voltage fast-recovery diode (Figure 11). In the L6574, a patented
integrated structure replaces the external diode. It is realized by means of a high-voltage
DMOS, driven synchronously with the low-side driver (LVG), with a diode connected in
series, as shown in Figure 12. An internal charge pump (Figure 12) provides the DMOS
driving voltage.
The diode connected in series to the DMOS has been added to avoid it being unintentionally
turned on.
3.3.1
Cboot selection and charging
To choose the proper Cboot value, the external MOS can be seen as an equivalent capacitor.
This capacitor Cext is related to the total gate charge of the MOS.
Equation 12
The ratio between the capacitors Cext and Cboot is proportional to the cyclical voltage loss. It
has to be:
Equation 13
For example, if Qgate is 30 nC and Vgate is 10 V, Cext is 3 nF. With Cboot = 100 nF, the drop
would be 300 mV.
Doc ID 5656 Rev 10
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Device block description
AN993
If the HVG needs to be supplied for a long period of time, the Cboot selection also has to take
into account the leakage losses.
The internal bootstrap driver has great advantages: the external fast-recovery diode can be
avoided (it usually has great leakage current). This structure can only work if Vout is close to
GND (or lower) and if in the meanwhile the LVG is on. The charging time (Tcharge) of the
Cboot is the time in which both conditions are fulfilled and it has to be long enough to charge
the capacitor.
The bootstrap driver introduces a voltage drop due to the DMOS RDS(on) (typical value at
25°C is 150 Ω). At low frequencies, this drop can be neglected, but must be taken into
account when the frequency is increased.
The following equation is useful to compute the drop on the bootstrap DMOS.
Equation 14
Q gate
V drop = I ch arg e R DS ( on ) → V drop = ----------------------- R DS ( on )
T ch arg e
where Qgate is the gate charge of the external power MOSFET, RDS(on) is the on resistance
of the bootstrap DMOS, and Tcharge is the charging time of the bootstrap capacitor.
For example: using a power MOSFET with a total gate charge of 30 nC, the drop on the
bootstrap DMOS is about 1 V if the Tcharge is 5 µs. In fact:
Equation 15
Vdrop has to be taken into account when the voltage drop on Cboot is calculated: if this drop
is too high or if the charging time is insufficient, an external diode can be used.
Figure 11. External bootstrap diode
connection
Figure 12. L6574 integrated bootstrap
diode connection
DBOOT
VS
VBOOT
VS
VBOOT
H.V.
H.V.
HVG
HVG
CBOOT
CBOOT
VOUT
VOUT
TO LOAD
TO LOAD
LVG
LVG
EX_D99IN1056
AM01319v1
14/27
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AM01320v1
AN993
Description of the demonstration application
The design has been developed to drive a TL fluorescent lamp up to 58 W. It is composed of
two sections: the PFC, using the L6561 controller, and the ballast, based on the L6574 (see
Figure 13 and Figure 14). The application is provided with a current feedback that can be
used to control the power (and, if necessary, the dimming function) by varying the switching
frequency during normal burning of the lamp. The application is also provided with a safety
circuitry that gets activated when an open load or faulty ignition of the lamp is detected.
1N4148
C16
0.47
μF
R25
20K
R28
3.9k
R29
6.8k
5
4
LAMP
RS_2
0.68
C15
330nF
R20
6.8k
9
C12
470pF
R19 10k
C13
1μF
10
1
3
R18
100k
R16
100k
D4
1N4148
4
5
C9
8.2nF
C8
100nk
D99IN1064
C2
10nF
R3
10k
R8 10k
C3 220nF
C4 680nF
2
6
Fuse
C1
330nF
400V
3
L6561/2
1
4
7
8
5
R4
120K
R2
750k
SENSE
RS_1
R11
9.53K
R10
750K
R13
1.5k
P1
4.7K
C6
22μF
450V
R9
750K
D1
1N4148
R7 22
C5
100nF
R5
120K
R6
68K
R1
750k
Bridge B1
R23 1k
Q3
STP4NB50/
STP4NK50Z
8
L6574
6
7
R12
82k
C7
4.7μF
25V
DZ1
14V
NTC
5
D3
1N4148
C10
4.7nF
R15 10k
R17 47
R14 10
D2 STTH1L06
T1 1.2mH (E25*13*7)
11
14
R22
22
Q2
STP4NB50/
STP4NK50Z
2
C19
100nF
12
C11
680pF 630V
16
15
C12
100nF
R21
22
D5
R24
390k
R26
750k
R27
750k
2
L2_2.1mH
1
C17
100nF
250V
C18
8.2nF
1600V
Figure 13. Demonstration application circuit
Q1_STP6NB50/
STP5NK50Z
4
Description of the demonstration application
AM01321v1
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Description of the demonstration application
AN993
Figure 14. PCB and components layouts
41mm
Component layer
Solder layer
190mm
AM01322v1
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4.1
Description of the demonstration application
Power factor section
Even if the PFC stage is not strictly necessary for electronic ballast applications, in this
design it has been introduced for the following reasons.
The PFC stage is necessary if the ballast input power is higher than 25 W. This provides
many benefits.
The front-end stage of conventional off-line converters, typically made up of a full wave
rectifier bridge with a capacitor filter, gets an unregulated DC bus from the AC mains.
Therefore, the instantaneous line voltage will be below the voltage on the capacitor most of
the time, which means that the rectifiers will only conduct for a small portion of each line’s
half-cycle. The current drawn from the mains will then be a series of narrow pulses whose
amplitude will be 5-10 times higher than the resulting DC value.
Lots of drawbacks result from this: much higher peak and RMS current drawn from the line,
distortion of the AC line voltage, overcurrents in the neutral line of the 3-phase systems, all
contributing to a poor utilization of the power system's energy capability.
This energy capability can be measured in terms of either total harmonic distortion (THD),
as norms provides for, or power factor (PF), intended as the ratio between the real power
(the one transferred to the output) and the apparent power (RMS line voltage times RMS
line current) drawn from the mains, which is more immediate. A traditional input stage with a
capacitive filter has a low PF (0.5-0.7) and a high THD (> 10%).
The new European norms and the international standard requirements have spurred the
design of high-power factor ballasts and are starting to impose a limit on the input current
harmonic content. For these reasons, power factor correctors (PFC) are now being widely
diffused in consumer and industrial lighting. With a high power factor switching preregulator, interposed between the input rectifier bridge and the bulk filter capacitor, the
power factor is improved (by up to 0.99). The current capability is increased, while the bulk
capacitor peak current and the harmonic disturbances are reduced.
The L6561/2 is an IC intended to control PFC pre-regulators by using the transition mode
technique and is optimized for lamp ballast applications.
The operation is summarized below (for more information, see AN966). The AC mains
voltage, that can range from 85 V to 265 V, is rectified by a diode bridge and delivered to the
boost converter.
The boost converter consists of a boost inductor (T1), a controlled power switch (Q1), a
catch diode (D2), an output capacitor (C6) and, obviously, control circuitry (see Figure 3).
The PFC section has been designed to supply a 400 V DC and a power of 60 W.
4.2
Ballast section
The regulated voltage is delivered to the ballast section. The ballast is based on the highperformance L6574, an offline half bridge driver designed using 600-V BCD technology. It
adds to the fully-integrated half-bridge driver topology a built-in voltage controlled oscillator
(VCO), a preheating start-up procedure and an operational amplifier dedicated to the
feedback loop. To avoid cross-conduction of the power MOSFETs or IGBTs, the internal
logic ensures a minimum dead time.
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Description of the demonstration application
AN993
The load consists of a series resonant circuit (L2-C18) with the lamp connected across the
capacitor (C18). This topology allows operation in zero voltage switching mode, to reduce
the transistor switching losses and the electromagnetic interference generated by the output
wiring of the lamp.
The blocking capacitor (C17) allows a zero average lamp current. In steady state the voltage
across these capacitors is as high as half the high voltage bus, approximately 200 V.
4.3
Preheating and ignition sequence
The turn-on sequence can be divided in three phases: preheating, ignition and normal lamp
burning. The preheating of the lamp filaments is achieved by a high switching frequency fpre,
about 60 kHz, set by Rpre = R12+ P1 + R13 and CF = C12, to ensure that a current flows in
the filaments without lamp ignition. In fact, the initial voltage applied across the lamp is
below the strike potential. The duration of the preheating period Tpre is set by the capacitor
Cpre = C13. The choice of this time is strictly dependent on the type of lamp. In the
application Tpre has been set to 1.5 sec.
The ignition sequence begins after Tpre. The switching frequency decreases towards the
resonance point (L2-C18), increasing the voltage across the lamp and causing the ignition.
The time interval in which the frequency shifts, tsh, amounts to tsh = tpre/10 = 150 ms. At the
end of tsh the frequency reaches 31 kHz (R18-C12), and the current feedback loop is then
activated.
4.4
Current feedback loop
The current control is achieved by varying the switching frequency of the VCO. Since
controlling the average current in the lamp means controlling the output power, it is quite
easy to perform the control function. The operational amplifier compares the low-pass
filtered half-bridge current with a reference, achieved by a portion of the voltage at pin 2
(VPIN2 = 2 V). This set-point could be changed by the trimmer P1 to perform the dimming
function. The amplifier’s output is connected to the RING pin by D4 and R16. The diode D4 is
necessary to prevent the switching frequency from decreasing to below the value set by
R18.
At start-up the voltage across RS2 (Figure 15) remains low until the lamp ignites. As such,
the inverting input of the amplifier (pin 6) also stays low, while the non-inverting input (pin 7)
is set to a constant voltage (set-point) by the divider R12, P1 and R13.
Therefore, the amplifier’s output (pin 5) remains high (5 V) until the lamp ignites, and D4 is
off. In this condition, the L6574 oscillates at fpre.
Once the lamp strikes on (after tpre and tsh), the average voltage across RS2 increases and
the feedback can regulate the lamp’s current.
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Description of the demonstration application
Figure 15. Current feedback loop
Q3
STP4NB50
R19 10k
C9 8.2nF
R16 100K
R18 100K
D4
1N4148
RS_2
0.68
6
5
-
7
+
RIGN
4
AM01323v1
Figure 16. Cpre waveform (Ch1) and amplifier output (Ch2)
AM01324v1
4.5
Start-up and supply
The start-up procedure is very important in an application that contains two different
sections.
The ballast section starts before the PFC, avoiding any extra voltage at the output of the
PFC section, and so the L6561 dynamic OVP activation (see AN966). This behavior is
guaranteed under all conditions because the VS turn-on threshold of the L6574 is lower
than that of the L6561/2.
At start-up, the L6574 is powered by the resistor (R4 + R5). This resistor must be chosen so
as to ensure the "before start-up current" of both the L6561 and L6574.
When the ballast section is running, the charge pump (C11, R14, R17, D3 and DZ1)
enables supply to both devices. R17 and C10 enable reduction of noise at VCC.
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Description of the demonstration application
4.6
AN993
Safety circuitry
In normal operation the inductive load ensures a zero voltage switching mode, but if the
lamp is disconnected the switching losses in the power MOSFETs will increase
considerably. To prevent this occurrence, a safety circuitry has been designed. When the
lamp is connected the EN1 input (pin 8) of the L6574 is held close to ground by the series of
R29, the lamp filament and RS2. If the lamp is not present, EN1 is pulled up to VS by R24,
forcing the L6574 into a latched shutdown state. To resume normal operation, the ballast
must be turned off, and then on again.
A second alarm has been designed to protect the application against any extra voltages
which can arise if the lamp does not strike after the ignition sequence, for instance if the
lamp is old. A partition of this extra voltage is rectified and delivered to the EN2 input (pin 9)
of the L6574, restarting the start-up procedure (preheating and ignition sequences).
Figure 17. Open load safety circuit
+VS
C19
8.2nF
1600V
LAMP
R24
390K
EN1 (PIN8)
R29
6.8K
C16
.47uF
R25
20K
D98IN816A
AM01325v1
Figure 18. Extra voltage safety circuit
L2 2.1mH
C17
100nF
250V
R26
750K
R27
750K
R23 1k
D5 1N4148
LAMP
C18
8.2nF
1600V
EN2 (PIN9)
R20
6.8K
C15
330nF
R28
3.9K
AM01326v1
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Design tips
5
Design tips
5.1
Inductance and capacitor evaluation
To design an application with the L6574, a preliminary evaluation of the components can be
done by fixing the lamp type and its electrical characteristics only.
This evaluation is an "iterative" process because some assumptions have to be made that
need to be checked at the end of the process. Figure 19 shows a simplified schematic of the
load.
Figure 19. Simplified schematic of the lamp
L
lamp
L
C
r
rr
C
r
Cb
Cb
AM01327v1
In Figure 19 r is the lamp filament resistance, rr is the operating lamp equivalent resistance
when the lamp is off or during preheating. rr is an open circuit.
First of all, one has to evaluate a proper inductance value.
L has to provide the right current value to the lamp when it is already ignited and is working
("choke" inductance). Therefore, L depends on the current required by the lamp, that is to
say on the lamp’s operating wattage and voltage, on the operating frequency fmin, but also
on the voltage across L and the lamp (Vb). The greater the Vb variation, the greater the
inductance required to give a constant current to the lamp. Vb variations are due to the highvoltage bus variations and to the ripple on the half battery capacitor (Cb). The ripple
depends on the size of Cb and a proper hypothesis has to be done on it to estimate the
variation of Vb. Taking into account all this data and hypothesis, one can assume that during
an operating condition most of the current flows into the lamp, not into C, and all the power
delivered to the system is delivered to the lamp. Vlamp is the operating voltage across the
lamp and Plamp is the operating lamp wattage, so a good approximation to conduct the
choke inductance is:
Equation 16
The second step is the evaluation of the capacitance across the lamp (C).
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Design tips
AN993
When the lamp is not yet ignited, C has to allow a sufficient current to flow into the lamp
filament in order to preheat correctly. The power to be delivered to the lamp filaments (Pfil),
the preheating frequency, the lamp filament resistance r and the maximum voltage to be
applied across C without causing lamp ignition are constraints that help to evaluate the size
of the capacitor. By setting the current through the lamp filament and the maximum voltage
across the capacitor, one obtains a range of capacitor values.
Equation 17
These L, Cb and C values have to be corrected to obtain standard and commercial
component values.
Using these values and lamp equivalent resistances, the transfer functions during the
preheating and operating conditions can be calculated.
The preheating transfer function allows you to see if, when moving towards the resonant
frequency (L-C), there is a frequency at which the voltage across the lamp enables its
ignition. This frequency has to be between fmax and fmin. The gain of the transfer function
depends on r also, but r changes greatly during the preheating phase (also 3 to 4 times) and
this must be taken into consideration (see Figure 20).
Figure 20. Preheating transfer function
Vlamp
Vin
F=F(L,C,[email protected])
F=F(L,C,[email protected])
freq
1/2∗π∗ sqrt(L∗C)
fmin
fpre
frequency shifting during Tsh
AM01328v1
The operating transfer function can be used to check if the operating voltage across the
lamp (at f = fmin) is similar to the one used to evaluate L (Figure 21).
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Design tips
Figure 21. Operating transfer function
Vlamp
Vin
freq
f = f(L,C,rr)
fmin
AM01329v1
If one of these conditions is not verified, the evaluation process has to be redone changing
the initial hypothesis (frequencies or assumption on the Cb ripple). If everything concords,
the values found can be used and a preliminary stage of design can be concluded. Further
experiments may be required and the initial assumptions may need to be verified to correctly
set the components and frequency values, and if necessary another evaluation process
reiterated with better assumptions.
The following flow chart can help the iteration process.
Figure 22. Iterative process
DATA:
operating lamp elec.characteristic
HVB
HYPOTHESIS:
fmin
Cb
L evaluation
DATA:
ignition and preheating lamp elec.characteristic
HYPOTHESIS:
fpre
C evaluation
Transfer preheating funct.
OK
Transfer operating funct.
OK
check on board
OK
AM01330v1
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Dimming the lamp
6
AN993
Dimming the lamp
The lamp is dimmed by changing the working frequency. The minimum working frequency
is:
Equation 18
To change the working frequency, one has to change the current that flows from pin 4. Using
the circuitry shown in Figure 15, the current that flows from pin 4 also depends on the
amplifier’s out pin (pin 5) voltage: if V5 > V4, there will be no current in R16 and the
frequency will be equal to fmin. On the other hand, when the amplifier’s out voltage goes
lower than V4, the current that flows from pin 4 will go into R16 and R18. Pin 4 sees the
parallel between R18 and an equivalent resistor that depends on V5 and on the voltage of
D4 .
Equation 19
4
4
So the working frequency will be:
Equation 20
and the max fworking is obtained when V5 = 0 V.
For example, we can calculate a maximum frequency of ~53 kHz (V4 = 2 V and assuming
Vdiode3 = 0.5 V).
The dimming level is set by changing the value of the P1 potentiometer, which causes the
amplifier’s positive reference to change from 20-30 mV to 110-120 mV. If R16 is lowered, the
maximum working frequency is increased and the dimming level lowered as well (the higher
the frequency, the lower the current in the lamp’s arc).
If one tries to dim the lamp towards a low power range (<20% of the electrical arc power) a
common effect is the presence of stationary waves along the lamp tube and/or some
flickering effects.
A common trick to get rid of these disturbances is to add a small continuous current flow
inside the lamp (a few mA). The easiest way to do this is to add a resistor in parallel to the
half battery capacitor (C17 in Figure 13 and Figure 18). For instance, one can add 50 kΩ
(I = 200 V/50 kΩ = 4 mA), which is already very effective. Of course, the resistor has to be
able to sustain the power dissipation caused by the current flow, so it is common to use
many resistors connected in parallel.
Remember that this is only a tip. It helps but is not enough, and should be used together
with the right frequency settings that must be chosen according to the type of lamp.
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6.1
Dimming the lamp
Dimming level and lamp turn-on
During the start-up sequence the frequency always goes from fmax to fmin, regardless of the
dimming level, and it is only after this that the lamp’s turn-on frequency moves towards
higher frequencies. The delay during which f = fmin allows the lamp to turn on, but has the
drawback of causing a "flash" that can be unpleasant. As the minimum length of this delay
depends on the type of lamp, it is better to set it as low as possible, finding the best
compromise.
The easiest way to set this delay is to act on the amplifier’s compensation, that is, on C9: the
higher C9, the longer the delay and the easier the lamp turn-on. Values up to 200 nF and
more are commonly used.
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Revision history
7
AN993
Revision history
Table 3.
26/27
Document revision history
Date
Revision
Changes
21-Jun-2004
9
Changed: figure 12 to 17 and changed formula on the page 19
13-Jul-2009
10
Document reformatted.
English reviewed.
Modified: Equation 19 and Section 6.
Doc ID 5656 Rev 10
AN993
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