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STEVAL-IDI004V2
Wireless bridge 868 MHz
Data brief
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Features

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STM32F103 microcontroller as bridge
between communication protocols
SPWF01SA.11 module for Wi-Fi
communication:

2.4 GHz IEEE 802.11 b/g/n Wi-Fi

Pre-certified RF module (FCC, IC, CE)

Integrated TCP/IP

AT commands

TLS/SSL for end-to-end security

Over-the-air firmware updates
SP1ML-868 module for Sub-GHz RF
communication:

868 MHz ETSI-certified module

Based on Sub-GHz SPIRIT1
transceiver, STM32L1 ULP MCU and
balun (BALF-SPI-01D3)

Chip antenna

Simple AT commands
December 2015
SPBT2632 module for Bluetooth
communication:

Bluetooth® Classic 3.0 version

AT commands

CE, FCC, IC, TELEC certified

Low-power mode supported
Supports NFC communication with the
CR95HF and 13.56 MHz inductive etched
antenna
Configuration using a PC GUI (by request)
through USB VCOM
Android application to access sensor node
data via Bluetooth on request
Works as a root node for the mesh network
using sensor node evaluation board (part
number STEVAL -IDI002V2/3V2)
RoHS compliant
Description
The STEVAL-IDI004V2 wireless bridge
evaluation kit is an Internet of Things (IoT) Home
Bridge which supports the Wi-Fi, Sub-GHz,
Bluetooth and NFC communication protocols.
The device is suitable for various smart home,
smart city and industrial applications.
The system uses an STM32F103 microcontroller
as a bridge between the various communications
modules. The Wi-Fi, Bluetooth and Sub-GHz
certified modules are connected through a UART
interface to the STM32 microcontroller. The NFC
transceiver module is connected through an SPI
interface.
DocID028388 Rev 2
For further information contact your local STMicroelectronics sales
office
1/7
www.st.com
Schematic diagrams
STEVAL-IDI004V2
Detailed description
The evaluation kit supports the following communication protocols:
1.
2.
3.
4.
Wi-Fi communication @ 2.4 GHz IEEE 802.11 b/g/n using the SPWF01SA
Sub GHz communication @ 868 MHz low power RF using the SP1ML-868
Bluetooth communication @ 2.4 GHz, v3.0 compliant using the SPBT2632C2A
NFC communication @ 13.56 MHz using the CR95HF
The board can be connected to the PC through a USB VCOM interface. The Wi-Fi
configuration parameters and the mesh node configuration can be programmed through
the available PC GUI (by request). Debug log messages can also be collected through the
GUI. The sensor data from any node in the mesh network (6LowPAN Contiki 3.0) is
accessible through an Android application over a Bluetooth interface. The board is powered
by a 5 V, 1 A wall adapter. The status of the various communication interfaces is indicated
using five LEDs mounted on the board.
Figure 1: Wireless Bridge WiFi/NFC/BT/RFSubGHz scenario
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DocID028388 Rev 2
STEVAL-IDI004V2
Schematic diagrams
3V3
C11
C12
C13
C14
C15
100nF 0402
J13
3V3
U4
VDD_3
VSS_3
PB9
PB8
BOOT0
PB7
PB6
PB5
PB4
PB3
PD2
PC12
PC11
PC10
PA15
PA14
100nF 0402 100nF 0402 100nF 0402 100nF 0402
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
C10
4.7uF/10V
GSPG170915 1155SG
PB8_SW_CNTRL
BOOT0
PB7_I2C_SDA
PB6_I2C_CLK
PB5_SPI3_MOSI
PB4_SPI3_MISO
PB3_SPI3_SCK
PD2_BT_BOOTLOADER
PC12_BT_RESET
PC11_UART4_RX
PC10_UART4_TX
PA15_SPI3_NSS
SYS_JTCK_SWCLK
3V3
Figure 2: Microcontroller section
R9
1
BOOT0
2
3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
PC13_SPW_SWDIO
PC14_SPW_SWCLK
PC15_SPW_BOOT0
SYS_OSC_IN_PD0
SYS_OSC_OUT_PD1
NRST
10K
Shor t 2 and 3 t o boot f r om f l ash
DNM, SWD
C18
20pF
PC1_WAKEUP
PC2_WF_RESET
SYS_OSC_IN_PD0
3V3
PA0_USART2_CTS
PA1_USART2_RTS
PA2_USART2_TX
Y1
8MHz
R10
VBAT
PC13_ANTI_TAMP
PC14_OSC32_IN
PC15_OSC32_OUT
PD0_OSC_IN
PD1_OSC_OUT
nRST
PC0
PC1
PC2
PC3
VSSA
VDDA
PA0_WKUP
PA1
PA2
SYS_OSC_OUT_PD1
VDD_2
VSS_2
PA13
PA12
PA11
PA10
PA9
PA8
PC9
PC8
PC7
PC6
PB15
PB14
PB13
PB12
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
3V3
SYS_JTMS_SWDIO_PA13
PA12_USB_DP
PA11_USB_DM
PA10_USART1_RX
PA9_USART1_TX
PA8_WKUP_SP1MOD
D8
R30
1K
PC7_MODE1_SP1MOD TEST_LED2
PC6_GPIO0_SP1MOD
PB15_MODE0_SP1MOD
PB14_UART3_RTS
PB13_UART3_CTS
PB12_USB_PU
PA3
VSS_4
VDD_4
PA4
PA5
PA6
PA7
PC4
PC5
PB0
PB1
PB2
PB10
PB11
VSS_1
VDD_1
C19
20pF
390
PA3_USART2_RX
NRST
PUSH BUTTON
C25
100nF 0402
R11
10K
3V3
3V3
PA4_GPIO6_WIFI
17
18
19
20
21
PA6_GPIO1_SP1MOD
22
PA7_NRESET_SP1MOD
23
PC4_BOOTMODE_SP1MOD 24
PC5_LED_ERROR
25
26
27
28
PB10_UART3_TX
29
PB11_UART3_RX
30
31
3V3
32
SW1
Configure as OUT_OD pins,
PA7_NRESET_SP1MOD,
PC12_BT_RESET and
PC2_WF_RESET
STM32F103RET6
Figure 3: NFC section
21
ST_R1
31
C47
43pF
50V
RX1
TX1
R17
19
20
DN M, 3.3K 1%
PB4_SPI3_MISO
PB5_SP I3_ MOSI
PB3_SPI3_SCK
PA15_ SPI3_NSS
16
17
18
15
PC11_ UART4_ RX
PC10_ UART4_TX
14
12
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
UART_TX/IRQ_O UT
UART_RX/IRQ_IN
2
6
L14
560 nH
C42
120 pF
0402 50V
C44
DN M
C48
43pF
50V
C43
C45
120 pF
DN M
0402 50V
C52
C53
82pF
50V
DN M
50V
R21
1K8
L13
1.1µH 13 .56 MHz , PCB Antenna
C51
DN M
R22
300 R
GND
GND
3
4
7
10
11
23
24
25
26
27
28
3V3
3V3
L15
FERR ITE BEA D
33
8
22
XOUT
GND _RX
R20
3.3K 1%
VPS _MAIN
5
1
L12
560 nH
CR 95 HF
XIN
R23
3.3K 1%
TX2
RX2
30
R19
10K
SSI_0
SSI_1
SPI_MISO
SP I_MOSI
SPI_SCK
SPI_SS
GSPG1709151400SG
C46
DN M
GND _TX
ST_R0
R18
3.3K 1%
32 VPS _TX
13 VPS _MAIN
9
U6
VP S
R16
3.3K 1%
VPS _MAIN
R3
300 R
VPS _TX
C41
1nF
50V
29
1
Schematic diagrams
VPS _MAIN
L16
FERR ITE BEA D
VPS _TX
Y3
2
1
C49
10 pF
50V
3 27.12 MHz
C54
100 nF
50V
C50
10pF
50V
C55
100 nF
50V
C56
10µF 080 5
C57
100 nF
50V
C58
100 nF
50V
C59
10µF 080 5
CR95HF
DocID028388 Rev 2
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Schematic diagrams
STEVAL-IDI004V2
Figure 4: BT section
Either Mount J4 and J5 or J6 and 7J
U2
1K
CONN_STATUS
1
2
3
4
5
6
7
PC1_WAKEUP
D7
ACT_STATUS
16
15
R28
R29 1K
PB7_I2C_SDA
PB6_I2C_CLK
3V3
GPIO8
LPO
D6
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GND
TX
RX
RTS
CTS
RESET
BOOT
VIN
PA10_USART1_RX
PA9_USART1_TX
14
13
12
11
10
9
8
R4 4K7
STBT2632
C6
PD2_BT_BOOTLOADER
PC12_BT_RESET
3V3
SW3
C7
100nF 0402
C5
100nF 0402
DNM
STBT2632
10uF 0805
GSPG1709151430SG
Figure 5: Wi-Fi section
J12
TDO_SCK3
TCK
TRST_MISO3
TDI
TMS
Ground Paddle
3.3 V
Ground
GPIO6_ADC0
GPIO15_DAC
GPIO5_TXD3
GPIO2_SPICS
GPIO4_RXD3
GPIO1_MOS1
GPIO0_MISO
GPIO13
GPIO14
GPIO7_ADC1
GPIO12_SDA
GPIO11_SCL
RTS1_DP
CTS1_DN
RXD1
GPIO9_ADC3
TXD1
GPIO10
GPIO8_ADC2
RESETn
BOOT0
GPIO3_SCLK
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
3V3
PC13_SPW_SWDIO
PC14_SPW_SWCLK
PC2_WF_RESET
PC14_SPW_SWCLK
1
2
3
4
5
PC13_SPW_SWDIO
Note : Add plenty of ground vias
DNM, SWD
3V3
Optional - Mount only fo
r
firmware upgrade with SW
D
PA4_GPIO6_WIFI
C37
C38
100nF 0402
10µF 0805
LED_DRIVE WiFi Link
R12
1K
LED_DRIVE WiFi_PowerUP
PA0_USART2_CTS
PA1_USART2_RTS
PA2_USART2_TX
R13
1K
GPIO10LED_DRIVE Running
PA3_USART2_RX
R14
1K
R15
4K7
D1
LINK
D2
PUP
D3
RUN
PC2_WF_RESET
PC15_SPW_BOOT0
SW4
U7
C39
100nF 0402
DNM
SPWF01SA.11
GSPG1709151520SG
Figure 6: Sub GHz section
R25
3V3
1K
3V3
D5
U5
1
PA8_WKUP_SP1MOD 2
PC6_GPIO0_SP1MOD
TEST_LED2 PA6_GPIO1_SP1MOD 3
4
PB15_MODE0_SP1MOD
5
PC7_MODE1_SP1MOD6
7
8
TXRXLED
CTS
WKUP
RTS
GPIO0
RXD
GPIO1
TXD
MODE0
RESET
MODE1 BOOTMODE
VDD
SWCLK
GND
SWDIO
C34
C35
10µF 0805
C36
100nF 0402 100pF 0402
PB14_UART3_RTS
PB13_UART3_CTS
PB10_UART3_TX
PB11_UART3_RX
PA7_NRESET_SP1MOD
PC4_BOOTMODE_SP1MOD
SP1MOD_SWCLK
SP1MOD_SWDIO
16
15
14
13
12
11
10
9
J11
3V3
SP1MOD_SWDIO
SP1MOD_SWCLK
PA7_NRESET_SP1MOD
SP1MOD
1
2
3
4
5
DNM, SWD
R27
PC4_BOOTMODE_SP1MOD
Optional - Mount only fo
r
firmware upgrade with SW
D
DNM, 10K
SW2
PA7_NRESET_SP1MOD
DNM
R26
C26
4K7
100nF 0402
SP1ML-868
3V3
GSPG1709151540SG
4/7
DocID028388 Rev 2
STEVAL-IDI004V2
Schematic diagrams
Figure 7: Power supply section
U8 LD1117ADT33TR
F1
J3
3
1
2
3
C60
100nF
C61
10µF 0805
1
D9
3V3
GND
0ZCJ0100FF2E
3V3
2
VOUT
VIN
POWER JACK
SMAJ5.0
Power Supply
R24 160 E
3
3V3
PC5_LED_ERROR
D4
2
1
R33
160 E
LED BI-COLOUR
GSPG1709151550SG
Figure 8: NFC transceiver section (1 of 2)
TP2
TP1
1
1
J1
TEST POINT
TP4
TP3
1
1
TEST POINT
3V3
SYS_JTMS_SW DIO_PA13
SYS_JTCK_SW CLK
NR ST
1
2
3
4
5
TEST POINT
TEST POINT
MOUNTING HOLES
SWD CONNECTOR
GSPG1709151600SG
Figure 9: NFC transceiver section (2 of 2)
3V3
J8
3V3
R31
4K7
R32
4K7
PA10_ USART1_RX
PA9_USART1_TX
PA0_USART2_CTS
PA1_USART2_RTS
PA2_USART2_TX
PA3_USART2_RX
J10
1
2
3
4
5
PB6_I2C_CLK
PB7_I2C_SDA
PB8_SW _CN TRL
3V3
J9
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
CON10
PB10_ UART3_TX
PB11_ UART3_RX
PB14_ UART3_RTS
PB13_ UART3_CTS
PB5_SPI3_MOSI
PB4_SPI3_MISO
PB3_SPI3_SCK
PC12_ BT_RESE T
PC11_ UART4_RX
PC10_ UART4_TX
CON10
DBG CONNECTOR
I2C CONNECTOR
GSPG1709151620SG
Figure 10: USB section
+
C2
4.7µF/10V
C3
4.7nF
USB5V
3
I/O1
2
GND
J2
6
7
C9
4.7nF
SHELL
SHELL
USB_VCC
USBDM
USBDP
ID
USB_GND
1
2
3
4
5
USB5V
USB_DM
USB_DP
1
I/O2
R5
22
VBUS
U3
USB_DM
5
USB5V
PA11_USB_DM
I/O1
4
USB_DM
I/O2
6
USB_DP
R6
PA12_USB_DP
22
USBLC6-2P6
R8
1.5k
R7
1M
C4
15pF
C8
15pF
PB12_USB_PU
USB
GSPG1709151630SG
DocID028388 Rev 2
5/7
Revision history
2
STEVAL-IDI004V2
Revision history
Table 1: Document revision history
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Date
Version
Changes
01-Oct-2015
1
Initial release.
17-Dec-2015
2
Updated title on the cover page.
DocID028388 Rev 2
STEVAL-IDI004V2
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DocID028388 Rev 2
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