LC5830K DATA SHEET
LC5830K
DATA SHEET
Rev.1.0
Rev.1.0
SANKEN ELECTRIC CO., LTD.
http://www.sanken-ele.co.jp
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Page.1
LC5830K DATA SHEET
Rev.1.0
CONTENTS
General Descriptions -------------------------------------------------------------------------- 3
1. Absolute Maximum Ratings -------------------------------------------------------------- 4
2. Recommended Operation Conditions--------------------------------------------------- 4
3. Electrical Characteristics ------------------------------------------------------------------ 5
4. Functional Block Diagram ---------------------------------------------------------------- 7
5. Pin Assignment & Functions-------------------------------------------------------------- 7
6. Typical Application Circuit --------------------------------------------------------------- 8
7. Package Information ----------------------------------------------------------------------- 9
8. Functional Description --------------------------------------------------------------------10
8.1 Settlement of frequency -----------------------------------------------------------------10
8.2 Enable and Dimming---------------------------------------------------------------------11
8.3 Range of Output Voltage ----------------------------------------------------------------11
8.4 Thermal Budgeting -----------------------------------------------------------------------14
8.5 Over Current Protection(OCP) --------------------------------------------------------14
8.6 Component Selections(Peripheral parts) --------------------------------------------14
9. Component Placement and PCB Layout Guidelines -------------------------------17
10. Typical Caracteristics(Ta=25℃) ------------------------------------------------------20
11. The contents of packing specification ------------------------------------------------22
IMPORTANT NOTES -----------------------------------------------------------------------25
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Page.2
LC5830K DATA SHEET
Rev.1.0
Description:
Package:
eSOIC8( Exposed SOIC8)
The LC5830K is a single IC switching regulator that
provides constant-current output to drive high-power
LEDs. It integrates a high-side N-channel DMOS
switch for DC-to-DC step- down (buck) conversion.
A true average current is output using a cycle-by-cycle,
controlled on-time method.
Output current is user-selectable by an external current
sense resistor. Output voltage is automatically adjusted
to drive various numbers of LEDs in a single string.
This ensures the optimal system efficiency.
LED dimming is accomplished by a direct logic input
pulse width modulation (PWM) signal at the enable pin.
The device is provided in a compact 8-pin narrow
SOIC package with exposed pad for enhanced thermal
dissipation.It is lead (Pb) free, with 100% matte tin
leadframe plating.
Electrical Characteristics
Range of the Input Voltage: 6V(MIN) - 48V(MAX)
Internal MOSFET RDS(ON) :250mΩ(TYP)
Io (iLED)=3A
Features and Benefits:
• Supply voltage 6 to 48 V
• True average output current control
• 3.0 A maximum output over operating temperature
range
• Cycle-by-cycle current limit
• Integrated MOSFET switch
• PWM Dimming Freqency: 100 to 2000Hz
• Internal control loop compensation
• Undervoltage lockout (UVLO) and thermal shutdown
protection
• Low power shutdown (1 μA typical)
Applications
•
•
•
•
•
General Illumination
Scanners and multi-function printers (light bars)
Architectural lighting
Industrial Lighting
Display case lighting / MR16
Marking
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Page.3
LC5830K DATA SHEET
Rev.1.0
1. Absolute maximum ratings
Refer to a specification for contents of details.
The polarity of the electric current value prescribes "sink = +" and "source = -" based on the IC.
A condition Ta= 25℃ of the case without special mention.
Table.1
Characteristic
Operating Ambient Temperature
Symbol
VIN
VBOOT
VSW
VCC
VEN, VTON
VCS
PD
TA
Ratings
−0.3～50
−0.3～VIN+8
−1.5～VIN+0.3
-0.3～14
−0.3～VIN+0.3
−0.3～7
2.85
−40～105
Units
V
V
V
V
V
V
W
ºC
Maximum Junction Temperature
Tj(MAX)
150
ºC
Tstg
−55～150
ºC
Rθja
35
ºC/W
Rθjp
2
ºC/W
Input Supply Voltage
Bootstrap Drive Voltage
Switching Voltage
Linear Regulator Terminal
Enable and TON Voltage
Current Sense Voltage
Allowable Power Dissipation
Storage Temperature
Thermal Resistance
(Junction –Air)
Thermal Resistance
(Junction – Pad)
Remarks
Vcc – GND
4-layer PCB based on
JEDEC standard
(1)
But, it is restricted by Junction temperature.
But, thermal protection detection temperature is about 165℃.
(3)
You must use it within Thermal Derating Curve of the fig1.
* Operation at levels beyond the ratings listed in this table may cause permanent damage to the device. The Absolute
Maximum ratings are stress ratings only, and functional operation of the device at these or any other conditions beyond
those indicated in the Electrical Characteristics table is not implied. Exposure to Absolute Maximum-rated conditions for
extended periods may affect device reliability.
(2)
2. Recommended Operation Conditions
Recommended Operation Conditions are the required operating conditions to maintain the normal circuit
functions described in the electrical characteristics. In actual operation, it should be within these conditions.
The polarity value for current specifies a sink as “+” and a source as “−” referencing the IC.
Unless specifically noted, Ta is 25°C
Table.2
Characteristic
Symbol
Range of VIN Pin Voltage
Range of Output Current
(4)
Inductor ripple current ⊿IL／Io
Operating Ambient Temperature
(4)
(4)
Ratings
MIN
MAX
VIN
6
48
V
IO
0
3
A
ΔIL／Io
0.1
0.3
－
TOP
40
105
°C
You must use it within Thermal Derating Curve of the fig1.
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Units
Page.4
Remarks
LC5830K DATA SHEET
Rev.1.0
3. Electrical Characteristics
Refer to a specification for contents of details.
The polarity of the electric current value prescribes "sink = +" and "source = -" based on the IC.
Electrical Characteristics of Control Part (MIC)
Valid at VIN = 24 V, TA = –40°C to 125°C, typical values at TA = 25°C; unless otherwise noted
Table.3
Items
Input Supply Voltage
VIN Undervoltage Lockout Threshold
VIN Undervoltage Lockout
Hysteresis
Symbol
Ratings
TYP MAX
48
5.3
-
Units
Conditions
VIN
VUVLO
MIN
6
-
VUVLOHYS
-
150
-
mV
VIN decreasing
IIN
5
1
10
mA
μA
VCS=0.5V, EN=”H”
V
V
TA=25°C
VIN increasing
VIN Pin Shutdown Current
IINSD
-
Buck Switch Current Limit
Threshold
ISWLIM
3.0
4.0
5.0
A
Buck Switch On-Resistance
RDB(on)
-
0.25
0.4
Ω
VBOOT=VIN+4.3V,
TA=25°C, ISW=1A
VBOOTUV
1.7
2.9
4.3
V
VBOOT to VSW increasing
VBOOTHYS
-
370
-
mV
VBOOT to VSW decreasing
Switching Minimum Off-Time
tOFFmin
-
Switching Minimum On-TIme
tSWONTIME
110
110
150
150
ns
ns
tON
800
1000
1200
ns
Load Current Sense Regulation
Threshold
VCSREG
187.5
200
210
mV
VCS decreasing, SW turns on
Load Current Sense Bias Current
ICSBIAS
VCC
ICCLIM
VIH
VIL
RENPD
5.0
5
1.8
-
0.9
5.3
20
100
5.6
0.4
-
μA
V
mA
V
V
kΩ
VCS=0.2V, EN=low
0mA<ICC<5mA, VIN>6V
VIN=24V, VCC=0V
VIN Pin Supply Current
BOOT Undervoltage Lockout
Threshold
BOOT Undervoltage Lockout
Hysteresis
Selected On-Time
VCC Regulated Output
VCC Current Limit*
Logic High Voltage
Logic Low Voltage
EN Pin Pull-down Resistance
Maximum PWM Dimming
Off-Time
Thermal Shutdown activation
temperature
Thermal Shutdown Hysteresis
temperature
tPWML
10
17
-
ms
TSD
−
165
−
°C
TSDHYS
−
25
−
°C
* The internal linear regulator is not designed to drive an external load.
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Page.5
EN shorted to GND
VCS=0V
VIN=24V, VOUT=12V,
RON=137 kΩ
VEN increasing
VEN decreasing
VEN=5V
Measured while EN = low,
during dimming control, and
internal references are
powered-on (exceeding tPWML
results in shutdown)
LC5830K DATA SHEET
Rev.1.0
PD[W]
Allowable Package Power Dissipation
Allowable package power dissipation
4-Layer PCB
Double sided PCB
3
2.5
2
θj-a =35℃／W
1.5
1
θj-a =63℃／W
0.5
0
0
25
50
75
100
125
150
Tj[℃]
Junction Temperature
fig.1 LC5830K Thermal Derating Curve
Note1：4-layer PCB based on JEDEC standard.
Copper area: 1inch × 1inch =1inch2 (645.16mm2) /Layer ,4-layer PCB with via connection(Blue line)
Copper area: 1inch × 1inch =1inch2 (645.16mm2) /Layer ,Double sided PCB with via connection(Red line)
*θj-a grows big when the areas of the radiation pattern in total decrease.
Note2：As for the "Thermal-Derating-Curve" of the fig1, it is calculated in consideration of the
printed-circuit-board temperature limit = 130℃ to use most in less Junction-temperature
Tj= 125℃.
Note3：PD can be calculated with the following equation.
PD=(VIN×IIN)－(VOUT×iLED)－(iLED2×DCR)－{VF×iLED×(1－Duty)}－(VCS2／RSENSE) ･･･(1)
VIN：Input Voltage(V)，IIN：Input Current(A)，iLED：Average Current of LED(A)，
VF：The forward voltage of Flyweel-Diode (V)，DCR：DC-resistance of Inductor winding(Ω)，
Duty：VOUT／VIN (VOUT=LED String voltage＋VCS)，VCS=0.2(V)，RSENSE=Current detection resistance(Ω)
* It is based on the measurement circuit of the fig2.
String
voltage
fig2. Measurement circuit of Power dissipation
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Page.6
LC5830K DATA SHEET
Rev.1.0
4. Functional Block Diagram
fig3. Function Block Diagram
5. Pin Assignment & Functions
Table.4
fig.4 Pin Assignment
Pin No.
Symbol
1
VIN
Supply voltage input terminals
2
TON
Regulator on-time setting resistor terminal
3
EN
Logic input for Enable and PWM dimming
4
CS
Drive output current sense feedback
5
VCC
Internal linear regulator output
6
GND
Ground terminal
7
BOOT
8
SW
Pad
‐
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Functions
DMOS gate driver bootstrap terminal
Switched output terminals
Exposed pad for enhanced thermal dissipation;connect to GND
Page.7
LC5830K DATA SHEET
Rev.1.0
6. Typical Application Circuit
fig5. LC5830K Application Circuit
The application circuit in fig5 shows a design for driving a 15 V LED string at 1.3 A (set by RSENSE ). The switching
frequency is 500 kHz, as set by R1. As for the COUT, a 0.68 μF ceramic capacitor is added across the LED string to
reduce the ripple current through the LEDs (as shown in figure 17B).
*Refer to “9.2 demonstration board circuit diagram” for the circuit diagram of the demonstration board.
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Page.8
LC5830K DATA SHEET
Rev.1.0
7. Package Information
fig6. package outline
Units：Dimensions in mm
A
Mark of Pin No.1
B Exposed Thermal Pad(Bottom Surface)
C Foot-printing reference (Adjust it corresponding to the application.)
For Reference Only; not for tooling use (reference MS-012BA)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B Exposed thermal pad (bottom surface)
C
Reference land pattern layout (reference IPC7351SOP65P640X120-29CM);
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process
requirementsand PCB layout tolerances; when mounting on a multilayer PCB, thermal vias at the exposed
thermal pad land can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)
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Page.9
LC5830K DATA SHEET
Rev.1.0
8. Functional Description
The LC5830K is a buck regulator designed for driving a high-current LED string. It utilizes average current mode control to
maintain constant LED current and consistent brightness. The LED current level is easily programmable by selection of an external
sense resistor, valued as follows:
Constant
LED current control
fig.7 Constant LED current control
iLED = VCSREG / RSENSE ･･･(2)
where ,VCSREG = 0.2V typical.
In other words, by detecting "Voltage between both ends" of the "LED current detection resistor R SENSE" that is
series connection to LED with the CS terminal, it is controlled so that "Voltage between both ends" of RSENSE
may become a constant (0.2V).
8.1 Settlement of frequency
The LC5830K operates in fixed on-time mode during switching. The on-time (and hence switching frequency) is programmed
using an external resistor connected between the VIN and TON pins, as given by the following equation:
tON = k × (RTON + RINT ) × ( VOUT / VIN ) ･･･(3)
fSW = 1 / [ k × (RTON + RINT )]
where,
･･･(4)
k = 0.013, with fSW in MHz, tON in μs and RTON in kΩ, RINT=5kΩ （Refer to fig8.）
fig.8
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Switching Frequency versus RTON Resistance
Page.10
LC5830K DATA SHEET
Rev.1.0
8.2 Enable and Dimming
･Enable terminal
The IC is activated when a logic high signal is applied to the EN (enable) pin. The buck converter ramps up the LED current to
a target level set by RSENSE. When the EN pin is forced from high to low, the buck converter is turned off, but the IC remains
in standby mode for up to 10 ms. If EN goes high again within this period, the LED current is turned on immediately. Active
dimming of the LED is achieved by sending a PWM (pulse-width modulation) signal to the EN pin. The resulting LED
brightness is proportional to the duty cycle ( TON / Period ) of the PWM signal. A practical range for PWM dimming frequency
is between 100 Hz ( Period = 10 ms) and 2 kHz. At a 200 Hz PWM frequency, the dimming duty cycle can be varied from
100% down to 1% or lower.
If EN is low for more than 17 ms, the IC enters shutdown mode to reduce power consumption. The next high signal on EN will
initialize a full startup sequence, which includes a startup delay of approximately 130 μs. This startup delay is not present
during PWM operation. The EN pin is high-voltage tolerant and can be directly connected to a power supply. However, if EN
is higher than the VIN voltageat any time, a series resistor (1 kΩ) is required to limit the current flowing into the EN pin. This
series resistor is not necessary if EN is driven from a logic input.
･PWM Dimming Ratio
The brightness of the LED string can be reduced by adjusting the PWM duty cycle at the EN pin as follows:
Dimming ratio = PWM on-time / PWM period.
For example, by selecting a PWM period of 5 ms (200 Hz PWM frequency) and a PWM on-time of 50 μs, a dimming ratio of
1% can be achieved. In an actual application, the minimum dimming ratio is determined by various system parameters,
including: VIN , VOUT , inductance, LED current, switching frequency, and PWM frequency. As a general guideline, the
minimum PWM on-time should be kept at 50 μs or longer. A shorter PWM on-time is acceptable under more favorable
operating conditions.
8.3 Range of Output Voltage
fig9 provides simplified equations for approximating output voltage. Essentially, the output voltage of a buck converter is
approximately given as
VOUT = VIN × D – VD1 × (1 – D ) ≈ VIN × D, if VD1<< VIN ･･･(5)
D = tON / (tON + tOFF ) ･･･(6)
where D is the duty cycle, and VD1 is the forward drop of the Schottky diode D1 (typically under 0.5 V).
･During SW on-time:
iRIPPLE = [(VIN – VOUT) / L] × tON ･･･(7)
= [(VIN – VOUT) / L] × T × D
where, D = tON / T ･･･(7)
･During SW off-time:
iRIPPLE = [(VOUT – VD1) / L] × tOFF ･･･(8)
= [(VOUT – VD1) / L] × T × (1 – D)
Therefore (simplified equation for Output Voltage):
VOUT = VIN × D – VD1 × (1 – D) ･･･(9)
If VD1 << VOUT,
then VOUT is ･･･ VOUT ≈ VIN × D.･･･(10)
More precisely ･･･
VOUT = (VIN – Iav × RDS(on) ) × D
– VD × (1 – D) – RL × Iav ･･･(11)
where, RL is the resistance fo the inductor.
fig.9 Simplified buck controller equations
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Page.11
LC5830K DATA SHEET
Rev.1.0
For a given input voltage, the maximum output voltage depends on the switching frequency and minimum tOFF . For example, if
tOFF(min) = 150ns and fSW = 1 MHz, then the maximum duty cycle is 85%. So for a 24V input, the maximum output is 20.3V.
This means up to 6 LEDs can be operated in series, assuming Vf = 3.3V or less for each LED.
The minimum output voltage depends on minimum tON and switching frequency. For example, if the minimum t ON = 150ns and
fSW = 1 MHz, then the minimum duty cycle is 15%. That means with V IN = 24V, the minimum VOUT = 3.2V (one LED).
Switching at lower frequency allows a wider range of VOUT, hence more flexible LED configurations. This is shown in fig10.
As a general rule, switching at lower frequencies allows a wider range of V OUT , and hence more flexible LED configurations.
This is shown in fig10. fig11 shows how the minimum and maximum output voltages vary with LED current (assuming
RDS(on) = 0.4 Ω, inductor DCR = 0.1 Ω, and diode Vf = 0.6 V).
If the required output voltage is lower than that permitted by the minimum t ON , the controller will automatically extend the tOFF ,
in order to maintain the correct duty cycle. This means that the switching frequency will drop lower when necessary, while the
LED current is kept in regulation at all times.
fig.11 Minimum and Maximum Output Voltage
versus iLED current
(VIN = 9 V, fSW = 1 MHz, minimum tON and tOFF = 150 ns)
fig.10 Minimum and Maximum Output Voltage
versus Switching Frequency
(VIN = 24 V, minimum tON and tOFF = 150 ns)
8.3.1 The number of LED's that it can be driven with LC5830K
Now, the CS terminal voltage =0.2V is taken. When a VF of LED to connect is set at 3.5V (Max), The number of serial LED's
of the string which can be driven, they are shown such as a fig12 and a fig13.
45
1LED
40
2LED
3LED
35
4LED
VIN(V)
30
5LED
25
6LED
20
7LED
15
8LED
9LED
10
10LED
5
11LED
0
0
0.5
1
1.5
2
fsw(MHz)
fig.12
The limitation of VIN at tOFF(Min)=150nsec
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Page.12
2.5
12LED
VIN(Limit)
LC5830K DATA SHEET
Rev.1.0
When a difference in voltage of the "output voltage VOUT" and the "input voltage VIN" becomes small, a fig12 shows the
condition of VIN that the "switching-off-period" reaches tOFF (Min) =150nsec.You must avoid the condition which reaches
tOFF (Min) =150nsec fundamentally.
If the switching-frequency rises more, you must make ON-Duty decrease and VIN increase.
But,the recommended operating conditions is VIN≦48V.
Therefore from the figure 12, the number of LED serial connection, 9 LEDs are the limit in the whole area of the frequency
which can be set up with RTON. If the frequency can be lowered, it is possible to use 10-12 LEDs serial connection.
Then you must set it up, the available VIN ranges which is between "allowable min Vin and 48V.
45
40
VIN(V)
35
30
1LED
25
2LED
20
3LED
15
4LED
10
VIN(Limit)
5
0
0
0.5
1
1.5
2
2.5
fsw(MHz)
fig.13 When the input voltage is high using a few LED's, the limitation of VIN by "tON (Min) =150nsec".
A fig13 shows the condition that the "switching-ON-period" reaches tON (Min) =150nsec ,when the VIN is high and using a
few LED's. Because it is VOUT<<VIN as a movement condition of the IC, the control Duty-cycle becomes small.
This case, because the control margin becomes narrow when the frequency increases, you must set up VIN that is lower than the
"VIN value on each curve" of the fig13.
And, be careful, because it is VIN≦48V as well as the fig12 by the recommended operating condition.
From the above, It seems that the "switching on period" reaches the tON (Min) condition when the switching frequency was
deviated to the tendency that it decreases to against the setup by R TON. And, when the phenomenon that Output-voltage VOUT
decreases, the "switching off period" has the possibility to reach the condition of tOFF (Min). Reconsider the setup "range of
VIN" or "switching frequency", because V OUT depends on the number of LED serial connection.
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Page.13
LC5830K DATA SHEET
Rev.1.0
8.4 Thermal Budgeting
The LC5830K is capable of supplying a 3.0A current through its high-side switch. However, depending on the duty cycle, the
conduction loss in the high-side switch may cause the package to overheat. Therefore care must be taken to ensure the total
power loss of package is within budget. For example, if the maximum temperature rise allowed is ΔT = 50K at the device case
surface, then the maximum power dissipation of the IC is 1.4W. Assuming the maximum RDS(on) = 0.4Ω and a duty cycle of 85%,
then the maximum LED current is limited to 2.0A approximately. At a lower duty cycle, the LED current can be higher.
8.5 Over Current Protection(OCP)
The waveform in fig14 illustrates how the LC5830K responds in the case in which the current sense resistor or the CS pin is
shorted to GND. Note that the SW pin overcurrent protection is tripped at around 3.75 A, and the part shuts down immediately.
The part then goes through startup retry after approximately 380 μs of cool-down period. It becomes a hiccup mode like a
fig14.Also LC5830K is tripped at 3.75Atyp.
swtich node VSW (ch1, 10 V/div.),
output voltage,VOUT (ch2, 10 V/div.),
LED current, iLED (ch3, 1 A/div.), t = 100 μs/div
fig.14
LC5830K overcurrent protection tripped in the case of a fault caused by the sense resistor pin shorted to ground.
8.6 Component Selections(Peripheral parts)
The inductor is often the most critical component in a buck converter. Follow the procedure below to derive the
correct parameters for the inductor.
8.6.1 Selection of Inductor
1) Determine the saturation current of the inductor.
This can be done by simply adding 20% to the average LED current:
iSAT ＞ iLED × 1.2 ･･･(12)
2) Determine the ripple current amplitude (peak-to-peak value).
As a general rule, ripple current should be kept between 10% and 30% of the average LED current:
0.1 ＜⊿IL / iLED ＜ 0.3 ･･･(13)
3) Calculate the inductance based on the following equations:
L = (VIN – VOUT ) × D × T / ⊿IL ･･･(14)
D = (VOUT + VD1 ) / ( VIN + VD1 ) ･･･(15)
Where D is the duty cycle, T is the period 1/fSW, and VD1 is the forward voltage drop of the Schottky diode D1.(Refer to fig9)
4) Inductor Selection Chart
The chart in fig15 summarizes the relationship between LED current, switching frequency, and inductor value. Based on this
chart: Assuming LED current = 2 A and fSW =1 MHz, then the minimum inductance required is L = 10 μH in order to keep the
ripple current at 30% or lower. (Note: VOUT = VIN / 2 is the worst case for ripple current). If the switching frequency is lower, then
either a larger inductance must be used, or the ripple current requirement has to be relaxed.
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Page.14
LC5830K DATA SHEET
Rev.1.0
fig.15 Inductance selection based on ILED and fsw ;
VIN = 24 V, VOUT = 12 V, ⊿IL／Io(iLED ave) = 30%
8.6.2The attention in selection of Inductor.
1) For stability, as for the rate (⊿ IL/iLED) of Inductor ripple current, 10%-30 % is recommended. Select Inductor and
switching frequency on the minimum VIN condition so that the rate of Inductor ripple current may go into this range. And, as
a general value in the Buck-type, as a setup of Inductor, '⊿ IL/iLED=20%-30 % ' is said as the 'A cost performance is the
best.'
2) There is no hard limit on the highest ripple current percentage allowed. But, in this IC, the continuous current mode that is a
DC superposed is recommended, it isn't the discontinuous current mode,the critical current mode. Generally, it is possible that
Inductance is made small when the rate of ⊿ IL/iLED is enlarged. But, when Inductance is lowered too much, the peak of
Inductor current may reach OCP threshould value. In this case, this IC can't do a normal operation.
3) Obtain the data sheet of Inductor manufacturer. And, select a part after you confirm that it isn't saturated by the
current value when OCP activates.
4) Generally, if Inductance is the same, heat-generation of the winding-wire in Inductor is lower whose contour is big. It is
because a thicker wire can wind it in the window frame of the core. This means that DC resistance is lowered by the large
section product of the winding-wire.
5) As for the structure of a Inductor, in case of structure of open-magnetic-loop like a drum type, it is afraid of a bad
influence that is given to EMI and so on. The low leakage flux type Inductor which has the structure of closed-magnetic-loop
is recommended.
8.6.3 Output Filter Capacitor
The LC5830K is designed to operate without an output filter capacitor, in order to save cost. Adding a large output capacitor is not
recommended. In some applications, it may be required to add a small filter capacitor (up to several μF) across the LED string
(between LED+ and LED-) to reduce output ripple voltage and current. It is important to note that:
･When the large ripple current is flowing to the pattern, a COUT capacitor avoids unstable condition of the IC's GND electrical
potential.( decoupling capacitor )
・The addition of this filter capacitor introduces a longer delay in LED current during PWM dimming operation. Therefore the
maximum PWM dimming ratio is reduced.
・The filter capacitor should NOT be connected between LED+ and GND. Doing so may create instability because the control
loop must detect a certain amount of ripple current at the CS pin for regulation.
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Page.15
LC5830K DATA SHEET
Rev.1.0
(A)Without COUT:
Ripple current through LED string is
proportional to ripple voltage at CS pin.
(B) With a COUT across LED string:
Ripple current through LED string is reduced,
while ripple voltage at CS pin remains high.
fig.16 About the difference in the use of a COUT and the un-use (Ripple Current and Ripple Voltage)
fig.17B Operation with a 0.68 μF ceramic
Capacitor(as a COUT) across the LED string
fig.17A Operation without using any output
capacitor connected across the LED string
Operating condition：200 Hz, VIN = 24 V, VOUT = 15 V, fSW = 500 kHz, L = 10 μH, duty cycle = 50%
CH1 (Red) = VIN (10 V/div), CH2 (Blue) = VOUT (10 V/div),
CH3 (Green) = iLED (500 mA/div), CH4 (Yellow) = Enable (5 V/div), time scale = 1 ms/div
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Page.16
LC5830K DATA SHEET
Rev.1.0
9. Component Placement and PCB Layout Guidelines
9.1 Printing pattern drawing(Our company‘s circuit board for demonstration)
fig.18A Pattern layout of Demo-board(Double sided PCB／Parts mounting side)
fig.18B Pattern layout of Demo-board(Double sided PCB／Back side)
Double sided PCB(Copper foil thickness：35μm､ Base material thickness：1.6mm､ Contour ：60mm×47mm)
●：via hole(φ0.3)
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Page.17
LC5830K DATA SHEET
Rev.1.0
9.2The circuit diagram of Demo-board
fig.19 LC5830K The circuit diagram of Demo-board
VIN=6～48V，LED string voltage≒15V， Fsw≒1MHz
C1：47μF／50V C2：4.7μF／50V C4：0.1μF／50V C5：0.1μF／50V L1：10μH
D1：SJPB-L6／Sanken-electric co.,LTD.
R1：140kΩ R2：130mΩ R3：200mΩ R4：390mΩ R5：750mΩ･･･R2－R5 can be selected with a jumper pin
of P1.
Note ：An optional part for the experiment = C3，C6，C7，R7
*1：R7／C6 →The speed adjustment of dimming pulse ･･･ For the experiment.
*2：C7→It is made to decrease ripple current that is flowing to LED.･･･For the experiment.
*3：C3→For the noise filter of the CS terminal - GND terminal･･･For the experiment.
C3, C6, C7 and R7 are handled as the delay elements against inputted dimming-pulse.
PCB layout is critical in designing any switching regulator. A good layout reduces emitted noise from the switching device, and
ensures better thermal performance and higher efficiency. The following guidelines help to obtain a high quality PCB layout.
fig18A,fig18B show an example for components placement. fig20 shows the three critical current loops that should be
minimized and connected by relatively wide traces.
fig.20 Three different current loops in a buck converter
1) When the upper FET (integrated inside the LC5830K) is on, current flows from the input supply/capacitors, through the upper
FET, into the load via the output inductor, and back to ground as shown in loop 1. This loop should have relatively wide traces.
Ideally this connection is made on both the top (component) layer and via the ground plane.
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Page.18
LC5830K DATA SHEET
Rev.1.0
2) When the upper FET is off, free-wheeling current flows from ground through the asynchronous diode D1, into the load via the
output inductor, and back to ground as shown in loop 2. This loop should also be minimized and have relatively wide traces.
Ideally this connection is made on both the top (component) layer and via the ground plane.
3) The highest di/dt occurs at the instant the upper FET turns on and the asynchronous diode D1 undergoes reverse recovery as
shown in loop 3. The input capacitors CIN must deliver this high instantaneous current. C1 (fig19 /electrolytic capacitor) should
not be too far off C2(fig19 /ceramic capacitor). Therefore, the loop from the ceramic input capacitor C2 through the upper FET
and asynchronous diode to ground should be minimized. Ideally this connection is made on both the top (component) layer and
via the ground plane.
4) The voltage on the SW node (pin 8) transitions from 0 V to VIN very quickly and may cause noise issues. It is best to place the
asynchronous diode and output inductor close to the LC5830K to minimize the size of the SW polygon.
5) Keep sensitive analog signals (CS, and R1/fig19 of switching frequency setting) away from the SW polygon.
6) For accurate current sensing, the LED current sense resistor RSENSE(R2 – R5/fig19) should be placed close to the IC.
7) Place the boot strap capacitor C4(fig19) near the BOOT node (pin 7) and keep the routing to this capacitor short.
8) When routing the input and output capacitors (C1, C2, and C7/fig19 if used), use multiple vias to the ground plane and place the
vias as close as possible to the LC5830K pads.
9) To minimize PCB losses and improve system efficiency, the input (VIN) and output (V OUT) traces should be wide and
duplicated on multiple layers, if possible.
10) To improve thermal performance, use multiple layers for GND. Place as many vias as possible to the ground plane around the
anode of the asynchronous diode.
11) The thermal pad under the LC5830K must connect to the ground plane using multiple vias. More vias will insure lower
operating temperature and higher efficiency.
9.3 Optimizing Thermal Layout
The features of the printed circuit board, including heat conduction and adjacent thermal sources such as other components,
have a very significant effect on the thermal performance of the device.
To optimize thermal performance, the following should be taken into account:
• The device exposed thermal pad should be connected to as much copper area as is available.
• Copper thickness should be as high as possible (for example, 2 oz. or greater for higher power applications).
• The greater the quantity of thermal vias, the better the dissipation. If the expense of vias is a concern, studies have shown
that concentrating the vias directly under the device in a tight pattern, as shown in fig21, has the greatest effect.
• Additional exposed copper area on the opposite side of the board should be connected by means of the thermal vias. The
copper should cover as much area as possible.
• Other thermal sources should be placed as remote from the device as possible
• Place as many vias as possible to the ground plane around the anode of the asynchronous diode.
fig.21 Suggested PCB layout for thermal optimization(maximum available bottom-layer copper recommended)
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Page.19
LC5830K DATA SHEET
Rev.1.0
10. Typical characteristics (Ta=25°C)
fig.22A Startup waveforms VIN = 19V
fig.22B
Startup waveforms VIN = 24V
*Operating condition：LEDstring voltage = 15V,
LED current = 1.3A, R1 = 63.4kΩ
(Switching frequency = 1MHz)、
VIN = 19V(fig.22A)、
VIN = 24V(fig.22B)、
VIN = 30V(fig.22C)
Oscilloscope settings:
CH1 (Red) = VIN (10 V/div),
CH2 (Blue) = VOUT (10 V/div),
CH3 (Green) = iLED (500mA/div),
CH4 (Yellow) = Enable (5 V/div),
Time：50 μs/div
fig.22C
Startup waveforms VIN = 30V
fig.23A PWM dimming waveforms Duty=50%
fig.23B PWM dimming waveforms Duty=2%
*Operating condition：200Hz, VIN = 24 V, VOUT = 15 V, R1 = 63.4 kΩ, duty cycle = 50%
fig23A Duty=50%, fig.23B Duty=2%
Oscilloscope settings:
CH1 (Red) = VIN (10 V/div),
CH2 (Blue) = VOUT (10 V/div),
CH3 (Green) = iLED (500 mA/div),
CH4 (Yellow) = Enable (5 V/div),
Time：1 ms/div (fig.23A)
50 μs/div (fig.23B)
fig23A,fig23B PWM operation at various duty cycles; note that there is no startup delay during PWM dimming operation
*C3，C6，C7，R6：Open
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Page.20
LC5830K DATA SHEET
Rev.1.0
fig.24 Efficiency versus LED Current at various LED voltages Operating conditions:fsw=1MHz
fig.25 Efficiency versus LED Current at various switching frequenciesOperating conditions: VIN = 12 V, VOUT = 5.5 V
fig.26 Average LED Current versus PWM dimming percentage
Operating conditions: VIN = 12 V, VOUT = 3.5 V, fSW = 1 MHz, fPWM = 200 Hz, L = 10 μH
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Page.21
LC5830K DATA SHEET
Rev.1.0
11. The contents of packing specification.
1) Reel packing figure (Refer to fig25)
Emboss tape + Reel
2) Inner packing figure
The material of packing : cardboard
The number of parts : 3000pcs / reel
3) Outer packing figure
The material of packing : cardboard
The number of inner boxes : 1-9 inner boxes / box
4) Outer box
The material of packing : cardboard
The number of inner boxes: 3,6 or 9inner boxes/box
5) Remarks
*It is processed so that the vibration and the shock at the time of transportation and handling of freight
may be borne enough and damage may not be done to a product.
* Be protected to the dust under transportation or storage.
6) Packing list
*Packing list is appended to the outside of each outer box.
Contents: Parts number, Order number, Parts name, Quantity
*Lot number is specified on the product.
11.1 Reel drawing
Table.5 Dimmensions of Reel(Units：mm)
fig.27 Reel Drawing
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Page.22
LC5830K DATA SHEET
Rev.1.0
11.2 Emboss tape drawing
Table.6 Dimmension of Emboss tape
fig.28 Emboss tape drawing
11.3 Reel packing drawing
fig.29 Reel packing drawing
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Page.23
LC5830K DATA SHEET
Table.7
Rev.1.0
pin 1 index location
Package
Carrier tape width
Parts per reel
eSOIC-8
12 mm
3000
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Min Trailer
Min Leader
pockets
pockets
15
50
Page.24
Cover tape width
9.3 mm
LC5830K DATA SHEET
Rev.1.0
IMPORTANT NOTES
The contents in this document are subject to changes, for improvement and other purposes, without notice.
Make sure that this is the latest revision of the document before use.
Application and operation examples described in this document are quoted for the sole purpose of
reference for the use of the products herein and Sanken can assume no responsibility for any infringement
of industrial property rights, intellectual property rights or any other rights of Sanken or any third party
which may result from its use.
Although Sanken undertakes to enhance the quality and reliability of its products, the occurrence of
failure and defect of semiconductor products at a certain rate is inevitable. Users of Sanken products are
requested to take, at their own risk, preventative measures including safety design of the equipment or
systems against any possible injury, death, fires or damages to the society due to device failure or
malfunction.
Sanken products listed in this document are designed and intended for the use as components in general
purpose electronic equipment or apparatus (home appliances, office equipment, telecommunication
equipment, measuring equipment, etc.).
When considering the use of Sanken products in the applications where higher reliability is required
(transportation equipment and its control systems, traffic signal control systems or equipment, fire/crime
alarm systems, various safety devices, etc.), and whenever long life expectancy is required even in general
purpose electronic equipment or apparatus, please contact your nearest Sanken sales representative to
discuss, prior to the use of the products herein.
The use of Sanken products without the written consent of Sanken in the applications where extremely
high reliability is required (aerospace equipment, nuclear power control systems, life support systems,
etc.) is strictly prohibited.
In the case that you use Sanken semiconductor products or design your products by using Sanken
semiconductor products, the reliability largely depends on the degree of derating to be made to the rated
values. Derating may be interpreted as a case that an operation range is set by derating the load from each
rated value or surge voltage or noise is considered for derating in order to assure or improve the reliability.
In general, derating factors include electric stresses such as electric voltage, electric current, electric
power etc., environmental stresses such as ambient temperature, humidity etc. and thermal stress caused
due to self-heating of semiconductor products. For these stresses, instantaneous values, maximum values
and minimum values must be taken into consideration.
In addition, it should be noted that since power devices or IC’s including power devices have large
self-heating value, the degree of derating of junction temperature affects the reliability significantly.
When using the products specified herein by either (i) combining other products or materials therewith or
(ii) physically, chemically or otherwise processing or treating the products, please duly consider all
possible risks that may result from all such uses in advance and proceed therewith at your own
responsibility.
Anti radioactive ray design is not considered for the products listed herein.
Sanken assumes no responsibility for any troubles, such as dropping products caused during transportation out of Sanken’s distribution network.
The contents in this document must not be transcribed or copied without Sanken’s written consent.
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Page.25