Data Sheet

INTEGRATED CIRCUITS
PTN3310/PTN3311
High-speed serial logic translators
Product data
Supersedes data of 2002 Oct 24
2004 Feb 24
Philips Semiconductors
Product data
High-speed serial logic translators
PTN3310/PTN3311
FEATURES
PIN CONFIGURATIONS
• Meets LVDS EIA-644 and PECL standards
• 2 pin-for-pin replacement input/output choices:
GND1
1
VINP
2
– LVDS in, PECL out (PTN3310)
8
VCC1
7
VOUTP
PTN3310
– PECL in, LVDS out (PTN3311)
• Single +3.3 V supply voltage operation
• Available in 8-pin SO or TSSOP package
• Maximum throughput data rate of 800 Mbps typical
VINN
3
6
VOUTN
GND2
4
5
VCC2
GND1
1
8
VCC1
VINP
2
7
VOUTP
APPLICATIONS
PTN3311
• High-speed networking and telecom applications
– ATM
VINN
3
6
VOUTN
GND2
4
5
VCC2
– SONET/SDH
8-pin SO package
– Switches
ST00014
– Routers
– Add-drop multiplexers
PIN DESCRIPTIONS
GENERAL DESCRIPTION
The High-Speed Serial Logic Translator provides a point solution
that addresses the various interface logic requirements of Optical
Transceiver Modules. The product offers a compact translation
between LVDS and PECL high speed serial data lines. This provides
the end users a simple way to mix or match Optical Transceiver ICs
from various vendors to maximize desired performance and reduces
the need to redesign interfaces to accommodate new Optical
Transceiver ICs.
8-pin SO and TSSOP package
The High-Speed Serial Logic Translator comes in two translation
choices to allow mixing LVDS and PECL input/outputs. The product
is offered in a small, convenient, 8-pin package.
Pin #
Symbol
Name and function
1, 4
GND1, GND2
Ground
2, 3
VINP, VINN
Differential inputs
5, 8
VCC1, VCC2
Supply voltage
6, 7
VOUTN, VOUTP
Differential outputs
Figure 1 shows the High-Speed Serial Logic Translator Device in a
typical high speed optical module application. Figure 2 shows the
circuit block diagrams.
ORDERING INFORMATION
Type number
n mber
Package
Name
Description
Version
PTN3310D
SO8
Plastic small-outline package; 8 leads; body width 3.9 mm
SOT96-1
PTN3311D
SO8
Plastic small-outline package; 8 leads; body width 3.9 mm
SOT96-1
PTN3310DP
TSSOP8
plastic thin shrink small outline package; 8 leads; body width 3 mm
SOT505-1
PTN3311DP
TSSOP8
plastic thin shrink small outline package; 8 leads; body width 3 mm
SOT505-1
2004 Feb 24
2
Philips Semiconductors
Product data
High-speed serial logic translators
Optical
RCVR
Optical
Laser
Driver
PTN3310/PTN3311
Translator
Serial
Backplane
Device
MAC
(ASIC)
To/From
Serial
Backplane
Translator
Optical Interface IC’s
1 x 9 Optical Module
ST00040
Figure 1. High-Speed Serial Logic Translators in Optical Module Application
LVDS IN
PECL OUT
PTN3310
PECL IN
LVDS OUT
PTN3311
ST00009
Figure 2. High-Speed Serial Logic Translator Block Diagrams
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Limits
Unit
VCC
Supply voltage
–0.3 to +4.0
V
VI
LVDS receiver input voltage
–0.3 to +5.5
V
VO
LVDS driver output voltage
–0.3 to +5.5
V
tSC
LVDS output short circuit duration
continuous
Tj
Maximum junction temperature
+150
°C
Tstg
Storage temperature range
–65 to +150
°C
ESDHBM
Electrostatic discharge (Human Body Model, 1.5 kΩ, 100 pF)
>2
kV
ESDMM
Electrostatic discharge (Machine Model, 0 kΩ, 200 pF)
>200
V
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VCC
Supply voltage
3.0
3.6
V
Tamb
Operating ambient temperature range in free air
–40
+85
°C
VCCN
Power supply noise voltage
–
100
mVPP
2004 Feb 24
3
Philips Semiconductors
Product data
High-speed serial logic translators
PTN3310/PTN3311
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
General
VCC
Supply voltage
3.0
3.3
3.6
V
ICC
Power supply current
PTN3311
–
12
20
mA
IEE
Power supply current
PTN3310
–
13
20
mA
PECL inputs (PTN3311)
VIH
Input HIGH voltage1
2.135
–
2.420
V
VIL
Input LOW voltage1
1.490
–
1.825
V
II
Input current
–
–
±10
µA
100
–
–
mV
VIN = 0 V
–
–
20
mA
VIN = VCC
–
–
20
mA
VIN = VCC or GND
LVDS inputs (PTN3310)
VID
IIN
Minimum differential input signal amplitude
Input
current2
PECL outputs (PTN3310)
VOH
Output HIGH voltage1
2.275
2.345
2.420
V
VOL
Output LOW voltage1
1.490
1.595
1.680
V
CL
Output load capacitance
–
5
–
pF
LVDS outputs (PTN3311); RL = 100 Ω
VOD
Output differential voltage
250
350
450
mV
∆ VOD
Steady-state difference in output differential
voltage between complementary output states
–
–
50
mV
VOS
Offset voltage
1.125
1.250
1.375
V
∆ VOS
Steady-state difference in offset voltage between
complementary output states
–
–
50
mV
IOS
Output short-circuit current
outputs mutually shorted
–
–
12
mA
output shorted to GND
–
–
24
mA
–
5
–
pF
CL
Output load capacitance
NOTES:
1. These values are for VCC = 3.3 V; PECL level specifications are referenced to VCC and will track 1:1 with variation of VCC.
2. Power supply either on or off.
2004 Feb 24
4
Philips Semiconductors
Product data
High-speed serial logic translators
PTN3310/PTN3311
AC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Maximum throughput data rate
655
800
–
Mbps
Clock output skew, part-to-part
–
100
–
ps
Clock output pulse skew
–
50
–
ps
Propagation delay input (differential) to output
–
1
3
ns
Propagation delay input (single-ended) to output
–
1
3
ns
–
200
300
ps
General
fMAX
tSKEW
S
tPLH/tPHL
PECL outputs (PTN3310)
tr/tf
Output rise and fall times at 20% and 80%
intersects
LVDS outputs (PTN3311); RL = 100 Ω; CL = 5 pF
tTLH
Transition time LOW to HIGH
RL = 100 Ω; CL = 5 pF
–
500
650
ps
tTHL
Transition time HIGH to LOW
RL = 100 Ω; CL = 5 pF
–
500
650
ps
Peak-to-peak switching offset voltage
Measured between two
matched 49.9 Ω load resistors;
5 pF load capacitance
–
–
150
mV
VOSS
LVDS REFERENCE MEASUREMENT CONFIGURATION
Voutp
PTN331x
Cprobe
Rload
1
5
2
6
3
7
4
8
Vos
CLVDS
Rload
Cprobe
Voutn
VOD = VOUTP – VOUTN
Rload = 50 Ω
CLVDS = 5 pF
ST00041
Figure 3.
The above diagram shows the test set-up used when evaluating
LVDS outputs. According to the TIA-EIA-644 Standard, the
maximum lumped capacitance test load should be 5 pF. However,
by using probes or cables to observe the signal, additional
capacitance is added, which has an effect on the rise and fall times.
Cprobe represents any capacitance caused by the use of probes or
cables. Assuming balanced loading and balanced output drivers, the
total effective capacitance seen by the part is:
To correctly account for the effects of Cprobe, the following formula
should be used:
5 pF
Dt + C
Dt
Eff
measured,
Where ∆t is the 20%–80% rise/fall time.
To avoid the use of additional calculation of the measured results, a
different approach could be taken; however, the value of Cprobe has
to be known in advance. In that case, the value of CLVDS can be
chosen such that the sum of the capacitances equals 5 pF, i.e.:
CEff = CLVDS + 1/2 Cprobe
CLVDS + 1/2 Cprobe = 5 pF
2004 Feb 24
5
Philips Semiconductors
Product data
High-speed serial logic translators
PTN3310/PTN3311
SO8: plastic small outline package; 8 leads; body width 3.9 mm
2004 Feb 24
6
SOT96-1
Philips Semiconductors
Product data
High-speed serial logic translators
PTN3310/PTN3311
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm
2004 Feb 24
7
SOT505-1
Philips Semiconductors
Product data
High-speed serial logic translators
PTN3310/PTN3311
REVISION HISTORY
Rev
Date
Description
_3
20040224
Product data (9397 750 12943). Supersedes data of 2002 Oct 24 (9397 750 10628).
Modifications:
• Corrected package outline version from SOT505-2 to SOT505-1 in Ordering information table and
Package outline sections.
_2
20021024
Product data (9397 750 10628). ECN 853-2362 28701 dated 06 August 2002.
Supersedes data of 2001 Jun 19 (9397 750 08511).
_1
20010619
Product data (9397 750 08511).
2004 Feb 24
8
Philips Semiconductors
Product data
High-speed serial logic translators
PTN3310/PTN3311
Data sheet status
Level
Data sheet status [1]
Product
status [2] [3]
Definitions
I
Objective data
Development
This data sheet contains data from the objective specification for product development.
Philips Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL
http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given
in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no
representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be
expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree
to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described
or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated
via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys
no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent,
copyright, or mask work right infringement, unless otherwise specified.
 Koninklijke Philips Electronics N.V. 2004
All rights reserved. Printed in U.S.A.
Contact information
For additional information please visit
http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
Date of release: 02-04
For sales offices addresses send e-mail to:
[email protected]
Document order number:
2004 Feb 24
9
9397 750 12943
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