TB059

M
TB059
Using The MCP2150 Developer’s Board With The MCP2155
Author:
While the MCP2150 can be connected to the DB-9
connector (J5) or the interface Header (J1), the
MCP2155 can only be connected via the interface
Header (J1). The DB-9 connector is useful for easily
connecting to a Host PC.
Mark Palmer
Microchip Technology Inc.
INTRODUCTION
This Technical Brief describes how the MCP2150
Developer’s Board can be used for development of
MCP2155 applications.
The MCP2150 is designed for use in Data Terminal
Equipment (DTE) applications, while the MCP2155 is
designed for use in Data Communication Equipment
(DCE) applications. This requires some of the UART’s
non-data circuits to operate differently in these two
devices.
FIGURE 1:
The MCP2150 Developer’s Board layout is shown in
Figure 1. This Technical Brief focuses on the Host
UART signals from the U2 socket (MCP2150/
MCP2155) to the MAX3238 device (U1) and the
Header (J1).
The MCP2150 Developer’s Board is available in the
MCP2120/MCP2150 Developer’s Kit (part number
DM163008).
MCP2150 DEVELOPER’S BOARD LAYOUT
 2002 Microchip Technology Inc.
Preliminary
DS91059B-page 1
TB059
MCP2150 DEVELOPER’S BOARD
UART SIGNALS
USING THE MCP2155
Since the CD signal has a different direction between
the MCP2150 and MCP2155, the DB-9 interface (J5)
cannot be used. To interface with the MCP2155, the
MCP2150 Developer’s Board must be connected
through the Header (J1). This requires jumpers J2, J3
and J4 to have the Header selected (see Figure 2 and
Figure 3).
Table 1 shows the direction of the MCP2150 and
MCP2155 UART signals and the direction of the
MAX3238 device (U1) with respect to the U2 socket
(where the MCP2150 or MCP2155 reside).
Table 1 also shows that only the Carrier Detect (CD)
signal has a different direction between the MCP2150
and MCP2155 UART signals. This will not cause a
drive conflict because this signal is an input to the
MAX3238.
The application’s Host Controller can now implement
an IrDA® Standard IRCOMM 9-wire "cooked" service
class serial link to communicate with the MCP2155 via
the Header J1.
Figure 2 shows the layout of the UART driver signals.
Each UART signal from the MAX3238 device (U1) is
labeled with the UART signal name and have via’s so
that they may be cut and then later jumpered back to
the original state. If desired, a signal line may be cut for
your MCP2155 application development.
TABLE 1:
MCP2155 SIGNAL DIRECTION
Signal
DB-9
Pin # Name
1
CD
The board can be powered by the +5V and GND connectors next to the J1 header (bottom right of Figure 1).
Controlling the power to the MCP2150 Developer’s
Board allows the application to reset the MCP2150/
MCP2155 device when required.
Function
Signal Direction
MCP2150
MCP2155
MAX3238 (U1) to U2
Pin
U1 Pin U2 Pin
Direction Number Number
Carrier Detect MCP2150 → HC HC → MCP2155
Input
24
17
Comment
Different Direction.
No drive conflict,
MAX3238 pin is
input.
2
RX
Received Data MCP2150 → HC MCP2155 → HC
Input
17
8
Same Direction.
3
TX
Transmit Data HC → MCP2150 HC → MCP2155
Output
18
7
Same Direction.
4
DTR (1) Data Terminal
Ready
Output
21
11
Same Direction.
5
GND
Ground
—
—
—
6
DSR
Data Set
Ready
MCP2150 → HC MCP2155 → HC
Input
22
10
Same Direction.
7
RTS
Request to
Send
HC → MCP2150 HC → MCP2155
Output
20
13
Same Direction.
8
CTS
Clear to Send
MCP2150 → HC MCP2155 → HC
Input
23
12
Same Direction.
—
—
9
No issue. Not
connected to
MAX3238.
9
RI
(2)
Ring Indicator
HC → MCP2150 HC → MCP2155
—
—
—
HC → MCP2155
Legend: HC = Host Controller
Note 1: This signal is used for Device Programmable ID mode entry.
2: This signal is not implemented in the MCP2150.
DS91059B-page 2
Preliminary
 2002 Microchip Technology Inc.
TB059
FIGURE 2:
MCP2150 DEVELOPER’S BOARD UART DRIVER LAYOUT
Board Via (Through-hole)
MAX3238 (U1)
CTS
TX
RTS
DSR
DTR
UART Control, Status
and Data Signal Traces
(TTL levels)
RX
CD
Jumper UART Control and Data Signals (MAX3238 Outputs)
to come from Developer Board Header
 2002 Microchip Technology Inc.
Preliminary
DS91059B-page 3
TB059
MCP2150 AND MCP2155 PIN
DESCRIPTIONS
SUMMARY
Table 2 gives the pin descriptions for the MCP2150,
while Table 3 gives the pin descriptions for the
MCP2155.
TABLE 2:
The MCP2150 Developer’s Board (available in the
MCP2120/MCP2150 Developer’s Kit, part number
DM163008) can also be used for developing MCP2155
applications. This development is straight forward
through the use of the Header interface (J1) and appropriate configuration of board jumpers.
MCP2150 PIN DESCRIPTIONS
Pin Number
Pin Name
PDIP SOIC SSOP
Pin
Type
Buffer
Type
Description
BAUD0
1
1
1
I
ST
BAUD1:BAUD0 specify the baud rate of the device.
TXIR
2
2
2
O
—
Asynchronous transmit to Infrared transceiver.
RXIR
3
3
3
I
ST
Asynchronous receive from Infrared transceiver.
RESET
4
4
4
I
ST
1 = Device is operating.
0 = Device is in reset.
VSS
5
5
5, 6
—
P
EN
6
6
7
I
TTL
Device enable.
1 = Device is enabled.
0 = Device is disabled (low power). MCP2150 only monitors
this pin when in the NDM state.
TX
7
7
8
I
TTL
Asynchronous receive; from Host Controller UART.
RX
8
8
9
O
—
Asynchronous transmit; to Host Controller UART.
RI
9
9
10
—
—
Ring Indicator. The value on this pin is driven high.
DSR
10
10
11
O
—
Data Set Ready. Indicates that the MCP2150 has completed
reset.
1 = MCP2150 is initialized.
0 = MCP2150 is not initialized.
DTR
11
11
12
I
TTL
Data Terminal Ready. The value on this pin is ignored once
the MCP2150 is initialized. It is recommended that this pin be
connected such that the voltage level is either VSS or VCC. At
device power-up, this signal is used with the RTS signal to
enter device ID programming.
1 = Enter Device ID programming mode (if RTS is cleared).
0 = Do not enter Device ID programming mode.
CTS
12
12
13
O
—
RTS
13
13
14
I
TTL
VDD
14
14
15, 16
—
P
Positive supply for logic and I/O pins.
OSC2
15
15
17
O
—
Oscillator crystal output.
Legend:
TTL = TTL compatible input
I = Input
P = Power
DS91059B-page 4
Ground reference for logic and I/O pins.
Clear to Send. Indicates that the MCP2150 is ready to
receive data from the Host Controller.
1 = Host Controller should not send data.
0 = Host Controller may send data.
Request to Send. Indicates that a Host Controller is ready to
receive data from the MCP2150. The MCP2150 prepares to
send data, if available.
1 = Host Controller not ready to receive data.
0 = Host Controller ready to receive data.
At device power-up, this signal is used with the DTR signal to
enter device ID programming.
1 = Do not enter Device ID programming mode.
0 = Enter Device ID programming mode (if DTR is set).
ST = Schmitt Trigger input with CMOS levels
O = Output
CMOS = CMOS compatible input
Preliminary
 2002 Microchip Technology Inc.
TB059
TABLE 2:
MCP2150 PIN DESCRIPTIONS (CONTINUED)
Pin Number
Pin Name
PDIP SOIC SSOP
Pin
Type
Buffer
Type
Description
OSC1/CLKIN
16
16
18
I
CD
17
17
19
O
—
Carrier Detect. Indicates that the MCP2150 has established a
valid link with a Primary Device.
1 = An IR link has not been established (No IR Link).
0 = An IR link has been established (IR Link).
BAUD1
18
18
20
I
ST
BAUD1:BAUD0 specify the baud rate of the device.
Legend:
TTL = TTL compatible input
I = Input
P = Power
 2002 Microchip Technology Inc.
CMOS Oscillator crystal input/external clock source input.
ST = Schmitt Trigger input with CMOS levels
O = Output
CMOS = CMOS compatible input
Preliminary
DS91059B-page 5
TB059
TABLE 3:
MCP2155 PIN DESCRIPTIONS
Pin Number
Pin Name
PDIP
SOIC SSOP
Pin
Type
Buffer
Type
Description
BAUD0
1
1
1
I
ST
BAUD1:BAUD0 specify the baud rate of the device.
TXIR
2
2
2
O
—
Asynchronous transmit to Infrared transceiver.
RXIR
3
3
3
I
ST
Asynchronous receive from Infrared transceiver.
RESET
4
4
4
I
ST
1 = Device is operating.
0 = Device is in reset.
VSS
5
5
5, 6
—
P
Ground reference for logic and I/O pins.
EN
6
6
7
I
TTL
TX
7
7
8
I
TTL
RX
8
8
9
O
—
RI
9
9
10
I
TTL
DSR
10
10
11
O
—
Data Set Ready. Indicates that the MCP2155 has established
a valid link with a Primary Device. This signal is locally emulated and not related to the DTR bit of the IrDA Primary
Device.
1 = An IR link has not been established (No IR Link).
0 = An IR link has been established (IR Link).
DTR
11
11
12
I
TTL
Data Terminal Ready. Indicates that the Embedded device
connected to the MCP2155 is ready for IR data. The state of
this bit is communicated to the IrDA Primary Device, via the
IrDA DSR bit carried by IrCOMM.
1 = Embedded device not ready, clear IrDA DSR bit.
0 = Embedded device ready, set IrDA DSR bit.
At device power-up, this signal is used with RTS to enter
device ID programming.
1 = Enter Device ID programming mode (if RTS is cleared).
0 = Do not enter Device ID programming mode.
CTS
12
12
13
O
—
Clear to Send. Indicates that the MCP2155 is ready to receive
data form the Host Controller. This signal is locally emulated
and not related to the CTS/RTS bit of the IrDA Primary
Device.
1 = Host Controller should not send data.
0 = Host Controller may send data.
Legend:
TTL = TTL compatible input
I = Input
P = Power
DS91059B-page 6
Device enable.
1 = Device is enabled.
0 = Device is disabled (low power). MCP2155 only monitors
this pin when in the NDM state.
Asynchronous receive; from Host Controller UART.
Asynchronous transmit; to Host Controller UART.
Ring Indicator. The state of this bit is communicated to the
IrDA Primary Device.
1 = No Ring Indicate Present.
0 = Ring Indicate Present.
ST = Schmitt Trigger input with CMOS levels
O = Output
CMOS = CMOS compatible input
Preliminary
 2002 Microchip Technology Inc.
TB059
TABLE 3:
MCP2155 PIN DESCRIPTIONS (CONTINUED)
Pin Number
Pin Name
PDIP
SOIC SSOP
Pin
Type
Buffer
Type
TTL
Description
RTS
13
13
14
I
VDD
14
14
15, 16
—
P
Positive supply for logic and I/O pins.
OSC2
15
15
17
O
—
Oscillator crystal output.
OSC1/CLKIN
16
16
18
I
CD
17
17
19
I
ST
Carrier Detect. The state of this bit is communicated to the
IrDA Primary Device.
1 = No Carrier Present.
0 = Carrier Present.
BAUD1
18
18
20
I
ST
BAUD1:BAUD0 specify the baud rate of the device.
Legend:
TTL = TTL compatible input
I = Input
P = Power
 2002 Microchip Technology Inc.
Request to Send. Indicates that the Host Controller is ready to
receive data from the MCP2155. This signal is locally emulated and not related to the CTS/RTS bit of the IrDA Primary
Device.
1 = Host Controller not ready to receive data.
0 = Host Controller ready to receive data.
At device power-up, this signal is used with DTR to enter
device ID programming.
1 = Do not enter Device ID programming mode.
0 = Enter Device ID programming mode (if DTR is set).
CMOS Oscillator crystal input/external clock source input.
ST = Schmitt Trigger input with CMOS levels
O = Output
CMOS = CMOS compatible input
Preliminary
DS91059B-page 7
.1µF
.1µF
C13
4 +IN
+5V
R6
IN914
D5
IN914
D2
1000pF
C11
470K
R9
22K
R8
3
2
R5
+5V
C12
+5V
22
R10
+5V
.1µF
U6
1
Y1
6
5
8
7
TFDS4500
3
C18 4
1
2
U4:A 4.7K .1µF
1
5K
R4
JP2
C2
LM393NE
+5V
5K
R3
D6
Note: U3 pin 5 is getting power
through R14 100 ohm resistor. (Filter)
D1
U3
MCP601
-IN
R14
C5
.1µF
3
100
100K
4.7pF
R1
C9
4
C6
4.7K
JP1
C1
C2
+5V
2
D7
J7
R12
C7
+5V
1
1
3
3PHDR
2
DJ005B
J6
X2
C2
JP3
J1
5
4
3
2
X3
3
FIDUCIAL FIDUCIAL FIDUCIAL
X1
C1
10K
R2
+5V
6
EN
7
TX
8
RX
9
RI
10
DSR
11
DTR
12
CTS
13
RTS
MCP2150
17
OSC1
15
OSC2
5
VSS
U2
C8
14
VDD
4
RESET
17
CD
18 BAUD1
1
BAUD0
2 TXIR
3
RXIR
18pF
11.0592 MHz
18pF
2
1000PF
3
CR1
.1µF
C3
1
2
3
U1
VDD 27
VCC 26
+5V
C4
C1
D3
C15
UA7800KTE
IN
OUT 3
120µF
1
470
R7
MAX3238CAI
CD
T1OUT 5
CTS
T2OUT 6
T3OUT 7
T4OUT 10 RX DSR
T5OUT
12
14 FORCEOFF
13 FORCEON
15
INVALID
16 R1OUTB
DTR
21 R1OUT
R1IN 8
RTS
20 R2OUT
9
R2IN
18 R3OUT
R3IN 11 TX
2 GND
VEE 4
28 C1+
25 C1 1 C2+
3 C2 24 T1IN
23 T2IN
22 T3IN
19 T4IN
17 T5IN
GRN Power
.1µF
C2
+9 BATTERY
BT1
1N914
D4
J4
+5V
C10
10
9
8
7
6
.1µF
SPI _ 10
J2
3PHDR
C14
C1
47
C16
DE9S-FRS
+5V
3PHDR
120µF
.1µF
.1µF
.1µF
C17
+5V
1
2.2K
3
+5V
R13
2
22
COM
2
3PHDR
J8
1
R11
1
AC
2
1
AC
Preliminary
2
6
7
2
DS91059B-page 8
8
9
FIGURE 3:
J5
3
4
5
+5V
TB059
MCP2150 DEVELOPER’S BOARD
SCHEMATIC
Figure 3 shows the schematic for the MCP2150
Developer’s Board.
MCP2150 DEVELOPER’S BOARD SCHEMATIC
 2002 Microchip Technology Inc.
1
J3
3PHDR
2
1
3
TB059
APPENDIX A:
REVISION HISTORY
Revision A
• Initial Release of Document.
Revision B
• Corrected DTR and RTS pin descriptions for Programmable Device ID mode (Page 4).
• Added Revision History Section (Appendix A).
 2002 Microchip Technology Inc.
Preliminary
DS91059B-page 9
TB059
NOTES:
DS91059B-page 10
Preliminary
 2002 Microchip Technology Inc.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with
express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property
rights.
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FilterLab, microID, MXDEV, MXLAB, PICMASTER, SEEVAL
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All other trademarks mentioned herein are property of their
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© 2002, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
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The Company’s quality system processes and
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 2002 Microchip Technology Inc.
DS91059B - page 11
M
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08/01/02
DS91059B-page 12
 2002 Microchip Technology Inc.