Data Sheet

PCA9745B
16-channel SPI serial bus 57 mA/20 V constant current LED
driver
Rev. 1 — 16 June 2016
Product data sheet
1. General description
The PCA9745B is a daisy-chain SPI-compatible 4-wire serial bus controlled 16-channel
constant current LED driver optimized for dimming and blinking 57 mA
Red/Green/Blue/Amber (RGBA) LEDs in amusement products. Each LED output has its
own 8-bit resolution (256 steps) fixed frequency individual PWM controller that operates at
31.25 kHz with a duty cycle that is adjustable from 0 % to 100 % to allow the LED to be
set to a specific brightness value. An additional 8-bit resolution (256 steps) group PWM
controller has both a fixed frequency of 122 Hz and an adjustable frequency between
15 Hz to once every 16.8 seconds with a duty cycle that is adjustable from 0 % to 99.6 %
that is used to either dim or blink all LEDs with the same value.
Each LED output can be off, on (no PWM control), set at its individual PWM controller
value or at both individual and group PWM controller values. The PCA9745B operates
with a supply voltage range of 3 V to 5.5 V and the constant current sink LED outputs
allow up to 20 V for the LED supply. The output peak current is adjustable with an 8-bit
linear DAC from 225 A to 57 mA.
Gradation control for all current sources is achieved via the 4-wire serial bus interface and
allows user to ramp current automatically without MCU intervention. 8-bit DACs are
available to adjust brightness levels for each LED current source. There are four
selectable gradation control groups and each group has independently four registers to
control ramp-up and ramp-down rate, step time, hold ON/OFF time and final hold ON
output current. Two gradation operation modes are available for each group, one is single
shot mode (output pattern once) and the other is continuous mode (output pattern repeat).
Each channel can be set to either gradation mode or normal mode and assigned to any
one of these four gradation control groups.
This device has built-in open, short load and overtemperature detection circuitry. The error
information from the corresponding register can be read via the 4-wire serial bus.
Additionally, a thermal shutdown feature protects the device when internal junction
temperature exceeds the limit allowed for the process.
The PCA9745B device is designed to use 4-wire read/write serial bus with higher data
clock frequency (up to 25 MHz).
The active LOW output enable input pin (OE) blinks all the LED outputs and can be used
to externally PWM the outputs, which is useful when multiple devices need to be dimmed
or blinked together without using software control.
PCA9745B
NXP Semiconductors
16-channel SPI serial bus 57 mA/20 V constant current LED driver
2. Features and benefits
 16 LED drivers. Each output programmable at:
 Off
 On
 Programmable LED brightness
 Programmable group dimming/blinking mixed with individual LED brightness
 Programmable LED output delay to reduce EMI and surge currents
 Gradation control for all channels
 Each channel can assign to one of four gradation control groups
 Programmable gradation time and rate for ramp-up and/or ramp-down operations
 Programmable step time (6-bit) from 0.5 ms (minimum) to 512 ms (maximum)
 Programmable hold-on time after ramp-up and hold-off time after ramp-down (3-bit)
from 0 s to 6 s
 Programmable final ramp-up and hold-on current
 Programmable brightness current output adjustment, either linear or exponential
curve
 16 constant current output channels can sink up to 57 mA, tolerate up to 20 V when
OFF
 Output current adjusted through an external resistor (REXT input)
 Output current accuracy
 4 % between output channels
 6 % between PCA9745B devices
 Open/short load/overtemperature detection mode to detect individual LED errors
 4-wire serial bus interface with 25 MHz data clock rate
 256-step (8-bit) linear programmable brightness per LED output varying from fully off
(default) to maximum brightness fully ON using a 31.25 kHz PWM signal
 256-step group brightness control allows general dimming (using a 122 Hz PWM
signal) from fully off to maximum brightness (default)
 256-step group blinking with frequency programmable from 15 Hz to 16.8 s and duty
cycle from 0 % to 99.6 %
 Active LOW Output Enable (OE) input pin allows for hardware blinking and dimming of
the LEDs
 8 MHz internal oscillator requires no external components
 Internal power-on reset
 Noise filter on SDI/SCLK inputs
 No glitch on LEDn outputs on power-up
 Low standby current
 Operating power supply voltage (VDD) range of 3 V to 5.5 V
 5.5 V tolerant inputs on non-LED pins
 40 C to +105 C operation
 ESD protection exceeds 4 kV HBM per JESD22-A114
 Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
 Packages offered: HTSSOP28
PCA9745B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 16 June 2016
© NXP B.V. 2016. All rights reserved.
2 of 48
PCA9745B
NXP Semiconductors
16-channel SPI serial bus 57 mA/20 V constant current LED driver
3. Applications








Amusement products
RGB or RGBA LED drivers
LED status information
LED displays
LCD backlights
Keypad backlights for cellular phones or handheld devices
Fade-in and fade-out for breathlight control
Automotive lighting (PCA9745BTW/Q900)
4. Ordering information
Table 1.
Ordering information
Type number
Topside mark
Name
Description
PCA9745BTW
PCA9745BTW
HTSSOP28
plastic thermal enhanced thin shrink small
SOT1172-3
outline package; 28 leads; body width 4.4 mm;
lead pitch 0.65 mm; exposed die pad
PCA9745BTW/Q900[1]
PCA9745BTW
HTSSOP28
plastic thermal enhanced thin shrink small
SOT1172-3
outline package; 28 leads; body width 4.4 mm;
lead pitch 0.65 mm; exposed die pad
[1]
Package
Version
AEC-Q100 compliant.
4.1 Ordering options
Table 2.
Ordering options
Type number
Orderable part
number
Package
PCA9745BTW
PCA9745BTWJ
HTSSOP28 Reel 13" Q1/T1
2500
*Standard mark SMD
Tamb = 40 C to +105 C
PCA9745BTW/Q900 PCA9745BTW/Q900J HTSSOP28 Reel 13" Q1/T1
2500
*Standard mark SMD
Tamb = 40 C to +105 C
PCA9745B
Product data sheet
Packing method
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 16 June 2016
Minimum
order
quantity
Temperature
© NXP B.V. 2016. All rights reserved.
3 of 48
PCA9745B
NXP Semiconductors
16-channel SPI serial bus 57 mA/20 V constant current LED driver
5. Block diagram
REXT
LED0
LED1
LED14
LED15
I/O
REGULATOR
PCA9745B
DAC0
SCLK
INPUT FILTER
DAC1
SDI
CS
individual LED
current setting
8-bit DACs
4-WIRE
SERIAL BUS
CONTROL
SDO
DAC
14
DAC
15
POWER-ON
RESET
VDD
OUTPUT DRIVER, DELAY CONTROL,
AND THERMAL SHUTDOWN
VSS
INPUT
FILTER
RESET
LED STATE
SELECT
REGISTER
PWM
REGISTER X
BRIGHTNESS
CONTROL
÷ 256
31.25 kHz
8 MHz
OSCILLATOR
GRADATION
CONTROL
GRPFREQ
REGISTER
MUX/
CONTROL
GRPPWM
REGISTER
DIM CLOCK
'0' – permanently OFF
'1' – permanently ON
OE
aaa-019148
Dim repetition rate = 122 Hz
Blink repetition rate = 15 Hz to every 16.8 seconds
Fig 1.
Block diagram of PCA9745B
PCA9745B
Product data sheet
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Rev. 1 — 16 June 2016
© NXP B.V. 2016. All rights reserved.
4 of 48
PCA9745B
NXP Semiconductors
16-channel SPI serial bus 57 mA/20 V constant current LED driver
6. Pinning information
6.1 Pinning
REXT
1
28 VDD
VSS
2
27 SDI
SDO
3
CS
4
OE
5
24 VSS
LED0
6
23 LED15
LED1
7
22 LED14
LED2
8
21 LED13
LED3
9
VSS 10
PCA9745BTW
26 SCLK
25 RESET
20 LED12
(1)
19 VSS
LED4 11
18 LED11
LED5 12
17 LED10
LED6 13
16 LED9
LED7 14
15 LED8
aaa-019149
(1) Thermal pad; connected to VSS.
Fig 2.
Pin configuration for HTSSOP28
6.2 Pin description
Table 3.
PCA9745B
Product data sheet
Pin description
Symbol
Pin
Type
Description
REXT
1
I
current set resistor input; resistor to ground
SDO
3
O
serial data output
CS
4
I
active LOW chip select
OE
5
I
active LOW output enable for LEDs
LED0
6
O
LED driver 0
LED1
7
O
LED driver 1
LED2
8
O
LED driver 2
LED3
9
O
LED driver 3
LED4
11
O
LED driver 4
LED5
12
O
LED driver 5
LED6
13
O
LED driver 6
LED7
14
O
LED driver 7
LED8
15
O
LED driver 8
LED9
16
O
LED driver 9
LED10
17
O
LED driver 10
LED11
18
O
LED driver 11
LED12
20
O
LED driver 12
LED13
21
O
LED driver 13
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Rev. 1 — 16 June 2016
© NXP B.V. 2016. All rights reserved.
5 of 48
PCA9745B
NXP Semiconductors
16-channel SPI serial bus 57 mA/20 V constant current LED driver
Table 3.
Pin description …continued
Symbol
Pin
Type
Description
LED14
22
O
LED driver 14
LED15
23
O
LED driver 15
RESET
25
I
active LOW reset input with external 10 k
pull-up resistor
SCLK
26
I
serial clock line
SDI
27
I
serial data input
ground
supply ground
power supply
supply voltage
VSS
2, 10, 19, 24
VDD
28
[1]
[1]
HTSSOP28 package supply ground is connected to both VSS pins and exposed center pad. VSS pins must
be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board
level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad
on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the
printed-circuit board in the thermal pad region.
7. Functional description
Refer to Figure 1 “Block diagram of PCA9745B”.
7.1 Register address and data
Following a chip select (CS) asserted condition (from HIGH to LOW), the data transfers
are (16  n) bits wide (where ‘n’ is the number of slaves in the chain) with MSB transferred
first. The first 7 bits are the address of the register to be accessed. The eighth bit indicates
the types of access — read (= 1) or write (= 0). The second group of 8 bits consists of data
as shown in Figure 3.
See Section 8 “Characteristics of the 4-wire SPI serial-bus interface” for more detail.
7-bit register address
D15 D14 D13 D12 D11 D10 D9
data byte
D8
D7
D6
D5
D4
D3
D2
D1
(MSB)
R/W
Fig 3.
D0
(LSB)
aaa-011888
Register address and data format for each slave
7.2 Register definitions
Table 4.
Register summary
Register
D6
number (hex)
D5
D4
D3
D2
D1
D0
Name
Type
00h
0
0
0
0
0
0
0
MODE1
read/write Mode register 1
01h
0
0
0
0
0
0
1
MODE2
read/write Mode register 2
02h
0
0
0
0
0
1
0
LEDOUT0
read/write LED output state 0
03h
0
0
0
0
0
1
1
LEDOUT1
read/write LED output state 1
04h
0
0
0
0
1
0
0
LEDOUT2
read/write LED output state 2
05h
0
0
0
0
1
0
1
LEDOUT3
read/write LED output state 3
PCA9745B
Product data sheet
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Rev. 1 — 16 June 2016
Function
© NXP B.V. 2016. All rights reserved.
6 of 48
PCA9745B
NXP Semiconductors
16-channel SPI serial bus 57 mA/20 V constant current LED driver
Table 4.
Register summary …continued
Register
D6
number (hex)
D5
D4
D3
D2
D1
D0
Name
Type
06h
0
0
0
0
1
1
0
GRPPWM
read/write group duty cycle control
07h
0
0
0
0
1
1
1
GRPFREQ
read/write group frequency
08h
0
0
0
1
0
0
0
PWM0
read/write brightness control LED0
09h
0
0
0
1
0
0
1
PWM1
read/write brightness control LED1
0Ah
0
0
0
1
0
1
0
PWM2
read/write brightness control LED2
0Bh
0
0
0
1
0
1
1
PWM3
read/write brightness control LED3
0Ch
0
0
0
1
1
0
0
PWM4
read/write brightness control LED4
0Dh
0
0
0
1
1
0
1
PWM5
read/write brightness control LED5
0Eh
0
0
0
1
1
1
0
PWM6
read/write brightness control LED6
0Fh
0
0
0
1
1
1
1
PWM7
read/write brightness control LED7
10h
0
0
1
0
0
0
0
PWM8
read/write brightness control LED8
11h
0
0
1
0
0
0
1
PWM9
read/write brightness control LED9
12h
0
0
1
0
0
1
0
PWM10
read/write brightness control LED10
13h
0
0
1
0
0
1
1
PWM11
read/write brightness control LED11
14h
0
0
1
0
1
0
0
PWM12
read/write brightness control LED12
15h
0
0
1
0
1
0
1
PWM13
read/write brightness control LED13
16h
0
0
1
0
1
1
0
PWM14
read/write brightness control LED14
17h
0
0
1
0
1
1
1
PWM15
read/write brightness control LED15
18h
0
0
1
1
0
0
0
IREF0
read/write output gain control register 0
19h
0
0
1
1
0
0
1
IREF1
read/write output gain control register 1
1Ah
0
0
1
1
0
1
0
IREF2
read/write output gain control register 2
1Bh
0
0
1
1
0
1
1
IREF3
read/write output gain control register 3
1Ch
0
0
1
1
1
0
0
IREF4
read/write output gain control register 4
1Dh
0
0
1
1
1
0
1
IREF5
read/write output gain control register 5
1Eh
0
0
1
1
1
1
0
IREF6
read/write output gain control register 6
1Fh
0
0
1
1
1
1
1
IREF7
read/write output gain control register 7
20h
0
1
0
0
0
0
0
IREF8
read/write output gain control register 8
21h
0
1
0
0
0
0
1
IREF9
read/write output gain control register 9
22h
0
1
0
0
0
1
0
IREF10
read/write output gain control register 10
23h
0
1
0
0
0
1
1
IREF11
read/write output gain control register 11
24h
0
1
0
0
1
0
0
IREF12
read/write output gain control register 12
25h
0
1
0
0
1
0
1
IREF13
read/write output gain control register 13
26h
0
1
0
0
1
1
0
IREF14
read/write output gain control register 14
27h
0
1
0
0
1
1
1
IREF15
read/write output gain control register 15
28h
0
1
0
1
0
0
0
RAMP_RATE_GRP0
read/write ramp enable and rate control
for group 0
29h
0
1
0
1
0
0
1
STEP_TIME_GRP0
read/write step time control for group 0
2Ah
0
1
0
1
0
1
0
HOLD_CNTL_GRP0
read/write hold ON/OFF time control for
group 0
2Bh
0
1
0
1
0
1
1
IREF_GRP0
read/write output gain control for group 0
PCA9745B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 16 June 2016
Function
© NXP B.V. 2016. All rights reserved.
7 of 48
PCA9745B
NXP Semiconductors
16-channel SPI serial bus 57 mA/20 V constant current LED driver
Table 4.
Register summary …continued
Register
D6
number (hex)
D5
D4
D3
D2
D1
D0
Name
Type
2Ch
0
1
0
1
1
0
0
RAMP_RATE_GRP1
read/write ramp enable and rate control
for group 1
2Dh
0
1
0
1
1
0
1
STEP_TIME_GRP1
read/write step time control for group 1
2Eh
0
1
0
1
1
1
0
HOLD_CNTL_GRP1
read/write hold ON/OFF time control for
group 1
2Fh
0
1
0
1
1
1
1
IREF_GRP1
read/write output gain control for group 1
30h
0
1
1
0
0
0
0
RAMP_RATE_GRP2
read/write ramp enable and rate control
for group 2
31h
0
1
1
0
0
0
1
STEP_TIME_GRP2
read/write step time control for group 2
32h
0
1
1
0
0
1
0
HOLD_CNTL_GRP2
read/write hold ON/OFF time control for
group 2
33h
0
1
1
0
0
1
1
IREF_GRP2
read/write output gain control for group 2
34h
0
1
1
0
1
0
0
RAMP_RATE_GRP3
read/write ramp enable and rate control
for group 3
35h
0
1
1
0
1
0
1
STEP_TIME_GRP3
read/write step time control for group 3
36h
0
1
1
0
1
1
0
HOLD_CNTL_GRP3
read/write hold ON/OFF time control for
group 3
37h
0
1
1
0
1
1
1
IREF_GRP3
read/write output gain control for group 3
38h
0
1
1
1
0
0
0
GRAD_MODE_SEL0
read/write gradation mode select register
for channel 7 to channel 0
39h
0
1
1
1
0
0
1
GRAD_MODE_SEL1
read/write gradation mode select register
for channel 15 to channel 8
3Ah
0
1
1
1
0
1
0
GRAD_GRP_SEL0
read/write gradation group select for
channel 3 to channel 0
3Bh
0
1
1
1
0
1
1
GRAD_GRP_SEL1
read/write gradation group select for
channel 7 to channel 4
3Ch
0
1
1
1
1
0
0
GRAD_GRP_SEL2
read/write gradation group select for
channel 11 to channel 8
3Dh
0
1
1
1
1
0
1
GRAD_GRP_SEL3
read/write gradation group select for
channel 15 to channel 12
3Eh
0
1
1
1
1
1
0
GRAD_CNTL
read/write gradation control register for all
four groups
3Fh
0
1
1
1
1
1
1
OFFSET
read/write Offset/delay on LEDn outputs
40h
1
0
0
0
0
0
0
PWMALL
write only
brightness control for all LEDn
41h
1
0
0
0
0
0
1
IREFALL
write only
output gain control for all
registers IREF0 to IREF15
42h
1
0
0
0
0
1
0
EFLAG0
read only
output error flag 0
43h
1
0
0
0
0
1
1
EFLAG1
read only
output error flag 1
44h
1
0
0
0
1
0
0
EFLAG2
read only
output error flag 2
45h
1
0
0
0
1
0
1
EFLAG3
read only
output error flag 3
46h
1
0
0
0
1
1
0
to
:
:
:
:
:
:
:
reserved[1]
read only
not used
7Fh
1
1
1
1
1
1
1
[1]
Function
Reserved registers should not be written to and will always read back as zeros.
PCA9745B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 16 June 2016
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PCA9745B
NXP Semiconductors
16-channel SPI serial bus 57 mA/20 V constant current LED driver
7.2.1 MODE1 — Mode register 1
Table 5.
MODE1 - Mode register 1 (address 00h) bit description
Legend: * default value.
Bit
Symbol
Access
Value
Description
7
-
read only
0*
reserved
6
-
R/W
0*
reserved
5
-
R/W
0*
reserved
4
SLEEP
R/W
0*
Normal mode[1].
1
Low-power mode. Oscillator off[2][3].
3
-
R/W
0*
reserved
2
-
R/W
0*
reserved
1
-
R/W
0*
reserved
0
-
R/W
0*
reserved
[1]
It takes 500 s max. for the oscillator to be up and running once SLEEP bit has been set to logic 0. Timings
on LEDn outputs are not guaranteed if PWMx, GRPPWM or GRPFREQ registers are accessed within the
500 s window.
[2]
No blinking, dimming or gradation control is possible when the oscillator is off.
[3]
The device must be reset if the LED driver output state is set to LDRx=11 after the device is set back to
Normal mode.
7.2.2 MODE2 — Mode register 2
Table 6.
MODE2 - Mode register 2 (address 01h) bit description
Legend: * default value.
Bit
Symbol
Access
Value
Description
7
OVERTEMP
read only
0*
O.K.
1
overtemperature condition
6
ERROR
read only
0*
no error at LED outputs
1
any open or short-circuit detected in error flag
registers (EFLAGn)
0*
group control = dimming
1
group control = blinking
0*
self clear after write ‘1’
1
Write ‘1’ to clear all error status bits in EFLAGn
register and ERROR (bit 6). The EFLAGn and
ERROR bit will set to ‘1’ if open or short-circuit is
detected again.
5
4
DMBLNK
CLRERR
R/W
write only
3
-
R/W
0*
reserved
2
EXP_EN
R/W
0*
linear adjustment for gradation control
1
exponential adjustment for gradation control
1
-
read only
0*
reserved
0
-
read only
1*
reserved
Brightness adjustment for gradation control is either linear or exponential by setting the
EXP_EN bit as shown in Figure 4. When EXP_EN = 0, linear adjustment scale is used.
When EXP_EN = 1, exponential scale is used.
PCA9745B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 16 June 2016
© NXP B.V. 2016. All rights reserved.
9 of 48
PCA9745B
NXP Semiconductors
16-channel SPI serial bus 57 mA/20 V constant current LED driver
002aah635
255
IREF_OUT
200
EXP_EN = 0
150
100
EXP_EN = 1
50
0
0
50
100
150
200
255
IREF_IN
Fig 4.
PCA9745B
Product data sheet
Linear and exponential adjustment curves
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10 of 48
PCA9745B
NXP Semiconductors
16-channel SPI serial bus 57 mA/20 V constant current LED driver
7.2.3 LEDOUT0 to LEDOUT3, LED driver output state
Table 7.
LEDOUT0 to LEDOUT3 - LED driver output state registers (address 02h to 05h)
bit description
Legend: * default value.
Address
Register
Bit
Symbol
Access
Value
Description
02h
LEDOUT0
7:6
LDR3
R/W
10*
LED3 output state control
5:4
LDR2
R/W
10*
LED2 output state control
3:2
LDR1
R/W
10*
LED1 output state control
1:0
LDR0
R/W
10*
LED0 output state control
7:6
LDR7
R/W
10*
LED7 output state control
5:4
LDR6
R/W
10*
LED6 output state control
3:2
LDR5
R/W
10*
LED5 output state control
1:0
LDR4
R/W
10*
LED4 output state control
7:6
LDR11
R/W
10*
LED11 output state control
5:4
LDR10
R/W
10*
LED10 output state control
3:2
LDR9
R/W
10*
LED9 output state control
1:0
LDR8
R/W
10*
LED8 output state control
7:6
LDR15
R/W
10*
LED15 output state control
5:4
LDR14
R/W
10*
LED14 output state control
3:2
LDR13
R/W
10*
LED13 output state control
1:0
LDR12
R/W
10*
LED12 output state control
03h
04h
05h
LEDOUT1
LEDOUT2
LEDOUT3
LDRx = 00 — LED driver x is off (x = 0 to 15).
LDRx = 01 — LED driver x is fully on (individual brightness and group dimming/blinking
not controlled). The OE pin can be used as external dimming/blinking control in this state.
LDRx = 10 — LED driver x individual brightness can be controlled through its PWMx
register (default power-up state) or PWMALL register for all LEDn outputs.
LDRx = 11 — LED driver x individual brightness and group dimming/blinking can be
controlled through its PWMx register and the GRPPWM registers.
Remark: Setting the device in low power mode while being on group dimming/blinking
mode (LDRx = 11) may cause the LED output state to be in an unknown state after the
device is set back to normal mode. The device must be reset and all register values
reprogrammed.
7.2.4 GRPPWM, group duty cycle control
Table 8.
GRPPWM - Group brightness control register (address 06h) bit description
Legend: * default value
Address
Register
Bit
Symbol
Access
Value
Description
06h
GRPPWM
7:0
GDC[7:0]
R/W
1111 1111*
GRPPWM register
When DMBLNK bit (MODE2 register) is programmed with logic 0, a 122 Hz fixed
frequency signal is superimposed with the 31.25 kHz individual brightness control signal.
GRPPWM is then used as a global brightness control allowing the LED outputs to be
dimmed with the same value. The value in GRPFREQ is then a ‘Don’t care’.
PCA9745B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 16 June 2016
© NXP B.V. 2016. All rights reserved.
11 of 48
PCA9745B
NXP Semiconductors
16-channel SPI serial bus 57 mA/20 V constant current LED driver
General brightness for the 16 outputs is controlled through 255 linear steps from 00h
(0 % duty cycle = LED output off) to FFh (99.6 % duty cycle = maximum brightness).
Applicable to LED outputs programmed with LDRx = 11 (LEDOUT0 to LEDOUT3
registers).
When DMBLNK bit is programmed with logic 1, GRPPWM and GRPFREQ registers
define a global blinking pattern, where GRPFREQ contains the blinking period (from
67 ms to 16.8 s) and GRPPWM the duty cycle (ON/OFF ratio in %).
GDC  7:0 
duty cycle = -------------------------256
(1)
7.2.5 GRPFREQ, group frequency
Table 9.
GRPFREQ - Group frequency register (address 07h) bit description
Legend: * default value.
Address
Register
Bit
Symbol
Access
Value
Description
07h
GRPFREQ
7:0
GFRQ[7:0]
R/W
0000 0000*
GRPFREQ register
GRPFREQ is used to program the global blinking period when DMBLNK bit (MODE2
register) is equal to 1. Value in this register is a ‘Don’t care’ when DMBLNK = 0.
Applicable to LED outputs programmed with LDRx = 11 (LEDOUT0 to LEDOUT3
registers).
Blinking period is controlled through 256 linear steps from 00h (67 ms, frequency 15 Hz)
to FFh (16.8 s).
GFRQ  7:0  + 1
global blinking period = ----------------------------------------  s 
15.26
(2)
7.2.6 PWM0 to PWM15, individual brightness control
Table 10. PWM0 to PWM15 - PWM registers 0 to 15 (address 08h to 17h) bit description
Legend: * default value.
PCA9745B
Product data sheet
Address
Register
Bit
Symbol
Access
Value
08h
PWM0
7:0
IDC0[7:0]
R/W
0000 0000* PWM0 Individual Duty Cycle
09h
PWM1
7:0
IDC1[7:0]
R/W
0000 0000* PWM1 Individual Duty Cycle
0Ah
PWM2
7:0
IDC2[7:0]
R/W
0000 0000* PWM2 Individual Duty Cycle
0Bh
PWM3
7:0
IDC3[7:0]
R/W
0000 0000* PWM3 Individual Duty Cycle
0Ch
PWM4
7:0
IDC4[7:0]
R/W
0000 0000* PWM4 Individual Duty Cycle
0Dh
PWM5
7:0
IDC5[7:0]
R/W
0000 0000* PWM5 Individual Duty Cycle
0Eh
PWM6
7:0
IDC6[7:0]
R/W
0000 0000* PWM6 Individual Duty Cycle
0Fh
PWM7
7:0
IDC7[7:0]
R/W
0000 0000* PWM7 Individual Duty Cycle
10h
PWM8
7:0
IDC8[7:0]
R/W
0000 0000* PWM8 Individual Duty Cycle
11h
PWM9
7:0
IDC9[7:0]
R/W
0000 0000* PWM9 Individual Duty Cycle
12h
PWM10
7:0
IDC10[7:0]
R/W
0000 0000* PWM10 Individual Duty Cycle
13h
PWM11
7:0
IDC11[7:0]
R/W
0000 0000* PWM11 Individual Duty Cycle
14h
PWM12
7:0
IDC12[7:0]
R/W
0000 0000* PWM12 Individual Duty Cycle
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Rev. 1 — 16 June 2016
Description
© NXP B.V. 2016. All rights reserved.
12 of 48
PCA9745B
NXP Semiconductors
16-channel SPI serial bus 57 mA/20 V constant current LED driver
Table 10.
PWM0 to PWM15 - PWM registers 0 to 15 (address 08h to 17h) bit description
…continued
Address
Register
Bit
Symbol
Access
Value
Description
15h
PWM13
7:0
IDC13[7:0]
R/W
0000 0000* PWM13 Individual Duty Cycle
16h
PWM14
7:0
IDC14[7:0]
R/W
0000 0000* PWM14 Individual Duty Cycle
17h
PWM15
7:0
IDC15[7:0]
R/W
0000 0000* PWM15 Individual Duty Cycle
A 31.25 kHz fixed frequency signal is used for each output. Duty cycle is controlled
through 255 linear steps from 00h (0 % duty cycle = LED output off) to FEh
(99.2 % duty cycle = LED output at maximum brightness) and FFh (100 % duty cycle =
LED output completed ON). Applicable to LED outputs programmed with LDRx = 10 or 11
(LEDOUT0 to LEDOUT3 registers).
IDCx  7:0 
duty cycle = --------------------------256
(3)
Remark: The first lower end 8 steps of PWM and the last (higher end) steps of PWM will
not have effective brightness control of LEDs due to edge rate control of LED output pins.
7.2.7 IREF0 to IREF15, LED output current value registers
These registers reflect the gain settings for output current for LED0 to LED15.
Table 11.
IREF0 to IREF15 - LED output gain control registers (address 18h to 27h)
bit description
Legend: * default value.
PCA9745B
Product data sheet
Address
Register
Bit
Access
Value
Description
18h
IREF0
7:0
R/W
00h*
LED0 output current setting
19h
IREF1
7:0
R/W
00h*
LED1 output current setting
1Ah
IREF2
7:0
R/W
00h*
LED2 output current setting
1Bh
IREF3
7:0
R/W
00h*
LED3 output current setting
1Ch
IREF4
7:0
R/W
00h*
LED4 output current setting
1Dh
IREF5
7:0
R/W
00h*
LED5 output current setting
1Eh
IREF6
7:0
R/W
00h*
LED6 output current setting
1Fh
IREF7
7:0
R/W
00h*
LED7 output current setting
20h
IREF8
7:0
R/W
00h*
LED8 output current setting
21h
IREF9
7:0
R/W
00h*
LED9 output current setting
22h
IREF10
7:0
R/W
00h*
LED10 output current setting
23h
IREF11
7:0
R/W
00h*
LED11 output current setting
24h
IREF12
7:0
R/W
00h*
LED12 output current setting
25h
IREF13
7:0
R/W
00h*
LED13 output current setting
26h
IREF14
7:0
R/W
00h*
LED14 output current setting
27h
IREF15
7:0
R/W
00h*
LED15 output current setting
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 16 June 2016
© NXP B.V. 2016. All rights reserved.
13 of 48
PCA9745B
NXP Semiconductors
16-channel SPI serial bus 57 mA/20 V constant current LED driver
7.2.8 Gradation control
Gradation control is designed to use four independent groups of registers to program the
full cycle of the gradation timing to implement on each selected channel. Each group has
four registers to define the ramp rate, step time, hold ON/OFF time, and final hold ON
current, as shown in Figure 5.
output current
(mA)
final current
set in
IREF_GRPx
hold ON
ramp-down
ramp-up
hold OFF
T1
T2
T3
T4
time (second)
T1
full cycle
002aah636
Fig 5.
Gradation timing
• The ‘final’ and ‘hold ON’ current is defined in IREF_GRPx register value  (225 A if
REXT = 1 k, or 112.5 A if REXT = 2 k).
• Ramp rate value and enable/disable ramp operation is defined in
RAMP_RATE_GRPx register.
• Total number of ramp steps (or level changes) is calculated as
‘IREF_GRPx value’  ‘ramp rate value in RAMP_RATE_GRPx’. Rounds a number up
to the next integer if the total number is not an integer.
• Time for each step is calculated as ‘cycle time’  ‘multiple factor’ bits in
STEP_TIME_GRPx register. Minimum time for one step is 0.5 ms (0.5 ms  1) and
maximum time is 512 ms (8 ms  64).
• The ramp-up or ramp-down time (T1 or T3) is calculated as
‘(total steps + 1)’  ‘step time’.
• Hold ON or OFF time (T2 or T4) is defined in HOLD_CNTL_GRPx register in the
range of 0/0.25/0.5/0.75/1/2/4/6 seconds.
• Gradation start or stop with single shot mode (one full cycle only) or continuous mode
(repeat full cycle) is defined in the GRAD_CNTL register for all groups.
• Each channel can be assigned to one of these four groups in the GRAD_GRP_SELx
register.
• Each channel can set either normal mode or gradation mode operation in the
GRAD_MODE_SELx register.
To enable the gradation operation, the following steps are required:
1. Program all gradation control registers except the gradation start bit in GRAD_CNTL
register.
2. Program either LDRx = 01 (LED fully ON mode) only, or LDRx = 10 or 11 (PWM
control mode) with individual brightness control PWMx register for duty cycle.
PCA9745B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 16 June 2016
© NXP B.V. 2016. All rights reserved.
14 of 48
PCA9745B
NXP Semiconductors
16-channel SPI serial bus 57 mA/20 V constant current LED driver
3. Program output current value IREFx register to non-zero, which will enable LED
output.
4. Set the gradation start bit in GRAD_CNTL register for enabling gradation operation.
7.2.8.1
RAMP_RATE_GRP0 to RAMP_RATE_GRP3, ramp rate control registers
Table 12.
RAMP_RATE_GRP[0:3] - Ramp enable and rate control registers (address 28h,
2Ch, 30h, 34h) for each group bit description
Legend: * default value.
Address
Register
Bit
Access
Value
Description
28h
RAMP_RATE_GRP0
7
R/W
0*
Ramp-up disable
2Ch
RAMP_RATE_GRP1
1
Ramp-up enable
30h
RAMP_RATE_GRP2
6
R/W
0*
Ramp-down disable
34h
RAMP_RATE_GRP3
1
Ramp-down enable
0x00*
Ramp rate value per step is defined
from 1 (00h) to 64 (3Fh)[1][2]
5:0
7.2.8.2
R/W
[1]
Total number of ramp steps is defined as ‘IREF_GRP[7:0]’  ‘ramp_rate[5:0]’. (Round up to next integer if it
is not an integer number.)
[2]
Per step current increment or decrement is calculated by the (ramp_rate  Iref), where the Iref reference
current is 112.5 A (REXT = 2 k) or 225 A (REXT = 1 k).
STEP_TIME_GRP0 to STEP_TIME_GRP3, step time control registers
Table 13.
STEP_TIME_GRP[0:3] - Step time control registers (address 29h, 2Dh, 31h, 35h)
for each group bit description
Legend: * default value.
Address
Register
Bit
Access
Value
Description
29h
STEP_TIME_GRP0
7
read only
0*
reserved
2Dh
STEP_TIME_GRP1
6
R/W
0*
Cycle time is set to 0.5 ms
31h
STEP_TIME_GRP2
1
Cycle time is set to 8 ms
35h
STEP_TIME_GRP3
5:0
R/W
0x00*
Multiple factor per step, the
multiple factor is defined from
1 (00h) to 64 (3Fh)[1]
[1]
PCA9745B
Product data sheet
Step time = cycle time (0.5 ms or 8 ms)  multiple factor (1 ~ 64); minimum step time is 0.5 ms and
maximum step time is 512 ms.
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15 of 48
PCA9745B
NXP Semiconductors
16-channel SPI serial bus 57 mA/20 V constant current LED driver
7.2.8.3
HOLD_CNTL_GRP0 to HOLD_CNTL_GRP3, hold ON and OFF control registers
Table 14.
HOLD_CNTL_GRP[0:3] - Hold ON and OFF enable and time control registers
(address 2Ah, 2Eh, 32h, 36h) for each group bit description
Legend: * default value.
Address
Register
Bit
Access
Value
Description
2Ah
HOLD_CNTL_GRP0
7
R/W
0*
Hold ON disable
2Eh
HOLD_CNTL_GRP1
1
Hold ON enable
32h
HOLD_CNTL_GRP2
0*
Hold OFF disable
36h
HOLD_CNTL_GRP3
1
Hold OFF enable
000*
Hold ON time select:[1]
6
5:3
R/W
R/W
000: 0 s
001: 0.25 s
010: 0.5 s
011: 0.75 s
100: 1 s
101: 2 s
110: 4 s
111: 6 s
2:0
R/W
000*
Hold OFF time select:[1]
000: 0 s
001: 0.25 s
010: 0.5 s
011: 0.75 s
100: 1 s
101: 2 s
110: 4 s
111: 6 s
[1]
7.2.8.4
Hold ON or OFF minimum time is 0 s and maximum time is 6 s.
IREF_GRP0 to IREF_GRP3, output gain control
Table 15.
IREF_GRP[0:3] - Final and hold ON output gain setting registers
(address 2Bh, 2Fh, 33h, 37h) for each group bit description
Legend: * default value.
Address
Register
Bit
Access
Value
Description
2Bh
IREF_GRP0
7:0
R/W
00h*
2Fh
IREF_GRP1
Final ramp-up and hold ON output
current gain setting[1]
33h
IREF_GRP2
37h
IREF_GRP3
[1]
PCA9745B
Product data sheet
Output current = Iref  IREF_GRPx[7:0], where Iref is reference current. Iref = 112.5 A if REXT = 2 k,
or Iref = 225 A if REXT = 1 k
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Rev. 1 — 16 June 2016
© NXP B.V. 2016. All rights reserved.
16 of 48
PCA9745B
NXP Semiconductors
16-channel SPI serial bus 57 mA/20 V constant current LED driver
7.2.8.5
GRAD_MODE_SEL0 to GRAD_MODE_SEL1, Gradation mode select registers
Table 16.
GRAD_MODE_SEL[0:1] - Gradation mode select register for channel 15 to
channel 0 (address 38h, 39h) bit description
Legend: * default value.
Address
Register
38h
GRAD_MODE_SEL0 7:0
39h
7.2.8.6
Bit
GRAD_MODE_SEL1 7:0
Access
Value
Description[1][2]
R/W
00*
Normal operation mode for
channel 7 to channel 0
FFh
Gradation operation mode for
channel 7 to channel 0
00*
Normal operation mode for
channel 15 to channel 8
FFh
Gradation operation mode for
channel 15 to channel 8
R/W
[1]
Each bit represents one channel that can set either 0 for normal mode (use IREFx to set individual LED
output current), or 1 for gradation mode (use IREF_GRPx to set group LEDs output current.).
[2]
In gradation mode, it only affects the source of the IREF current level and does not affect the PWMx
operation or LEDOUTx registers’ function. It is possible to use the gradation feature, individual PWMx and
group PWM simultaneously.
GRAD_GRP_SEL0 to GRAD_GRP_SEL3, Gradation group select registers
Table 17.
GRAD_GRP_SEL[0:3] - Gradation group select register for channel 15 to
channel 0 (address 3Ah, 3Bh, 3Ch, 3Dh) bit description
Legend: * default value.
Access
Value Description[1]
GRAD_GRP_SEL0 7:6
R/W
00*
Gradation group select for LED3 output
5:4
R/W
00*
Gradation group select for LED2 output
3:2
R/W
00*
Gradation group select for LED1 output
Address Register
3Ah
3Bh
3Ch
3Dh
[1]
PCA9745B
Product data sheet
Bit
1:0
R/W
00*
Gradation group select for LED0 output
GRAD_GRP_SEL1 7:6
R/W
01*
Gradation group select for LED7 output
5:4
R/W
01*
Gradation group select for LED6 output
3:2
R/W
01*
Gradation group select for LED5 output
1:0
R/W
01*
Gradation group select for LED4 output
GRAD_GRP_SEL2 7:6
R/W
10*
Gradation group select for LED11 output
5:4
R/W
10*
Gradation group select for LED10 output
3:2
R/W
10*
Gradation group select for LED9 output
1:0
R/W
10*
Gradation group select for LED8 output
GRAD_GRP_SEL3 7:6
R/W
11*
Gradation group select for LED15 output
5:4
R/W
11*
Gradation group select for LED14 output
3:2
R/W
11*
Gradation group select for LED13 output
1:0
R/W
11*
Gradation group select for LED12 output
LED[3:0] outputs default assigned to group 0; LED[7:4] outputs default assigned to group 1;
LED[11:8] outputs default assigned to group 2; LED[15:12] outputs default assigned to group 3.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 16 June 2016
© NXP B.V. 2016. All rights reserved.
17 of 48
PCA9745B
NXP Semiconductors
16-channel SPI serial bus 57 mA/20 V constant current LED driver
7.2.8.7
GRAD_CNTL, Gradation control register
Table 18.
GRAD_CNTL - Gradation control register for group 3 to group 0 (address 3Eh)
bit description
Legend: * default value.
Address
Register
Bit
Access
Value
Description
3Eh
GRAD_CNTL
7
R/W
0*
Gradation stop or done for group 3[1]
1
Gradation start for group 3[2]
0*
Single shot operation for group 3
1
Continuous operation for group 3
0*
Gradation stop or done for group 2[1]
1
Gradation start for group 2[2]
0*
Single shot operation for group 2
1
Continuous operation for group 2
0*
Gradation stop or done for group 1[1]
1
Gradation start for group 1[2]
0*
Single shot operation for group 1
1
Continuous operation for group 1
0*
Gradation stop or done for group 0[1]
1
Gradation start for group 0[2]
0*
Single shot operation for group 0
1
Continuous operation for group 0
6
5
4
3
2
1
0
PCA9745B
Product data sheet
R/W
R/W
R/W
R/W
R/W
R/W
R/W
[1]
When the gradation operation is forced to stop, the output current stops immediately and is frozen at the
last output level.
[2]
This bit will be self-cleared when single mode is completed, and writing 0 to this bit will force to stop the
gradation operation when single mode is not completed or continuous mode is running.
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Rev. 1 — 16 June 2016
© NXP B.V. 2016. All rights reserved.
18 of 48
PCA9745B
NXP Semiconductors
16-channel SPI serial bus 57 mA/20 V constant current LED driver
7.2.8.8
Ramp control — equation and calculation example
IREF_GRPx
(max. = 255)
225 μA × 250 = 56.25 mA
250
200
150
s1
100
50
(step time)
(32 ms)
0
End with
current zero
t1
time
ramp-up
hold ON
ramp-down
hold OFF
(T = 192 ms)
(0.25 s)
(T = 192 ms)
(0.5 s)
Start from
current zero
Fig 6.
(step current)
(11.25 mA)
full cycle
002aah637
Ramp calculation example 1
• t1 (step time) = cycle time  multiple factor, where:
– Cycle time = 0.5 ms (fast ramp) or 8 ms (slow ramp) in STEP_TIME_GRPx[6]
– Multiple factor = 6-bit, from 1 (00h) to 64 (3Fh) counts in STEP_TIME_GRPx[5:0]
• s1 (step current) = ramp_rate  Iref, where:
– ramp_rate = 6-bit, from 1 (00h) to 64 (3Fh) counts in RAMP_RATE_GRPx[5:0]
– Iref = reference current either 112.5 A if REXT = 2 k, or 225 A if REXT = 1 k
• S (total steps) = (IREF_GRPx / ramp_rate), where:
– IREF_GRPx = output current gain setting, 8-bit, up to 255 counts
– ramp_rate = 6-bit, up to 64 counts in RAMP_RATE_GRPx[5:0]
– If it is not an integer, then round up to next integer number.
• T (ramp time) = (S (total steps) + 1)  t1 (step time)
– Ramp-up time starts from zero current and ends at the maximum current
– Ramp-down time starts from the maximum current and ends at the zero current
Calculation example 1 (Figure 6):
• Assumption:
– Iref = 225 A if REXT = 1 k
– Output hold ON current = 225 A  250 = 56.25 mA (IREF_GRPx[7:0] = FAh)
– Cycle time = 0.5 ms (STEP_TIME_GRPx[6] = 0)
– Multiple factor = 64 (STEP_TIME_GRPx[5:0] = 3Fh)
– Ramp rate = 50 (RAMP_RATE_GRPx[5:0] = 31h)
– Hold ON = 0.25 s (HOLD_CNTL_GRPx[5:3] = 001)
– Hold OFF = 0.5 s (HOLD_CNTL_GRPx[2:0] = 010)
• t1 (step time) = cycle time (0.5 ms)  multiple (64) = 32 ms
• Step current = ramp_rate  Iref = 50  225 A = 11.25 mA
PCA9745B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 16 June 2016
© NXP B.V. 2016. All rights reserved.
19 of 48
PCA9745B
NXP Semiconductors
16-channel SPI serial bus 57 mA/20 V constant current LED driver
• S (total steps) = (IREF_GRPx  ramp_rate) = (250  50) = 5 steps
• T (ramp time) = (S + 1)  t1 = 6  32 ms = 192 ms
IREF_GRPx
(max. = 255)
240
(54 mA)
200
t1
(step time)
(32 ms)
150
190
140
s1
100
(step current)
90
50
(11.25 mA)
0
40
time
ramp-up
hold ON
ramp-down
hold OFF
(T = 192 ms)
(0.25 s)
(T = 192 ms)
(0.5 s)
full cycle
Fig 7.
002aah674
Ramp calculation example 2
Calculation example 2:
• Assumption:
– Iref = 225 A if REXT = 1 k
– Output hold ON current = 225 A  240 = 54 mA (IREF_GRPx[7:0] = F0h)
– Cycle time = 0.5 ms (STEP_TIME_GRPx[6] = 0)
– Multiple factor = 64 (STEP_TIME_GRPx[5:0] = 3Fh)
– Ramp rate = 50 (RAMP_RATE_GRPx[5:0] = 31h)
– Hold ON = 0.25 s (HOLD_CNTL_GRPx[5:3] = 001)
– Hold OFF = 0.5 s (HOLD_CNTL_GRPx[2:0] = 010)
• t1 (step time) = cycle time (0.5 ms)  multiple (64) = 32 ms
• Step current = ramp_rate  Iref = 50  225 A = 11.25 mA (except the last one)
• S (total steps) = IREF_GRPx  ramp_rate = 240  50 = 4.8 steps (round up to next
integer) = 5 steps
• T (ramp time) = (S + 1)  t1 = 6  32 ms = 192 ms
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
(enable bit)
Ramp UP
(enable bit)
Hold ON
(enable bit)
Ramp DOWN
(enable bit)
Hold OFF
1
0
0
0
0
2
1
0
0
0
3
0
1
0
0
4
1
1
0
0
5
0
0
1
0
6
1
0
1
0
7
0
1
1
0
8
1
1
1
0
9
0
0
0
1
10
1
0
0
1
11
0
1
0
1
12
1
1
0
1
13
0
0
1
1
14
1
0
1
1
15
0
1
1
1
16
1
1
1
1
Single shot waveform
Continuous waveform
wavefrom when initial current is not zero
the moment when START bit changes to 0 (single shot sequence ends)
aaa-009234
Fig 8.
PCA9745B
Product data sheet
Gradation output waveform in single shot or continuous mode
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
7.2.9 OFFSET — LEDn output delay offset register
Table 19. OFFSET - LEDn output delay offset register (address 3Fh) bit description
Legend: * default value.
Address
Register
3Fh
OFFSET
Bit
Access
Value
Description
7:4
read only
0000*
not used
3:0
R/W
1000*
LEDn output delay offset factor
The PCA9745B can be programmed to have turn-on delay between LED outputs. This
helps to reduce peak current for the VDD supply and reduces EMI.
The order in which the LED outputs are enabled will always be the same (channel 0 will
enable first and channel 15 will enable last).
OFFSET control register bits [3:0] determine the delay used between the turn-on times as
follows:
0000 = no delay between outputs (all on, all off at the same time)
0001 = delay of 1 clock cycle (125 ns) between successive outputs
0010 = delay of 2 clock cycles (250 ns) between successive outputs
0011 = delay of 3 clock cycles (375 ns) between successive outputs
:
1111 = delay of 15 clock cycles (1.875 s) between successive outputs
Example: If the value in the OFFSET register is 1000 the corresponding delay =
8  125 ns = 1 s delay between successive outputs.
channel 0 turns on at time 0 s
channel 1 turns on at time 1 s
channel 2 turns on at time 2 s
channel 3 turns on at time 3 s
channel 4 turns on at time 4 s
channel 5 turns on at time 5 s
channel 6 turns on at time 6 s
channel 7 turns on at time 7 s
channel 8 turns on at time 8 s
channel 9 turns on at time 9 s
channel 10 turns on at time 10 s
channel 11 turns on at time 11 s
channel 12 turns on at time 12 s
channel 13 turns on at time 13 s
channel 14 turns on at time 14 s
channel 15 turns on at time 15 s
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
7.2.10 PWMALL — brightness control for all LEDn outputs
When programmed, the value in this register will be used for PWM duty cycle for all the
LEDn outputs and will be reflected in PWM0 through PWM15 registers.
Table 20.
PWMALL - brightness control for all LEDn outputs register (address 40h)
bit description
Legend: * default value.
Address
Register
Bit
Access
Value
Description
40h
PWMALL
7:0
write only
0000 0000*
duty cycle for all LEDn outputs
Remark: Write to any of the PWM0 to PWM15 registers will overwrite the value in
corresponding PWMn register programmed by PWMALL.
7.2.11 IREFALL register: output current value for all LED outputs
The output current setting for all outputs is held in this register. When this register is
written to or updated, all LED outputs will be set to a current corresponding to this register
value.
Writes to IREF0 to IREF15 will overwrite the output current settings.
Table 21. IREFALL - Output gain control for all LED outputs (address 41h) bit description
Legend: * default value.
Address
Register
Bit
Access
Value
Description
41h
IREFALL
7:0
write only
00h*
Current gain setting for all LED outputs.
7.2.12 LED driver constant current outputs
In LED display applications, PCA9745B provides nearly no current variations from
channel to channel and from device to device. The maximum current skew between
channels is less than 4 % and less than 6 % between devices.
7.2.12.1
Adjusting output current
The PCA9745B scales up the reference current (Iref) set by the external resistor (Rext) to
sink the output current (IO) at each output port. The maximum output current for the
outputs can be set using Rext. In addition, the constant value for current drive at each of
the outputs is independently programmable using command registers IREF0 to IREF15.
Alternatively, programming the IREFALL register allows all outputs to be set at one current
value determined by the value in IREFALL register.
Equation 4 and Equation 5 can be used to calculate the minimum and maximum constant
current values that can be programmed for the outputs for a chosen Rext.
900 mV 1
I O _LED_MIN = -------------------  ---  minimum constant current 
4
R ext
(4)
900 mV 255
I O _LED_MAX =  255  I O _LED_MIN  =  -------------------  ---------
 R ext
4 
(5)
900 mV 1
For a given IREFx setting, I O _LED = IREFx  -------------------  --- .
4
R ext
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
002aag288
80
IREFx = 255
IO(LEDn)
(mA)
60
40
20
0
1
2
4
3
5
6
8
7
9
10
Rext (kΩ)
IO(LEDn) (mA) = IREFx  (0.9 / 4) / Rext (k)
maximum IO(LEDn) (mA) = 255  (0.9 / 4) / Rext (k)
Remark: Default IREFx at power-up = 0.
Fig 9.
Maximum ILED versus Rext
Example 1: If Rext = 1 k, IO_LED_MIN = 225 A, IO_LED_MAX = 57.375 mA (as shown
in Figure 10).
So each channel can be programmed with its individual IREFx in 256 steps and in 225 A
increments to a maximum output current of 57.375 mA independently.
002aah691
60
IO(target)
(mA)
50
57.375
40
30
20
10
0
0
32
64
96
128
160
192
224
255
IREFx[7:0] value
Fig 10. IO(target) versus IREFx value with Rext = 1 k
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
Example 2: If Rext = 2 k, IO_LED_MIN = 112.5 A, IO_LED_MAX = 28.687 mA (as
shown in Figure 11).
So each channel can be programmed with its individual IREFx in 256 steps and in
112.5 A increments to a maximum output channel of 28.687 mA independently.
002aah667
30
IO(target)
(mA)
20
10
0
0
32
64
96
128
160
192
255
224
IREFx[7:0] value
Fig 11. IO(target) versus IREFx value with Rext = 2 k
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
7.2.13 LED error detection
The PCA9745B is capable of detecting an LED open or a short condition at its open-drain
LED outputs. Users will recognize these faults by reading the status of a pair of error bits
(ERRx) in error flag registers (EFLAGn) for each channel. Both LDRx value in LEDOUTx
registers and IREFx value must be set to ‘00’ for those unused LED output channels. If the
output is selected to be fully on, individual dim, or individual and group dim, that channel
will be tested.
The user can poll the ERROR status bit (bit 6 in MODE2 register) to check if there is a
fault condition in any of the 16 channels. The EFLAGn registers can then be read to
determine which channels are at fault and the type of fault in those channels. The error
status reported by the EFLAGn register is real time information that will get self cleared
once the error is fixed and write ‘1’ to CLRERR bit (bit 4 in MODE2 register).
Remark: When LED outputs programmed with LDRx = 10 or 11 in LEDOUT[3:0]
registers, checks for open and short-circuit will not occur if the PWM value in PWM0 to
PWM15 registers is less than 8 or 255 (100 % duty cycle).
Table 22. EFLAG0 to EFLAG3 - Error flag registers (address 42h to 45h) bit description
Legend: * default value.
Address
Register
Bit
Symbol
Access
Value
Description
42h
EFLAG0
7:6
ERR3
R only
00*
Error status for LED3 output
5:4
ERR2
R only
00*
Error status for LED2 output
3:2
ERR1
R only
00*
Error status for LED1 output
1:0
ERR0
R only
00*
Error status for LED0 output
7:6
ERR7
R only
00*
Error status for LED7 output
5:4
ERR6
R only
00*
Error status for LED6 output
3:2
ERR5
R only
00*
Error status for LED5 output
1:0
ERR4
R only
00*
Error status for LED4 output
7:6
ERR11
R only
00*
Error status for LED11 output
5:4
ERR10
R only
00*
Error status for LED10 output
3:2
ERR9
R only
00*
Error status for LED9 output
1:0
ERR8
R only
00*
Error status for LED8 output
7:6
ERR15
R only
00*
Error status for LED15 output
5:4
ERR14
R only
00*
Error status for LED14 output
3:2
ERR13
R only
00*
Error status for LED13 output
1:0
ERR12
R only
00*
Error status for LED12 output
43h
EFLAG1
44h
EFLAG2
45h
Table 23.
EFLAG3
ERRx bit description
LED error detection
status
PCA9745B
Product data sheet
ERRx
Description
Bit 1
Bit 0
No error
0
0
In normal operation and no error
Short-circuit
0
1
Detected LED short-circuit condition
Open-circuit
1
0
Detected LED open-circuit condition
DNE (Do Not Exist)
1
1
This condition does not exist
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
7.2.13.1
Open-circuit detection principle
The PCA9745B LED open-circuit detection compares the effective current level IO with the
open load detection threshold current Ith(det). If IO is below the threshold Ith(det), the
PCA9745B detects an open load condition. This error status can be read out as an
error flag through the EFLAGn registers. For open-circuit error detection of an output
channel, that channel must be ON.
Table 24.
Open-circuit detection
State of
output port
Condition of
output current
Error status code
Description
OFF
IO = 0 mA
ON
[1]
7.2.13.2
0
detection not possible
IO <
Ith(det)[1]
1
open-circuit
IO 
Ith(det)[1]
this channel open error
status bit is 0
normal
Ith(det) = 0.5  IO(target) (typical). This threshold may be different for each I/O and only depends on IREFx and
Rext.
Short-circuit detection principle
The LED short-circuit detection compares the effective output voltage level (VO) with the
shorted-load detection threshold voltages Vth(trig). If VO is above the Vth(trig) threshold, the
PCA9745B detects a shorted-load condition. If VO is below the Vth(trig) threshold, no error
is detected and error bit is set to ‘0’. This error status can be read out as an error flag
through the EFLAGn registers. For short-circuit error detection of an output channel, that
channel must be ON.
Table 25.
Short-circuit detection
State of
output port
Condition of
output voltage
Error status code
Description
OFF
-
0
detection not possible
ON
VO 
1
short-circuit
this channel short error
status bit is 0
normal
Vth(trig)[1]
VO < Vth(trig)
[1]
[1]
Vth  2.85 V.
Remark: The error status distinguishes between an LED short condition and an LED
open condition. Upon detecting an LED short or open, the corresponding LED outputs
should be turned OFF to prevent heat dissipation for a short in the chip. Although an open
event will not be harmful, the outputs should be turned OFF for both occasions to repair
the LED string.
7.2.14 Overtemperature protection
If the PCA9745B chip temperature exceeds its limit (Tth(otp) (rising) maximum, see
Table 28), all output channels will be disabled until the temperature drops below its limit
minus a small hysteresis (Tth(otp) (hysteresis) maximum, see Table 28). When an
overtemperature situation is encountered, the OVERTEMP flag (bit 7) is set in the
MODE2 register. Once the die temperature reduces below the
Tth(otp) rising  Tth(otp) hysteresis, the chip will return to the same condition it was prior to
the overtemperature event and the OVERTEMP flag will be cleared.
PCA9745B
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
7.3 Active LOW output enable input
The active LOW output enable (OE) pin on PCA9745B allows to enable or disable all the
LED outputs at the same time.
• When a LOW level is applied to OE pin, all the LED outputs are enabled.
• When a HIGH level is applied to OE pin, all the LED outputs are high-impedance.
The OE pin can be used as a synchronization signal to switch on/off several PCA9745B
devices at the same time when LED drive output state is set fully ON (LDRx = 01 in
LEDOUTx register) in these devices. This requires an external clock reference that
provides blinking period and the duty cycle.
The OE pin can also be used as an external dimming control signal. The frequency of the
external clock must be high enough not to be seen by the human eye, and the duty cycle
value determines the brightness of the LEDs.
Remark: Do not use OE as an external blinking control signal when internal global
blinking is selected (DMBLNK = 1, MODE2 register) since it will result in an undefined
blinking pattern. Do not use OE as an external dimming control signal when internal global
dimming is selected (DMBLNK = 0, MODE2 register) since it will result in an undefined
dimming pattern.
7.4 Power-on reset
When power is applied to VDD, an internal power-on reset holds the PCA9745B in a reset
condition until VDD has reached VPOR. At this point, the reset condition is released and the
PCA9745B registers and serial bus state machine are initialized to their default states (all
zeroes) causing all the channels to be deselected. Thereafter, VDD must be pulled lower
than 1 V and stay LOW for longer than 20 s. The device will reset itself, and allow 2 ms
for the device to fully wake up.
7.5 Hardware reset recovery
When a reset of PCA9745B is activated using an active LOW input on the RESET pin, a
reset pulse width of 2.5 s minimum is required. The maximum wait time after RESET pin
is released is 1.5 ms.
PCA9745B
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
7.6 Individual brightness control with group dimming/blinking
A 31.25 kHz fixed frequency signal with programmable duty cycle (8 bits, 256 steps) is
used to control individually the brightness for each LED.
On top of this signal, one of the following signals can be superimposed (this signal can be
applied to the 16 LED outputs LED0 to LED15).
• A lower 122 Hz fixed frequency signal with programmable duty cycle (8 bits,
256 steps) is used to provide a global brightness control.
• A programmable frequency signal from 15 Hz to every 16.8 seconds (8 bits,
256 steps) with programmable duty cycle (8 bits, 256 steps) is used to provide a
global blinking control.
1
2
3
4
5
6
7
8
9 10 11 12
251
252
253
254
255
256
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
9 10 11
Brightness Control signal (LEDn)
N × 125 ns
with N = (0 to 255)
(PWMx Register)
M × 256 × 125 ns
with M = (0 to 255)
(GRPPWM Register)
256 × 125 ns = 32 μs
(31.25 kHz)
Group Dimming signal
256 × 256 × 125 ns = 8.19 ms (122 Hz)
1
2
3
4
5
6
7
8
resulting Brightness + Group Dimming signal
002aaf935
Minimum pulse width for LEDn Brightness Control is 125 ns.
Minimum pulse width for Group Dimming is 32 s.
When M = 1 (GRPPWM register value), the resulting LEDn Brightness Control + Group Dimming signal will have 1 pulse of the
LED Brightness Control signal (pulse width = N  125 ns, with ‘N’ defined in PWMx register).
This resulting Brightness + Group Dimming signal above shows a resulting Control signal with M = 8.
Fig 12. Brightness + Group Dimming signals
PCA9745B
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
8. Characteristics of the 4-wire SPI serial-bus interface
The PCA9745B communicates through a daisy-chain SPI-compatible 4-wire serial
interface. The interface has three inputs and one output: serial clock (SCLK), active LOW
chip select (CS), serial data in (SDI) and serial data output (SDO). CS must be LOW to
clock data into the device, and SDI must be stable when sampled on the rising edge of
SCLK. The PCA9745B will ignore all activity on SCLK and SDI except when CS is LOW.
8.1 SPI-compatible 4-wire serial interface signals
CS — The active LOW chip select line is used to activate and access the SPI slaves. As
long as CS is HIGH, all slaves will not accept the clock signal or data, and the output SDO
is in high-impedance state. Whenever this pin is in a logic LOW state, data can be
transferred between the master and all slaves.
SCLK — Serial clock is provided by SPI master and determines the speed of the data
transfer. All receiving and sending data are done synchronously (clocks the internal SPI
shift register and the output driver) to this clock.
SDI — Serial Data In is read on the rising edge of SCLK into the internal 16-bit shift
registers. On the rising edge of CS, the input data is latched into the internal registers of
the device. The device ignores all activity on SDI when CS is de-asserted.
SDO — Serial Data Out is the pin on which the internal 16-bit shift registers data is shifted
out serially. SDO is in a high-impedance state until the CS pin goes to a logic LOW state.
New data will appear at the SDO pin following the falling edge of SCLK.
All slave devices can be daisy-chained by connecting the SDO of one device to the SDI of
the next device, and driving SCLK and CS lines in parallel. Figure 13 depicts how the
slaves are connected to the master. All slave devices are accessed at the same time with
CS. An access requires (16  n) clock cycles, where ‘n’ is the number of slave devices.
As long as CS is LOW, the SPI registers are working as simple shift registers and shifting
through the SDI data without interpreting the different control and data bits. When CS
goes back to HIGH, the bits in the SPI registers are interpreted and the SPI logic is
activated.
Only the first slave in the chain receives the control and data bits directly from the SPI
Master. Every other slave in the network receives its SDI data from the SDO output of the
preceding slave in the chain, and the SDO of the last slave is then connected to the data
input (MISO) of SPI Master. Each slave has 16-bit shift registers shifted in from SDI and
shifted out to SDO, along with the SCLK clock. The whole chain acts as a 48-bit
(n  16-bit, where ‘n’ is number of slaves) big shift register.
CS
SPI
MASTER
CS
SCLK
MOSI
MISO
PCA9745B
SCLK
SDI
(slave 1)
SDO
CS
PCA9745B
SCLK
SDI
(slave 2)
SDO
CS
PCA9745B
SCLK
SDI
(slave 3)
SDO
aaa-019151
Fig 13. System level connection
PCA9745B
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
8.2 Data format
As shown in Figure 14, the data transfers are 16-bit  n bits wide (where ‘n’ is the number
of slaves) with MSB transferred first. The first 7 bits, D[15:9], form the address of the
register to be accessed, the eighth bit (D8) indicates the types of access, either read (= 1)
or write (= 0), and the last 8 bits, D[7:0], consist of data. Register read and write
sequences (described in the following sections) always begin from the bus idle condition.
The bus idle condition refers to CS being HIGH and SCLK being in a LOW state.
first byte
second byte
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
MSB
LSB
register address
MSB
R/W
LSB
data
aaa-011890
Fig 14. Data format
8.3 Write access sequence
The registers are written using the following write sequence (from a bus idle condition)
when the system has three slaves daisy-chained together:
1. All the slave devices in chain will be involved in a write or read operation. Every slave
device in the chain is a portion of one big shift register.
2. Drive CS LOW. This enables the internal 16-bit shift register.
3. Shift 16  n bits of data (where ‘n’ is the number of slaves) into the first slave device in
a MSB-first fashion. Data is shifted on the rising edge of SCLK and must be stable
during the rising edge of SCLK.
4. The 8th bit of the data for every 16 bits (each device) must be a ‘0’, indicating it is a
write transfer.
5. After the last bit of data is transferred, drive SCLK LOW and de-assert CS (drive it
HIGH).
6. When CS goes from LOW to HIGH, the data in the shift register is latched into the
device registers.
If fewer than 16 bits of data are transferred before de-asserting CS, then the data is
ignored and the register will not be updated. The write transfer format is shown in
Figure 15.
PCA9745B
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
CS
SCLK
SDI
16 clocks
16 clocks
16 clocks
WR (slave 3)
WR (slave 2)
WR (slave 1)
WR (slave 3)
WR (slave 2)
SDO
(slave 1)
SDO
(slave 2)
WR (slave 3)
SDO
(slave 3)
aaa-011891
Fig 15. Write access
8.4 Read access sequence
The registers are read using the following read sequence (from a bus idle condition) when
the system has three slaves daisy-chained as shown in Figure 16.
1. The master sends the first three 2-byte read instructions with 48 clocks, where the
first byte is a 7-bit register address, an eighth bit set to one, followed by dummy data
byte (all ones).
2. The Read instruction is decoded when CS is de-asserted (from LOW to HIGH).
3. The read data is shifted out on SDO when CS is asserted again (from HIGH to LOW).
4. The master sends the second three 2-byte ‘No Operation’ (NOP) operations (all ones)
with 48 clocks and reads the requested data on MISO in sequence where the first
byte is dummy data (don’t care), followed by the read data byte.
5. A read cycle consists of asserting and de-asserting of CS twice.
MOSI
11111111
(NOP)
MISO XXXXXXXX
11111111
(NOP)
11111111
(NOP)
11111111
(NOP)
11111111
(NOP)
11111111
(NOP)
Data 3
XXXXXXXX
Data 2
XXXXXXXX
Data 1
CS
SCLK
MOSI
16 clocks
16 clocks
16 clocks
RD slave 3
RD slave 2
RD slave 1
MISO
16 clocks
16 clocks
16 clocks
NOP
NOP
NOP
Slave 3 OUT
Slave 2 OUT
Slave 1 OUT
aaa-011892
Fig 16. Read access
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
8.5 Overlapped read and write access sequence
The registers are read and write overlapped using the following sequence (from a bus idle
condition) when the system has three slaves daisy-chained as shown in Figure 17.
1. The second phase of the read cycle can be used to send in write data or the next read
instruction. This increases the bus utility and hence efficiency.
2. The master sends the first three 2-byte read instructions with 48 clocks, where the
first byte is a 7-bit register address, the eighth bit is set to one, followed by dummy
data byte (all ones).
3. The read instruction is decoded when CS is de-asserted (from LOW to HIGH).
4. Start to shift read data out on SDO when CS is asserted again (from HIGH to LOW)
and start to send in the next read or write instruction on the SDI line.
MOSI
Write 3
MISO XXXXXXXX
WR Data 3
Write 2
WR Data 2
Write 1
WR Data 1
RD Data 3
XXXXXXXX
RD Data 2
XXXXXXXX
RD Data 1
CS
SCLK
MOSI
16 clocks
16 clocks
16 clocks
16 clocks
16 clocks
16 clocks
RD slave 3
RD slave 2
RD slave 1
WR slave 3
WR slave 2
WR slave 1
Slave 3 OUT
Slave 2 OUT
Slave 1 OUT
MISO
aaa-011893
Fig 17. Overlapped read and write access
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
9. Application design-in information
VDD = 3.3 V or 5.0 V
10 kΩ(1)
10 kΩ(2)
up to 20 V
SPI
SERIAL BUS
MASTER
VDD
CS
LED1
CS
MISO
SDO
MOSI
SDI
SCLK
SCLK
OE
LED2
LED3
OE
RESET
LED0
LED4
RESET
LED5
PCA9745B
LED6
LED7
REXT
LED8
ISET
LED9
LED10
LED11
LED12
LED13
LED14
VSS
LED15
VSS
C
10 μF
aaa-019150
(1) OE requires pull-up resistor if control signal from the master is open-drain
(2) RESET requires a pull-up resistor of <100k if not used or connected to open-drain output
Fig 18. Typical application
9.1 Thermal considerations
Since the PCA9745B device integrates 16 linear current sources, thermal considerations
should be taken into account to prevent overheating, which can cause the device to go
into thermal shutdown.
Perhaps the major contributor for device’s overheating is the LED forward voltage
mismatch. This is because it can cause significant voltage differences between the LED
strings of the same type (for example, 2 V to 3 V), which ultimately translates into higher
power dissipation in the device. The voltage drop across the LED channels of the device
is given by the difference between the supply voltage and the LED forward voltage of each
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
LED string. Reducing this to a minimum (for example, 0.8 V) helps to keep the power
dissipation down. Therefore LEDs binning is recommended to minimize LED voltage
forward variation and reduce power dissipation in the device.
In order to ensure that the device will not go into thermal shutdown when operating under
certain application conditions, its junction temperature (Tj) should be calculated to ensure
that is below the overtemperature threshold limit (130 C). The Tj of the device depends
on the ambient temperature (Tamb), device’s total power dissipation (Ptot), and thermal
resistance.
The device junction temperature can be calculated by using the following equation:
T j = T amb + R th  j-a   P tot
(6)
where:
Tj = junction temperature
Tamb = ambient temperature
Rth(j-a) = junction to ambient thermal resistance
Ptot = (device) total power dissipation
An example of this calculation is show below:
Conditions:
Tamb = 50 C
Rth(j-a) = 39 C/W (per JEDEC 51 standard for multilayer PCB)
ILED = 30 mA / channel
IDD(max) = 20 mA
VDD = 5 V
LEDs per channel = 5 LEDs / channel
LED VF(typ) = 3 V per LED (15 V total for 5 LEDs in series)
LED VF mismatch = 0.2 V per LED (1 V total for 5 LEDs in series)
Vreg(drv) = 0.8 V (This will be present only in the LED string with the highest LED forward
voltage.)
Vsup = LED VF(typ) + LED VF mismatch + Vreg(drv) = 15 V + 1 V + 0.8 V = 16.8 V
Ptot calculation:
Ptot = IC_power + LED drivers_power;
IC_power = (IDD  VDD)
IC_power = (0.02 A  5 V) = 0.1 W
LED drivers_power = [(16  1)  (ILED)  (LED VF mismatch + Vreg(drv))] +
(ILED  Vreg(drv))
LED drivers_power = [15  0.03 A  (1 V + 0.8 V)] + (0.03 A  0.8 V)] = 0.834 W
Ptot = 0.1 W + 0.834 W = 0.934 W
Tj calculation:
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
Tj = Tamb + Rth(j-a)  Ptot
Tj = 50 C + (39 C/W  0.934 W) = 86.426 C
This confirms that the junction temperature is below the minimum overtemperature
threshold of 130 C, which ensures the device will not go into thermal shutdown under
these conditions.
It is important to mention that the value of the thermal resistance junction-to-ambient
(Rth(j-a)) strongly depends in the PCB design. Therefore, the thermal pad of the device
should be attached to a big enough PCB copper area to ensure proper thermal dissipation
(similar to JEDEC 51 standard). Several thermal vias in the PCB thermal pad should be
used as well to increase the effectiveness of the heat dissipation (for example, 15 thermal
vias). The thermal vias should be distributed evenly in the PCB thermal pad.
Finally, it is important to point out that this calculation should be taken as a reference only
and therefore evaluations should still be performed under the application environment and
conditions to confirm proper system operation.
10. Limiting values
Table 26. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
VDD
Min
Max
Unit
supply voltage
0.5
+6.0
V
VI/O
voltage on an input/output pin
VSS  0.5
5.5
V
Vdrv(LED)
LED driver voltage
VSS  0.5
20
V
IO(LEDn)
output current on pin LEDn
-
65
mA
ISS
ground supply current
-
1.0
A
Ptot
total power dissipation
-
2.56
W
Tstg
storage temperature
Tamb
ambient temperature
Tj
junction temperature
Conditions
Tamb = 25 C
Tamb = 85 C
-
1.03
W
Tamb = 105 C
-
0.513
W
65
+150
C
operating for non AEC-Q100
40
+105
C
operating for AEC-Q100
40
+105
C
40
+125
C
11. Thermal characteristics
Table 27.
Symbol
Rth(j-a)
[1]
Thermal characteristics
Parameter
Conditions
thermal resistance from junction to ambient
HTSSOP28
[1]
Typ
Unit
39
C/W
Per JEDEC 51 standard for multilayer PCB and Wind Speed (m/s) = 0.
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
12. Static characteristics
Table 28. Static characteristics
VDD = 3 V to 5.5 V; VSS = 0 V; Tamb = 40 C to +105 C; unless otherwise specified.
Symbol
Parameter
Min
Typ[1]
Max
Unit
3
-
5.5
V
Rext = 2 k; LED[15:0] = off;
IREFx = 00h
-
11
12
mA
Rext = 1 k; LED[15:0] = off;
IREFx = 00h
-
13
14
mA
Rext = 2 k; LED[15:0] = on;
IREFx = FFh
-
15
19
mA
Rext = 1 k; LED[15:0] = on;
IREFx = FFh
-
17
21
mA
VDD = 3.3 V
-
170
600
A
VDD = 5.5 V
-
170
700
A
-
2
-
V
-
1
-
V
-
+0.3VDD V
Conditions
Supply
VDD
supply voltage
IDD
supply current
Istb
VPOR
VPDR
standby current
power-on reset voltage
power-down reset voltage
on pin VDD; operating mode;
fSCLK = 25 MHz
on pin VDD; no load; fSCLK = 0 Hz;
MODE1[4] = 1; VI = VDD
no load; VI = VDD or VSS
no load; VI = VDD or VSS
[2][3]
Inputs CS, SDI, SCLK; output SDO
VIL
LOW-level input voltage
0.5
VIH
HIGH-level input voltage
0.7VDD -
5.5
V
VOH
HIGH-level output voltage
IOH = 3 mA at SDO
VDD 
0.5
-
-
V
VOL
LOW-level output voltage
IOL = 3 mA at SDO
-
-
0.5
V
IL
leakage current
VI = VDD or VSS
1
-
+1
A
Ci
input capacitance
VI = VSS
-
6
10
pF
Current controlled outputs (LED[15:0])
IO(LEDn)
output current on pin LEDn
VO = 0.8 V; IREFx = 80h; Rext = 1 k
25
-
30
mA
[3]
50
-
60
mA
between bits
(different ICs, same channel)
[4]
-
-
6
%
between bits (2 channels, same IC)
[5]
-
-
4
%
20
V
VO = 0.8 V; IREFx = FFh; Rext = 1 k
IO
output current variation
VDD = 3.0 V; Tamb = 25 C; VO = 0.8 V;
IREFx = 80h; Rext = 1 k; guaranteed
by design
Vreg(drv)
driver regulation voltage
minimum regulation voltage;
IREFx = FFh; Rext = 1 k
0.8
1
IL(off)
off-state leakage current
VO = 20 V
-
-
1
A
Vtrip
trip voltage
short LED protection; Error flag will trip
during verification test if VO  Vtrip;
Rext = 1 k
2.7
2.85
-
V
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
Table 28. Static characteristics …continued
VDD = 3 V to 5.5 V; VSS = 0 V; Tamb = 40 C to +105 C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ[1]
Max
-
+0.3VDD V
Unit
OE input, RESET input
VIL
LOW-level input voltage
0.5
VIH
HIGH-level input voltage
0.7VDD -
5.5
V
ILI
input leakage current
1
-
+1
A
[3]
-
3.7
5
pF
rising
[3]
130
-
150
C
hysteresis
[3]
15
-
30
C
input capacitance
Ci
Overtemperature protection
Tth(otp)
[1]
overtemperature protection
threshold temperature
Typical limits at VDD = 3.3 V, Tamb = 25 C.
[2]
VDD must be lowered to 1 V in order to reset part.
[3]
Value not tested in production, but guaranteed by design and characterization.
[4]
Part-to-part mismatch is calculated:
I O  LED0  + I O  LED1  +  + I O  LED14  + I O  LED15 
  --------------------------------------------------------------------------------------------------------------------------- – ideal output current 


16
% =  ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------  100
ideal
output
current




where ‘ideal output current’ = 28.68 mA (Rext = 1 k, IREFx = 80h).
[5]
Channel-to-channel mismatch is calculated:


I O  LEDn   where n = 0 to 15 


% =  --------------------------------------------------------------------------------------------------------------------------------- – 1  100
  I O  LED0  + I O  LED1  +  + I O  LED14  + I O  LED15 

  --------------------------------------------------------------------------------------------------------------------------

16
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
13. Dynamic characteristics
Table 29.
Dynamic characteristics[1]
Symbol
Parameter
fSCLK
Conditions
Min
Typ
Max
Unit
SCLK clock frequency
0
-
25
MHz
tLOW
LOW period of the SCLK clock
20
-
-
ns
tHIGH
HIGH period of the SCLK clock
20
-
-
ns
tDS
data set-up time
10
-
-
ns
tDH
data hold time
0
-
-
ns
tCSS
chip select asserted to SCLK rise set-up time
10
-
-
ns
tCSH
SCLK fall to chip select de-asserted hold time
0
-
-
ns
tCS_HI
minimum chip select de-asserted HIGH time
40
-
-
ns
td(SDO)
SDO delay time
-
-
20
ns
[1]
CL = 50 pF
All parameters tested at VDD = 3 V to 5.5 V; VSS = 0 V; Tamb = +25 C. Specifications over temperature are guaranteed by design.
CS
50%
50%
tLOW tHIGH
tCSS
50%
SCLK
tDS tDH
SDI
tCSH
D15
50%
50%
50%
tCS_HI
50%
1 / fSCLK
D14
D13
D2
D1
D15
D0
td(SDO)
SDO
D4
D3
D2
D1
D0
50%
aaa-011895
Fig 19. Definition of timing
14. Test information
VDD
PULSE
GENERATOR
VI
VO
RL
100 Ω
VDD or VLED
open
VSS
DUT
RT
CL
50 pF
002aag359
RL = Load resistor for LEDn.
CL = Load capacitance includes jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generators.
Fig 20. Test circuitry for switching times
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
15. Package outline
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Fig 21. Package outline SOT1172-3 (HTSSOP28)
PCA9745B
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
16. Handling information
All input and output pins are protected against ElectroStatic Discharge (ESD) under
normal handling. When handling ensure that the appropriate precautions are taken as
described in JESD625-A or equivalent standards.
17. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.
17.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
17.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
•
•
•
•
•
•
Board specifications, including the board finish, solder masks and vias
Package footprints, including solder thieves and orientation
The moisture sensitivity level of the packages
Package placement
Inspection and repair
Lead-free soldering versus SnPb soldering
17.3 Wave soldering
Key characteristics in wave soldering are:
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
• Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
• Solder bath specifications, including temperature and impurities
17.4 Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 22) than a SnPb process, thus
reducing the process window
• Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 30 and 31
Table 30.
SnPb eutectic process (from J-STD-020D)
Package thickness (mm)
Package reflow temperature (C)
Volume (mm3)
< 350
 350
< 2.5
235
220
 2.5
220
220
Table 31.
Lead-free process (from J-STD-020D)
Package thickness (mm)
Package reflow temperature (C)
Volume (mm3)
< 350
350 to 2000
> 2000
< 1.6
260
260
260
1.6 to 2.5
260
250
245
> 2.5
250
245
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 22.
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
temperature
maximum peak temperature
= MSL limit, damage level
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 22. Temperature profiles for large and small components
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
PCA9745B
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
18. Soldering: PCB footprints
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Fig 23. PCB footprint for SOT1172-3 (HTSSOP28); reflow soldering
PCA9745B
Product data sheet
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
19. Abbreviations
Table 32.
Abbreviations
Acronym
Description
CDM
Charged-Device Model
DAC
Digital-to-Analog Converter
DUT
Device Under Test
ESD
ElectroStatic Discharge
FET
Field-Effect Transistor
HBM
Human Body Model
LED
Light Emitting Diode
LSB
Least Significant Bit
MCU
MicroController Unit
MISO
Master In, Slave Out
MOSI
Master Out, Slave In
MSB
Most Significant Bit
NMOS
Negative-channel Metal-Oxide Semiconductor
PCB
Printed-Circuit Board
PMOS
Positive-channel Metal-Oxide Semiconductor
PWM
Pulse Width Modulation
RGB
Red/Green/Blue
RGBA
Red/Green/Blue/Amber
SMBus
System Management Bus
SPI
Serial Peripheral Interface
20. Revision history
Table 33.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PCA9745B v.1
20160616
Product data sheet
-
-
PCA9745B
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16-channel SPI serial bus 57 mA/20 V constant current LED driver
21. Legal information
21.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
21.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
21.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
PCA9745B
Product data sheet
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 16 June 2016
© NXP B.V. 2016. All rights reserved.
46 of 48
PCA9745B
NXP Semiconductors
16-channel SPI serial bus 57 mA/20 V constant current LED driver
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
21.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
22. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
PCA9745B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 16 June 2016
© NXP B.V. 2016. All rights reserved.
47 of 48
PCA9745B
NXP Semiconductors
16-channel SPI serial bus 57 mA/20 V constant current LED driver
23. Contents
1
2
3
4
4.1
5
6
6.1
6.2
7
7.1
7.2
7.2.1
7.2.2
7.2.3
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 2
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Ordering information . . . . . . . . . . . . . . . . . . . . . 3
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pinning information . . . . . . . . . . . . . . . . . . . . . . 5
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
Functional description . . . . . . . . . . . . . . . . . . . 6
Register address and data . . . . . . . . . . . . . . . . 6
Register definitions . . . . . . . . . . . . . . . . . . . . . . 6
MODE1 — Mode register 1 . . . . . . . . . . . . . . . 9
MODE2 — Mode register 2 . . . . . . . . . . . . . . . 9
LEDOUT0 to LEDOUT3, LED driver
output state . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
7.2.4
GRPPWM, group duty cycle control . . . . . . . . 11
7.2.5
GRPFREQ, group frequency . . . . . . . . . . . . . 12
7.2.6
PWM0 to PWM15, individual brightness
control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7.2.7
IREF0 to IREF15, LED output current value
registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7.2.8
Gradation control . . . . . . . . . . . . . . . . . . . . . . 14
7.2.8.1
RAMP_RATE_GRP0 to RAMP_RATE_GRP3,
ramp rate control registers . . . . . . . . . . . . . . . 15
7.2.8.2
STEP_TIME_GRP0 to STEP_TIME_GRP3, step
time control registers . . . . . . . . . . . . . . . . . . . 15
7.2.8.3
HOLD_CNTL_GRP0 to HOLD_CNTL_GRP3,
hold ON and OFF control registers. . . . . . . . . 16
7.2.8.4
IREF_GRP0 to IREF_GRP3, output gain
control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
7.2.8.5
GRAD_MODE_SEL0 to GRAD_MODE_SEL1,
Gradation mode select registers. . . . . . . . . . . 17
7.2.8.6
GRAD_GRP_SEL0 to GRAD_GRP_SEL3,
Gradation group select registers . . . . . . . . . . 17
7.2.8.7
GRAD_CNTL, Gradation control register . . . . 18
7.2.8.8
Ramp control — equation and calculation
example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7.2.9
OFFSET — LEDn output delay offset register 22
7.2.10
PWMALL — brightness control for all LEDn
outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.2.11
IREFALL register: output current value for
all LED outputs . . . . . . . . . . . . . . . . . . . . . . . . 23
7.2.12
LED driver constant current outputs . . . . . . . . 23
7.2.12.1 Adjusting output current . . . . . . . . . . . . . . . . . 23
7.2.13
LED error detection . . . . . . . . . . . . . . . . . . . . 26
7.2.13.1 Open-circuit detection principle . . . . . . . . . . . 27
7.2.13.2
7.2.14
7.3
7.4
7.5
7.6
8
8.1
8.2
8.3
8.4
8.5
9
9.1
10
11
12
13
14
15
16
17
17.1
17.2
17.3
17.4
18
19
20
21
21.1
21.2
21.3
21.4
22
23
Short-circuit detection principle . . . . . . . . . . .
Overtemperature protection . . . . . . . . . . . . . .
Active LOW output enable input . . . . . . . . . .
Power-on reset. . . . . . . . . . . . . . . . . . . . . . . .
Hardware reset recovery . . . . . . . . . . . . . . . .
Individual brightness control with group
dimming/blinking . . . . . . . . . . . . . . . . . . . . . .
Characteristics of the 4-wire SPI serial-bus
interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SPI-compatible 4-wire serial interface signals
Data format . . . . . . . . . . . . . . . . . . . . . . . . . .
Write access sequence . . . . . . . . . . . . . . . . .
Read access sequence . . . . . . . . . . . . . . . . .
Overlapped read and write access sequence
Application design-in information. . . . . . . . .
Thermal considerations . . . . . . . . . . . . . . . . .
Limiting values . . . . . . . . . . . . . . . . . . . . . . . .
Thermal characteristics . . . . . . . . . . . . . . . . .
Static characteristics . . . . . . . . . . . . . . . . . . .
Dynamic characteristics. . . . . . . . . . . . . . . . .
Test information . . . . . . . . . . . . . . . . . . . . . . .
Package outline. . . . . . . . . . . . . . . . . . . . . . . .
Handling information . . . . . . . . . . . . . . . . . . .
Soldering of SMD packages . . . . . . . . . . . . . .
Introduction to soldering. . . . . . . . . . . . . . . . .
Wave and reflow soldering. . . . . . . . . . . . . . .
Wave soldering . . . . . . . . . . . . . . . . . . . . . . .
Reflow soldering . . . . . . . . . . . . . . . . . . . . . .
Soldering: PCB footprints . . . . . . . . . . . . . . .
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . .
Revision history . . . . . . . . . . . . . . . . . . . . . . .
Legal information . . . . . . . . . . . . . . . . . . . . . .
Data sheet status . . . . . . . . . . . . . . . . . . . . . .
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . .
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . .
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . .
Contact information . . . . . . . . . . . . . . . . . . . .
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
27
27
28
28
28
29
30
30
31
31
32
33
34
34
36
36
37
39
39
40
41
41
41
41
41
42
44
45
45
46
46
46
46
47
47
48
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2016.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 16 June 2016
Document identifier: PCA9745B
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