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AN4337
Application note
The avalanche issue: comparing the impacts
of the IAR and EAS parameters
By Vittorio Giuffrida
Introduction
Generally, power MOSFETs are considered rugged with respect to the avalanche
phenomenon, however, the quantification of the level of ruggedness depends on the IAR
avalanche current and EAS avalanche energy. These two parameters determine the capacity
of a MOSFET to be safe during the avalanche. This paper explores the theory of the
avalanche effect in a flyback converter, in order to understand how the IAR and EAS
parameters affect MOSFET operation and, consequently, how to manage a voltage
overshoot higher than the V(BR)DSS absolute maximum rating.
June 2014
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Contents
AN4337
Contents
1
Avalanche failure mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Avalanche phenomenon in the flyback converter . . . . . . . . . . . . . . . . . 4
3
IAR and EAS electrical thermal approach . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1
EAS power/thermal evaluations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2
IAR electrical evaluations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4
Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
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1
Avalanche failure mode
Avalanche failure mode
Power MOSFETs have an intrinsic bipolar transistor in their structure. This vertical device,
as illustrated in Figure 1, consists of the P+ diffusion, the N- epitaxial layer and the N+
substrate with the base-emitter junction shorted by the source metalization, forming the
“Body Diode”. At the OFF-state, this non-symmetrical structure is reverse bias. The
maximum reverse bias voltage that can be applied to a p-n body diode is limited by
breakdown. When the applied voltage exceeds breakdown, a critical electrical field is
reached and the carriers in the transition region are consequently accelerated to energies
sufficient to free electron-hole pairs via collisions with bound electrons. This mechanism,
known as Avalanche phenomenon, causes an electrical current multiplication that can allow
very large currents within materials. Basically, the breakdown mechanism is not destructive
for a p-n junction, however, heating caused by the large breakdown current and high
breakdown voltage can damage a MOSFET device. In particular, two mechanisms can
generate the failure of MOSFETs. The first one occurs because of the creation of thermally
generated carriers in the epitaxial/bulk region and hence the creation of hot spots. The
second one depends on the avalanche current: if this current creates an increasing voltage
drop across the RB resistor (see Figure 1) sufficient to forward bias the parasitic BJT, it turns
on, with potentially catastrophic results as control of the switch is lost. Due to these “failure
modes”, the EAS and IAR parameters have been defined and inserted in the datasheets as
absolute maximum ratings. EAS is the maximum avalanche energy that can be dissipated in
the device during a single avalanche operation, while IAR is the maximum avalanche current
without any bipolar latch up.
Figure 1. MOSFET inside structure
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Avalanche phenomenon in the flyback converter
2
AN4337
Avalanche phenomenon in the flyback converter
Basically, the application designers don't allow the avalanche operation in a MOSFET
device; instead, the voltage across the drain-source is maintained at around 80-90% of
V(BR)DSS. However, in some cases greater voltage spikes can occur; one such example is
the flyback converter.
Figure 2. Flyback circuit schematic
7
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In the flyback converter, the basic issue is the presence of various leakage inductance
points in the transformer. If the inductor energy is not properly clamped, during MOSFET
turn-off, the leakage inductance causes voltage overshoots that can exceed the V(BR)DSS
absolute maximum rating of the MOSFET device. In particular when the MOSFET turns off,
the magnetic fields collapse and the voltage across the inductances reverses because the
current cannot interrupt suddenly. Since the leakage inductance doesn't participate in this
energy transfer, it cannot find a circulating path and thus generates a large positive spike on
the MOSFET drain. Therefore, the drain-source voltage is Vds=Vleakage + Vin + Vflyback,
where Vflyback is the reflected output voltage.
In these conditions, if the avalanche phenomenon occurs, IAR avalanche current and EAS
avalanche energy needs to be monitored.
Below is a typical waveform of the avalanche phenomenon occurring in a flyback converter
during the start up phase.
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Avalanche phenomenon in the flyback converter
Figure 3. Details of avalanche phenomenon
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IAR and EAS electrical thermal approach
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AN4337
IAR and EAS electrical thermal approach
The following section provides step-by-step guidelines on how to achieve the right trade-off
between performance and safety margin in terms of IAR and EAS specifications when a
MOSFET operates in a flyback converter. We essentially explain how to approach the
avalanche phenomenon in order to understand if a MOSFET device can function safely.
3.1
EAS power/thermal evaluations
The EAS single pulse avalanche rating in the datasheet is based on the assumption that the
device can sustain an avalanche if the starting case temperature is 25 °C and if a specific
value of ID is set.
The first step is to evaluate the maximum energy that the MOSFET must dissipate during
the single avalanche phenomenon. As previously mentioned, in the flyback converter, the
voltage spike across the drain-source of the MOSFET grows until the maximum V(BR)DSS is
reached. In the absence of an external clamping network, we estimate the amount of energy
Elk, due to the leakage inductance, dissipated in the power device.
Equation 1
∆t
1
Elk = ∫ Id (t )Vds(t )dt = I P ⋅ BVDss ⋅ ∆t
0
2
Where
Equation 2
∆t =
Llk ⋅ I P
BVDss − Vout N
Equation 3
Elk =
1 2
BVDss
I P ⋅ Llk
2
BVDss − Vout N
For example, consider the 650 V/5.4 A device shown below:
Table 1. Electrical rating, absolute maximum rating
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Symbol
Parameter
Value
Unit
VDS
Drain source voltage
650
V
ID
Drain current (continuous) at Tcase= 25⁰C
5.4
A
IAR
Avalanche current repetitive or not repetitive (pulsed width
limited by Tj max)
5.4
A
EAS
Single pulse avalanche energy (starting Tj=25⁰C, ID=IAR,
VDD=50V)
100
mJ
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IAR and EAS electrical thermal approach
Table 2. Thermal data
Symbol
Parameter
Value
Unit
Rthj-c
Thermal resistance junction-case max
4.17 (TO-220FP)
⁰C/W
Rthj-a
Thermal resistance junction-ambient max
62.5
⁰C/W
With the following conditions derived from 30 W flyback converter:
•
Maximum avalanche current Ip=4 A.
•
Starting temperature 25 °C.
•
Primary inductance value Lprimary=550 µH.
•
Leakage inductance ~ 13 µH.
•
Transformer ratio N=2.
•
Output voltage Vout=48 V
In these conditions, the energy due to the leakage inductance is 123 µJ. This is the
maximum avalanche energy that the MOSFET device must sustain during breakdown. If we
presume the case temperature to be fixed at 25 °C, we can estimate the temperature
increase due to the avalanche single pulse power dissipation via the following equation:
Equation 4
∆T j − c = Zth j − c ⋅ 2
Eavalanche
∆t
Where ∆t ~ 100 ns is the avalanche pulse duration (Equation 2).
With:
Equation 5
Zth j − c ( ∆t ) = K ( ∆t ) ⋅ Rth j − c
K thermal transient depends on the duration of the pulse. It can be estimated through the
thermal impedance curve using the following equation:
Equation 6
K (100 ns ) = K (100 µs ) ⋅
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100000 ns
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IAR and EAS electrical thermal approach
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Figure 4. Zthj-c thermal impedance
.
=WKMF .5WKMF
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. XV
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The temperature increase due to avalanche and the final junction temperature is:
Equation 7
∆T j − c = Zth j − c ⋅ 2
Eavalanche
= 8.7°C
∆t
Equation 8
T j = Tc + 8.7 = 33.7°C
In these working conditions, the MOSFET device (as Table 1 and 2) is safe since the final
junction temperature and the maximum avalanche energy are much lower than data
specifications.
At this point we can calculate the repetitive avalanche energy pulses in order to understand
how many pulses are necessary to raise the junction temperature from an initial 25 °C to the
maximum specification (Tj=150 °C).
From the following equation:
Equation 9
∆T j − a (max) = 2
Eavalanche ∆t
∆t
( Zth j − a (τ ) + (1 − ) Zth j − a ( ∆t ))
∆t
T
T
We have:
Equation 10
∆t
E


T ∆T j − a (max) − (1 − ) Zth j − a (∆t ) ⋅ 2 avalanche 
T
∆
t

Zth j − a (τ ) = 
2 E avalanche
Since the ∆t duration of a single pulse is very short, we have:
Equation 11
Zth j − a ( ∆t ) = Zth j − c (∆t ) = 0.05°C / W
Hence, for a period T=20 µs, using Equation 5 we obtain:
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IAR and EAS electrical thermal approach
Equation 12
100ns


20us 125°C − (1 −
) ⋅ 0.005°C / W ⋅ 2 ⋅ 1230W 
20us

 = 13.38°C / W
Zth j − a (τ ) =
2 * 123uJ
So, in conclusion:
Equation 13
k (τ ) =
Zth j − a (τ )
Rth j − a (max)
=
13.38°C / W
= 0.214
62.5°C / W
Figure 5. Zthj-a thermal impedance
.
=WKMD .5WKMD
6LQJOHSXOVH
ʏ
WSV
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Therefore, the MOSFET device is safe if the duration of repetitive avalanche energy pulses
is less than Ʈ=7 ms.
Below, a specific example illustrates how to estimate the quantification of the safety margin
for a MOSFET in terms of EAS single pulse avalanche energy.
Using the same previous conditions derived from 30 W flyback converter, we can calculate
the theoretical maximum current (not accounting for the instant IAR parameter) and
maximum leakage inductance, taking into account the EAS=100 mJ fixed value data
specification.
From Equation 3 we have:
Equation 14
I P (max) =
2 Eas ⋅ ( BVDss − Vout N )
⇒ I P (max) = 114 A
Llk ⋅ BVDss
With EAS=100 mJ and Llk=13 µH.
Equation 15
Llk (max) =
2 Eas ⋅ ( BVDss − Vout N )
⇒ Llk (max) = 5.8mH
I P2 BVDss
With EAS=100 mJ and Ip=5.4 A (data specifications).
Note that specifying EAS=100 mJ results in Ip(max) current and Llk(max) leakage inductance
being much higher than typical values for real flyback converters. This means that, apart
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IAR and EAS electrical thermal approach
AN4337
from the application, it is rather improbable that a MOSFET device will fail for EAS single
pulse avalanche energy.
This approach suggests that during an avalanche phenomenon, the IAR parameter should
be addressed rather than the EAS one.
3.2
IAR electrical evaluations
IAR parameter defines the maximum avalanche current without any bipolar latching
phenomenon. This parameter doesn't depend on the avalanche energy, which means the
MOSFET device is safe if the avalanche energy is lower than the EAS datasheet
specification and the avalanche current is lower than IAR absolute maximum rating; vice
versa, the MOSFET is certainly safe if the maximum avalanche current is lower than IAR.
This last assertion is validated by the result of Equation 15; in fact, any leakage inductance
in a real flyback converter can have the value of 5.8 mH.
As already mentioned, this suggests that the avalanche current parameter needs to be
monitored more than avalanche energy.
The worst case scenario during the avalanche phenomenon is when the ferromagnetic core
of the flyback transformer becomes saturated. Due to the uncontrolled saturation effect, the
current peak may be very high and hence dangerously close to the IAR specification.
Below is a waveform with typical saturation phenomenon during the avalanche.
Figure 6. Saturation phenomenon during the avalanche
Vbreakdown
Saturation effect
AM15968v1
In this condition, two methods exist to increase the safety margin in terms of IAR avalanche
current.
The first one is to optimize the driving and the network circuit in order to avoid the avalanche
phenomenon. The snubber increase, a different clamp circuit and/or input capacitance
increase can satisfy this requirement.
Here some examples:
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IAR and EAS electrical thermal approach
Figure 7. Typical clamp circuit of flyback topology
7
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'=
=HQHUFODPSFLUFXLW
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/HDNDJH
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The second one is to choose a flyback transformer with ferromagnetic core features such
that the saturation current value is higher, thus limiting the uncontrolled effect of the
saturation.
However, if the geometry of the flyback transformer cannot be changed, we suggest
optimizing the transformer by introducing a gap in the ferromagnetic core. In this way, the
saturation phenomenon is reduced since the leakage inductance is slightly increased. Due
to this increase in the leakage inductance, the electrical efficiency of the system could
decrease slightly, but the safety margin in terms of the IAR avalanche current increases, thus
satisfying the initial objective.
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Conclusions
4
AN4337
Conclusions
Understanding how to approach a voltage overshoot which exceeds the V(BR)DSS absolute
maximum rating is the key to designing reliable and, consequently, safe MOSFETs. The
example in this paper provides step-by-step guidelines on how to obtain the safety margin in
terms of IAR and EAS specifications when a MOSFET functions in a flyback converter. In
particular, this example suggests that a MOSFET device is safe if the avalanche energy is
lower than the EAS datasheet specification and the avalanche current is lower than the IAR
absolute maximum rating; vice versa, a MOSFET is certainly safe if the maximum
avalanche current is lower than IAR.
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5
Revision history
Revision history
Table 3. Document revision history
Date
Revision
05-Jun-2014
1
Changes
Initial release.
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AN4337
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