PWB Datasheet

PWB
www.vishay.com
Vishay Electro-Films
Thin Film Power Resistors
FEATURES
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Product may not be to scale
The PWB series resistor chips offer a 1 W power rating in a
relatively small size. They offer one of the best combinations
of size and power available.
Wire bondable
Power: 1 W
Chip size: 0.070 inches square
Case: 0707
Resistance range: 0.3  to 20 k
Oxidized silicon substrate for good power dissipation
Resistor material: Tantalum nitride, self-passivating
Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
APPLICATIONS
The PWBs are manufactured using Vishay Electro-Films
(EFI) sophisticated thin film equipment and manufacturing
technology. The PWBs are 100 % electrically tested and
visually inspected to MIL-STD-883, method 2032, class H or
class K.
The PWB resistor chips are used mainly in higher power
circuits of amplifiers where increased power loads require a
more specialized resistor.
TEMPERATURE COEFFICIENT OF RESISTANCE, VALUES, AND TOLERANCES
PARAMETER
Total Resistance Range
Standard Tolerances
TCR
VALUE
UNIT
0.3 to 20K

± 0.5, ± 1, ± 5
%
± 50, ± 100, ± 250
ppm/°C
Tightest Standard Tolerance Available
5%
1%
0.5 %
± 50 ppm/°C
± 100 ppm/°C
± 250 ppm/°C
*
0.3 Ω
2Ω
10 Ω 50 Ω
10 kΩ
20 kΩ
* ± 600 ppm/C R < 2 Ω
STANDARD ELECTRICAL SPECIFICATIONS
PARAMETER
VALUE
UNIT
Noise, MIL-STD-202, Method 308
100  to 250 k
< 100  or > 251 k
- 35 typ.
- 20 typ.
dB
Moisture Resistance, MIL-STD-202, Method 106
± 0.5 max. R/R
%
Stability, 1000 h, + 125 °C, 500 mW
± 0.5 max. R/R
%
- 55 to + 125
°C
Thermal Shock, MIL-STD-202, Method 107, Test Condition F
± 0.1 max. R/R
%
High Temperature Exposure, + 150 °C, 100 h
± 0.2 max. R/R
%
Operating Temperature Range
Dielectric Voltage Breakdown
200
V
Insulation Resistance
1012 min.

Operating Voltage
Steady State
5 x Rated Power
100 max.
200 max.
V
1
W
± 0.25 max. R/R
%
DC Power Rating at + 70 °C (Derated to zero at + 175 °C)
(Conductive epoxy die attach to alumina substrate)
5 x Rated Power Short-Time Overload, + 25 °C, 5 s
Revision: 04-Mar-13
1
Document Number: 61021
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
PWB
www.vishay.com
Vishay Electro-Films
DIMENSIONS in inches
0.070
0.063
0.070
0.063
0.005
0.005
0.072
0.072
TYPICAL RANGE
R < 240 Ω
0.010
TYPICAL RANGE
240 Ω to 20 kΩ
SCHEMATIC
MECHANICAL SPECIFICATIONS
PARAMETER
VALUE
Chip Size
0.070" x 0.070" ± 0.005" (1.781 mm x 1.781 mm ± 0.127 mm)
Chip Thickness
0.010" ± 0.002" (0.254 mm ± 0.05 mm)
Chip Substrate Material
Oxidized silicon, 10 kÅ minimum SiO2
Resistor Material
Tantalum nitride, self-passivating
Bonding Pad Size
0.005" x 0.010" (0.127 mm x 0.254 mm) minimum
Number of Pads
2
Pad Material
10 kÅ minimum aluminum (Au optional)
Backing
None, lapped semiconductor silicon (Au back optional)
GLOBAL PART NUMBER INFORMATION
Global Part Number:
PWB50000FKANHWS
PWB12500KCGGKWS
Global Part Number Description:
PWB 5K 1 % 100 ppm Al None H WS
PWB 1.25K 10 % 100 ppm Au Au K WS
P
W
B
MODEL
RESISTANCE
PWB
First 4 digits are
significant figures
of resistance
70 x 70
size
Power
resistor
Revision: 04-Mar-13
5
0
0
0
0
RESISTANCE
MULTIPLIER
CODE
TOLERANCE
CODE
(%)
TCR
(ppm/°C)
D = 0.0001
C = 0.001
B = 0.01
A = 0.1
0=1
1 = 10
D = 0.5
F = 1.0
G = 2.0
J = 5.0
K = 10
C = ± 50
K = ± 100
M = ± 250
Z = + 600/
- 100
F
K
TERMINATION
G = Au
A = Al
2
A
N
BACK
METAL
H
VISUAL
CLASS
W
S
PACKAGING
CODE
G = Au
H = Class H WS = Waffle pack
N = None K = Class K 100 min, 1 mult
Document Number: 61021
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Revision: 02-Oct-12
1
Document Number: 91000