Application Note 1039 Design and Application Notes for AP3768 System Solution Prepared by Liu Lei System Engineering Dept. 1. Introduction The AP3768 is the generation II Primary Side Regulation (PSR) controller, which uses Pulse Frequency Modulation (PFM) method to realize Discontinuous Conduction Mode (DCM) operation for flyback power supplies. The AP3768 can also achieve ultra-low standby power due to its PFM operation and an innovative ultra-low startup current technique. Less than 30mW standby power can be obtained to meet five-star charger criteria with AP3768 system solution. The AP3768 can provide accurate constant voltage, constant current (CV/CC) regulation. In order to achieve the excellent voltage regulation, AP3768 has a programmable cable voltage drop compensation function to accommodate various cables with different gauges and lengths. A typical AP3768 application circuit is shown in Figure 1. And the design guidelines can be classified to the following sections. R1 J1 AC 85264V L1 D4~D7 + C1 C2 T1 R5 + R3 Vs R12 C11 Is R4 D2 L2 Vdri U1 R7 R14 R11 D3 C4 R6 C6 R8 C7 CS Vcc CPC Out Bias FB GND CPR AP3768 D1 C3 + + R13 C5 CN1 R10 Q1 Ip R16 R15 R9 R2 Figure 1. Typical Schematic of AP3768 Solution Sep. 2009 Rev. 1. 0 BCD Semiconductor Manufacturing Limited 1 Application Note 1039 1.1 Low Standby Power Design winding (Na) for bias power and output voltage detecting. The AP3768 senses the auxiliary winding feedback voltage at FB pin and obtains power supply at VCC pin. In Figure 2, a series of relative ideal operation waveforms are given to illustrate some parameters used in following design steps. And the nomenclature of the parameters in Figure 2 is as the following: Vdri---a simplified driving signal of primary transistor Ip---the primary side current Is ---the secondary side current Vs---the secondary side voltage Tsw---the switching period of frequency Fsw---the switching frequency tonp---the time of primary side “ON” tons----the time of secondary side “ON” toff---the discontinuous time Ipk---peak current of primary side Ipks---peak current of secondary side Vds---the sum of Vo and the forward voltage drop of rectification diode The tradeoff between the low standby power and the output overshoot at no load should be considered during the selection of the dummy resistor R13. In order to achieve less than 30mW standby power while having an acceptable output voltage rise at no load, 5.1k to 10k is recommended for R13. The power consumed in the startup resistors (R3+R4) and the resistors (R5+R6) for CC line compensation also becomes considerable in no load or light load conditions. So 10M to 13M resistance is recommended for the sum of R3 and R4 considering the target of less than 30mW standby power and less than 3S turn-on delay time. And the bias capacitor C4 is recommended as 1µF to 1.5µF accordingly. Meanwhile, normally 30M resistance is suggested for the sum of R5 plus R6. After that, R7 can be adjusted to achieve an optimal CC line compensation. 1.2 Transformer Design Figure 1 describes a flyback converter controlled by AP3768 with a 3-winding transformer---primary winding (Np), secondary winding (Ns) and auxiliary Figure 2. Operation Waveforms Sep. 2009 Rev. 1. 0 BCD Semiconductor Manufacturing Limited 2 Application Note 1039 Design Steps: The maximum turn ratio of transformer should be designed first, which is to ensure that the system should work in DCM in all working conditions, especially at the minimum input voltage and full load. 2 L p I pk Vindc (1) (7) Lp (8) 2 With (6), (7) and (8), then, I pk ≥ 2Pin 1 1 + VS n ps Vin (9) Because, Pin = For the secondary side current, VO I O η (10) Where η is the system efficiency. (4) At maximum load, the system will work in the boundary between CV and CC stages. IO can be given by, In (4), Ls is the inductance of secondary winding. IO = VS = VO + Vd , Vd is the forward voltage drop of the secondary diode. 1 tons × I pks 2 TSW Then, Ipks can be defined, For (3), in CV regulation, the Vs is a constant voltage, so tons is a constant value with different input voltage. (11) I pks = kI O In the flyback converter, when the primary transistor turns ON, the energy is stored in the magnetizing inductance Lp. So the power transferring from the input to the output is given by, Pin = n ps Where nps is the turn ratio of primary winding to the secondary winding. (2) When Vindc is the minimum value, the maximum tonp can be obtained. So, Lp (3) tonp _ max = I pk Vindc _ min t ons = I pks (6) I pks = n ps × I pk Ls = Where Lp is the inductance of primary winding. Vindc is the rectified DC voltage of input. LS VS Lp Ls + I pk Vs Vindc_min Because the peak current and inductance of primary side and secondary side have the following relationship, For the primary side current, tonp = I pk ≥ I pks 2Pin If the system can meet equation (1) at minimum input voltage and full load, it can work in DCM in all working conditions. Lp (5) 2 Pin Tsw, tonp and tons in (1) are replaced with (5), (3) and (4), 1-1. Calculate the Maximum Turn Ratio of XFMR TSW ≥ tonp + tons 2 L p I pk TSW = Step 1. Select a Reasonable Ipk for the Flyback Converter with AP3768 In the design of AP3768, k= 1 2 L p I pk f SW 2 2TSW = 3.5 tons So it can be obtained, Then, Sep. 2009 Rev. 1. 0 BCD Semiconductor Manufacturing Limited 3 Application Note 1039 n ≤ Vindc_min( k×η 1 − ) 2VO VS Then, LP can be got by, (12) Therefore, the maximum turn ratio of primary and secondary side can be obtained. k×η 1 N ≤ Vindc_min( ) − 2VO VO + Vd 2PO I f SW η LP = 2 PK (17) Here, to achieve good overall system performance, the optimum switching frequency fSW is recommended to be 50~60 kHz under full Load. (13) 2-2. Re-calculate the Turn Ratio of Primary and Secondary Sides---nps Because above calculations are all based on ideal conditions without considering power loss, k is given an approximately value 4 to replace the real value 3.5. From formula (14), the turn ratio of primary and secondary side n can be re-calculated. 1-2. Calculate the Peak Current of Primary Side and Current Sensed Resistor n ps = k ⋅ IO (k = 4) I pk (18) Ipk can be calculated by the output current. I pks I pk = n ps k × IO = n ps 2-3. Calculate the Turns of Primary, Secondary and Auxiliary Sides (14) First, the reasonable core-type and ∆B should be selected. Then, the turns of 3-winding transformer can be obtained respectively. Here, k=4 nps is the calculated value of nmax. The turn of primary winding, In AP3768, 0.5V is an internal reference voltage. If the sensed voltage VCS reaches 0.5V, the power transistor APT13003E will be shut down and tonp will be ended. RCS = 0.5V I pk Np = So RCS can be obtained from equation (15) and selected with a real value from the standard resistor series. After RCS is selected, Ipk should be modified based on the selected RCS. NA = Step 2. Design Transformer (20) N S VA VS (21) Here, VA can be set a typical value of 20V. Vs is equal to Vo+Vd. Ae can be gotten automatically after core-type is selected. 2-1. Calculation of the Primary Side Inductance ---LP The primary side inductance LP is relative with the stored energy. LP should be big enough to store enough energy, so that Po_Max can be obtained from this system. Step 3. Select Diode and Primary Transistor 3-1. Select Diodes of Secondary and Auxiliary Sides Max. reverse voltage of secondary side From formula (10), the output power can be given by, Sep. 2009 NP n ps The turn of auxiliary winding, From now on, Ipk and RCS have been designed. 1 2 L p I pk f SW η 2 (19) The turn of secondary winding, (15) NS = PO = LP I PK 10 8 Ae × ∆B Vdr = VO + (16) Rev. 1. 0 Vindc_max N S NP (22) BCD Semiconductor Manufacturing Limited 4 Application Note 1039 The external output cable voltage drop compensation circuitry of AP3768 is shown in Figure 3. The AP3768 senses the auxiliary winding feedback voltage at FB pin and operates in constant-voltage (CV) mode to regulate the output voltage. In CV mode, FB pin voltage VFB is a constant of 4.0V. Max. reverse voltage of auxiliary side, Vdar = V A + Vindc_max N A (23) NP In (22) and (23), the maximum DC input voltage should be used. The CPR pin voltage VCPR is generated by the internal circuit of AP3768. It linearly decreases with the rise of the output load directly. Then VCPR is shown as below: 3-2. Select the Primary Side Transistor Vdc_max = Vdc_spike + Vindc_max + VS N P NS (24) Be careful that the value of Vdc_spike will be varied with different snubber circuit. 1.3 Output Compensation Cable (25) VCPR = 3.08 − 2.75 × Dons Voltage Where Dons is the duty cycle of secondary diode, and is equal to Tons/TSW, which is directly proportional to the output loading. The maximum Dons is 4/7 and the minimal Dons is close to zero in CV mode of AP3768, so the minimum of VCPR is about 1.5V and the maximal Dons is about 3V. Drop The AP3768 has a programmable cable compensation function which can precisely offset the voltage drop on different cables with various gauges and lengths, and thus ensure good output voltage regulation. Vd VAUX AP3768 nas I1 RFB1 I3 CPR VO D C RCPR FB CPC I2 RFB2 Figure 3. Output Cable Compensation Circuit From the resistor network shown in figure 3, the current through RFB1 is equal to the sum of current through RFB2 and RCPR: Then VAUX can be calculated as: V AUX = (1 + (26) I1 = I 2 + I 3 (28) Because of the relation between VO and VAUX shown in figure 3, the output voltage can be given by: So equation (27) can be obtained: VFB − VCPR VFB V AUX − VFB + = RCPR RFB2 RFB1 R RFB1 RFB1 ) × V FB − FB1 × VCPR + RCPR RFB 2 RCPR (27) Vo = ( 1 + RFB1 RFB1 V R FB1 + ) × FB − Vd − × VCPR RFB 2 RCPR n AS RCPR × n AS (29) Sep. 2009 Rev. 1. 0 BCD Semiconductor Manufacturing Limited 5 Application Note 1039 In equation (29), nAS is the turn ratio of auxiliary winding to the secondary winding. It is obvious that VO linearly increases with the decrease of VCPR. Since VCPR linearly decreases with the rise of output load, VO will linearly increase with the rise of the output load, which is just what the output cable voltage drop compensation requires. Vdc_spike=100V (with snubber circuit) Output cable: 28AWG, 1.5m long, 0.214Ω/m Secondary diode turns on duty cycle: D ons = 4/7 From equation (26) and (29), the cable voltage drop compensation is got: Step 1. A Reasonable Ipk of Flyback with AP3768 Should be Designed ∆Vo = 2.75 × R FB 1 1 × ∆Dons × RCPR n AS Feedback resistor: RFB1 = 33K Design Steps: 1-1. Calculate the Max. Turn Ratio of XFMR (30) N MAX = Vindc_min( Generally it is recommended that nAS is designed to make sure Tons/Tsw is about 4/7 at full load condition. Thus the maximum compensation voltage ∆Vo will occur at the full load and equation (30) can be simplified as: ∆VO = 1.57 × RFB 1 1 × RCPR n AS Vindc_min = Vinac_min × 2 − 40 N MAX = 8.259 1-2. Calculate the Peak Current of Primary Side and Current Sensed Resistor (31) RCPR can be calculated as equation (32). RCPR = 1.57* R FB1 n AS × ∆VO k×η 1 − )(k ≈ 4) 2VO VO + Vd I pks I pk = (32) N = k × IO N I pk_max = 242mA From equation (32), for the fixed transformer turn ratio nAS, the compensation voltage can be easily adjusted to accommodate different cables with various gauges and lengths by changing the value of RCPR. Meanwhile, the upper feedback resistor RFB1 may also need a slight adjustment to keep the same output voltage precisely. Sensed current resistor, Considering the limitation of sinking current of the pin CPR, 10kΩ or above is recommended for RCPR. RFB1 and RFB2 should be chosen correspondingly based on this restriction. And the recommended value of RFB2 is above 5kΩ. . Re-calculate peak current of primary side, 1.4 Design Example 2-1. Calculation of the Inductance of Primary Side---Lp RCS = 0.5V I pk RCS ≈ 2.1Ω I pk_max = 238mA Step 2. Design Transformer Specification: Input voltage: 85VAC-265VAC Output voltage: VO=5.5V Output current: IO=0.5A Efficiency: 75% Switching frequency: fSW=60kHz Forward voltage of secondary diode: Vd=0.4V Forward voltage of auxiliary diode: Vda=1V Feedback voltage of auxiliary winding: Va=15V Core_type: EE16 (Ae=19.2mm2) LP = 2PO 2 I PK f SW η L p = 2.16mH 2-2. Re-calculate the Turn Ratio of Primary and Secondary Side---N ∆B : ∆B =2450GS Sep. 2009 Rev. 1. 0 BCD Semiconductor Manufacturing Limited 6 Application Note 1039 N= k ⋅ IO (k ≈ 4) I pk Vdr = 50V Max. reverse voltage of auxiliary side N = 8.4 Vdar = V A + 2-3. Calculate the Turns of Primary, Secondary and Auxiliary Sides NP Vdar = 135V 3-2. Select Primary Side Transistor V N Vdc_max = Vdc_spike + Vindc_max + S P NS Vdc_max = 448V The turns of primary winding, Np = Vindc_max N A LP I PK 10 8 Ae × ∆B Step 4. Select Reasonable Cable Compensation Resistor RCPR NP =109N The turns of secondary winding, 4-1. Calculation of Voltage Drop on Cable N NS = P N Resistor of 1.5m 28AWG cable: Rcab = 0.214 × 2 × 1.5 = 0.642 Ω N S = 13T Voltage drop on cable: ∆V = Rcab*I O = 0.642 × 0.5 = 0.32V The turns of auxiliary winding, NA = N SVA VS 4-2. Calculation of RCPR The turns ratio of auxiliary winding to secondary winding： N n AS = A ≈ 2.7 NS Because transformer is designed to make sure that on full load condition, TONS/TSW is 4/7, the RCPR can be calculated by equation (32) N A = 35T Step 3. Select Diode and Primary Transistor 3-1. Select Diodes of Secondary and Auxiliary Sides Maximum reverse voltage of secondary side Vdr = VO + Vindc_max N S RCPR = NP 1.57 × 33k = 60k 2.7 × 0.32 Design Results Summary: 1.Calculate the Maximum Peak Current of Primary Side and Rcs Ipk= 238 mA Peak current of primary side Rcs= 2.1 Current sensed resistor Ω 2.Design Transformer mH(±8%) Lp= 2.16 Inductance of primary side N= 8.4 Turn ratio of primary and secondary Np= 109 T Turns of primary side Ns= 13 T Turns of secondary side Na= 35 T Turns of auxiliary side 3. Select Diode and Primary Transistor Vdr= 50 V Maximum reverse voltage of secondary diode Vdar= 135 V Maximum reverse voltage of auxiliary diode Vdc_max= 448 V Voltage stress of primary transistor 4. Select RCPR= 60 kΩ Cable compensation resistor Sep. 2009 Rev. 1. 0 BCD Semiconductor Manufacturing Limited 7

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