Application Note 1064 Design and Application Notes for AP3765 System Solution Prepared by Sun Jun Jie System Engineering Dept. charger criteria with AP3765 system solution. 1. Introduction The AP3765 uses Pulse Frequency Modulation (PFM) method to realize Discontinuous Conduction Mode (DCM) operation for flyback power supplies. The principle of PFM is different from that of Pulse Width Modulation (PWM), so the design of transformer is also different. A typical AP3765 application circuit is shown in Figure 1. 2. Operation Description 2.1 Constant Primary Peak Current The primary current ip(t) is sensed by a current sense resistor RS as shown in Figure 1. The current rises up linearly at a rate of: The AP3765 can provide accurate constant voltage, constant current (CV/CC) regulation by using Primary Side Regulation (PSR). dip ( t ) vg( t ) = dt LM The AP3765 can also achieve ultra-low standby power due to its PFM operation and an innovative ultra-low startup current technique. Less than 30mW standby power can be obtained to meet five-star (1) D2 T1 VO+ + C1 R1 + C2 R5 D1 V D3 R2 VCC OUT R3 CS Ns C4 + VO- N FB V Q1 AP3765 R4 C3 NP R6 FB GND R7 RS Figure 1. Typical Schematic of AP3765 Solution Jun. 2011 Rev. 1. 1 BCD Semiconductor Manufacturing Limited 1 Application Note 1064 The output voltage is different from the secondary voltage in a diode forward drop voltage that depends on the current. If the secondary voltage is always detected at a fixed secondary current, the difference between the output voltage and the secondary voltage will be a fixed Vd. For AP3765, the voltage detection point is at 3.2µs of the D2 on-time, which means the the secondary voltage is detected at a fixed secondary current. The CV loop control function of AP3765 then generates a D2 off time to regulate the output voltage. Figure 2. Primary Current Waveforms As illustrated in Figure 2, when the current IP(t) rises up to IPK, the switch Q1 turns off. The constant peak current is given by: Ipk = VCS RS (2) 2.3 Constant Current Operation The energy stored in the magnetizing inductance LM each cycle is therefore: 1 Eg = ⋅ L M ⋅ Ipk 2 2 (3) So, the power transferring from input to output is given by: 1 P = ⋅ L M ⋅ Ipk 2 ⋅ f SW 2 Figure 4. Secondary Current Waveform In CC operation, the CC loop control function of AP3765 will keep a fixed proportion between D2 on-time tONS and D2 off-time tOFFS by discharging or charging the built-in capacitance connected. The fixed proportion is (4) Where the fSW is the switching frequency. When the peak current IPK is constant, the output power depends on the switching frequency fSW. t ONS 4 = t OFFS 3 2.2 Constant Voltage Operation The AP3765 captures the auxiliary winding feedback voltage at FB pin and operates in constant voltage (CV) mode to regulate the output voltage. Assuming the secondary winding is master, the auxiliary winding is slave during the D2 on-time and the auxiliary voltage is given by: VAUX = N AUX (Vo + Vd ) NS (6) The relationship between the output constant current and secondary peak current Ipks is given by: t ONS 1 Iout = × Ipks × 2 t ONS + t OFFS (5) (7) At the instant of D2 turn-on, the primary current transfers to the secondary at an amplitude of: where the Vd is the diode forward drop voltage. NAUX is the turns of auxiliary winding, and NS is the turns of secondary winding. Ipks = Np × Ipk Ns (8) Thus the output constant-current is given by: Iout = t ONS 1 Np 2 Np × × Ipk × = × × Ipk 2 Ns t ONS + t OFFS 7 Ns (9) 2.4 Leading Edge Blanking When the power switch is turned on, a turn-on spike will occur on the sense-resistor. To avoid false termination of the switching pulse, a 750ns leading Figure 3. Auxiliary Voltage Waveform Jun. 2011 Rev. 1. 1 BCD Semiconductor Manufacturing Limited 2 Application Note 1064 The tradeoff between the low standby power and the output overshoot at no load should be considered during the selection of the dummy resistor R8. In order to achieve less than 30mW standby power while having an acceptable output voltage rise at no load, 5.1K to 10k is recommended for R8. The power consumed in the startup resistors (R1+R2) also becomes considerable in no load or light load conditions. So 10MΩ to 13MΩ resistance is recommended for the sum of R1 and R2 considering the target of less than 30mW standby power and less than 3s turn-on delay time. And the bias capacitor C2 is recommended as 1µF to 1.5µF accordingly. edge blanking is built in. During this blanking period, the current sense comparator is disabled and the gate driver can not be switched off. 2.5 CCM Protection The AP3765 is designed to operate in Discontinuous Conduction Mode (DCM) in both CV and CC modes. To avoid operating in Continuous Conduction Mode (CCM), the AP3765 detects the falling edge of the FB input voltage on each cycle. If a 0.075V falling edge of FB is not detected at the end of tONS, the AP3765 will stop switching. 2.6 OVP & OCkP The AP3765 includes over-voltage protection (OVP) and open circuit protection (OCkP) circuitries as shown in Figure 5. If the voltage at FB pin exceeds 8V, 100% above the normal detection voltage, the AP3765 will enter OVP mode. However, if the AP3765 doesn’t monitor 0.075V rising edge of FB input at the end of tONP or high voltage (>0.075V) after tSAMPLE, it will enter OCkP mode. When AP3765 enters OVP or OCkP mode, it will sends out a fault detection pulse every 18ms until the fault has been removed. 3.2. Transformer Design Figure 1 describes a flyback converter controlled by AP3765 with a 3-winding transformer---Primary winding (NP), Secondary winding (NS) and Auxiliary winding (NA) for bias power and output voltage detecting. The AP3765 senses the auxiliary winding feedback voltage at FB pin and obtains power supply at VCC pin. In Figure 6, a series of relative ideal operation waveforms are given to illustrate some parameters used in following design steps. And the nomenclature of the parameters in Figure 6 is as the following: Vdri---a simplified driving signal of primary transistor IP---the primary side current IS ---the secondary side current VS---the secondary side voltage tsw---the switching period of frequency fsw---the switching frequency tonp---the time of primary side “ON” tons----the time of secondary side “ON” toff---the discontinuous time Ipk---peak current of primary side Ipks---peak current of secondary side Vds---the sum of Vo and the forward voltage drop of rectification diode OVP 8V S pro Q COMP R OCkP 0.075V COMP Timer_18ms Figure 5. OVP & OCkP Function Block 3. Design Guidelines 3.1 Low Standby Power Design tonp Vdri tsw Ipk Ip Ipks Is tons Vds Vs toff Figure 6. Operation Waveforms Jun. 2011 Rev. 1. 1 BCD Semiconductor Manufacturing Limited 3 Application Note 1064 4. Design Steps: L p I 2pk (15) Step 1. Select a Reasonable Ipk for the Flyback Converter with AP3765 t SW = 1-1. Calculate the Maximum Turn Ratio of XFMR tSW, tONP and tONS in (10) are replaced with (15), (12) and (13), The maximum turn ratio of transformer should be designed first, which is to ensure that the system should work in DCM in all working conditions, especially at the minimum input voltage and full load. L p I 2pk Lp Vindc (17) Lp (18) Ls = n ps 2 Where nPS is the turn ratio of primary winding to the secondary winding. (11) With (16), (17) and (18), then, I pk 2Pin When Vindc is the minimum value, the maximum tONP can be obtained. So, Lp (12) t ONP _ MAX = I pk Vindc _ min ≥ 1 1 + VS n ps Vin Pin = VO I O η (20) Where η is the system efficiency. (13) At maximum load, the system will work in the boundary between CV and CC stages. IO can be given by, In (13), Ls is the inductance of secondary winding. 1 t ONS × I pks 2 t SW VS = VO + Vd , Vd is the forward voltage drop of the secondary diode. IO = For (13), in CV regulation, the Vs is a constant voltage, so tONS is a constant value with different input voltage. Then, Ipks can be defined, In the flyback converter, when the primary transistor turns ON, the energy is stored in the magnetizing inductance Lp. So the power stored in Lp is given by, In the design of AP3765, 1 Pin = L p I 2pk f SW 2 (21) (22) I pks = kI O 2t SW = 3.5 (In CC mode, the proportion of tONS t ONS (23) and tOFFS is 4:3) k= (14) So it can be obtained, Then, Jun. 2011 (19) Because, For the secondary side current, t ONS = I pks (16) I pks = n ps × I pk (10) Where Lp is the inductance of primary winding. Vindc is the rectified DC voltage of input. LS VS Lp Ls + I pk Vs Vindc_min Because the peak current and inductance of primary side and secondary side have the following relationship, For the primary side current, t ONP = I pk ≥ I pks 2Pin If the system can meet equation (10) at minimum input voltage and full load, it can work in DCM in all working conditions. t SW ≥ t ONP + t ONS 2Pin Rev. 1. 1 BCD Semiconductor Manufacturing Limited 4 Application Note 1064 n ps ≤ Vindc_min ( k×η 1 − ) 2VO VS Then, LP can be got by, (24) Therefore, the maximum turn ratio of primary and secondary side N can be obtained. k×η 1 N ≤ Vindc_min ( ) − 2VO VO + Vd 2P I f η LP = (29) O 2 PK SW Here, to achieve good overall system performance, the optimum switching frequency fSW is recommended to be 50kHz to 60kHz under full Load. (25) 2-2. Re-calculate the Turn Ratio of Primary and Secondary Sides---nPS Because above calculations are all based on ideal conditions without considering precision of system, k is given an experiential value 3.85 to replace the real value 3.5. From formula (26), the turn ratio of primary and secondary side n can be re-calculated. 1-2. Calculate the Peak Current of Primary Side and Current Sensed Resistor n ps = k ⋅ IO (k = 3.85) I pk (30) Ipk can be calculated by the output current. I pk = I pks n ps k × IO = n ps 2-3. Calculate the Turns of Primary, Secondary and Auxiliary Sides (26) First, the reasonable core-type and ∆B should be selected. Then, the turns of 3-winding transformer can be obtained respectively. Here, k=3.85 nPS is the calculated value of nMAX. The turns of primary winding, In AP3765, 0.5V is an internal reference voltage. If the sensed voltage VCS reaches 0.5V, the power transistor will be shut down and tONP will be ended. R CS = 0.5V I pk Np = (31) (27) The turns of secondary winding, So RCS can be obtained from equation (27) and selected with a real value from the standard resistor series. After RCS is selected, Ipk should be modified based on the selected RCS. NS = NA = Step 2. Design Transformer The primary side inductance LP is relative with the stored energy. LP should be big enough to store enough energy, so that Po_Max can be obtained from this system. N S VA VS (33) Step 3. Select Diode and Primary Transistor 3-1. Select Diodes of Secondary and Auxiliary Sides Maximum reverse voltage of secondary side From formula (20), the output power can be given by, Jun. 2011 (32) Here, VA can be set a typical value of 20V. Vs is equal to Vo+Vd. Ae can be got automatically after core-type is selected. 2-1. Calculation of the Primary Side Inductance ---LP 1 L p I 2pk f SW η (η: system efficiency) 2 NP n PS The turns of auxiliary winding, From now on, Ipk and RCS have been designed. PO = L P I PK 10 4 (L :mH,I :mA,Ae:mm2, ∆B :GS) p pk Ae × ∆B (28) Vdr = VO + Rev. 1. 1 Vindc_max N S NP (34) BCD Semiconductor Manufacturing Limited 5 Application Note 1064 Maximum reverse voltage of auxiliary side, Vdar = VA + Vindc_max N A I pk = I pks N = k × IO N (35) NP I pk_max = 325mA In (34) and (35), the maximum DC input voltage should be used. Sensed current resistor, 3-2. Select the Primary Side Transistor R CS = Vdc_max = Vdc_spike + Vindc_max + VS N P NS (36) 0.5V I pk (40) (41) (42) R CS ≈ 1.538Ω (Set: R CS = 1.54Ω ) (43) Re-calculate peak current of primary side, Be careful that the value of Vdc_spike will be varied with different snubber circuit. I pk_max = 325mA (44) . 5. Design Example Step 2. Design Transformer Specification: Input voltage: 85VAC-265VAC Output voltage: VO=5V Output current: IO=0.7A System Efficiency: 75% Switching frequency: fSW=60kHz Forward voltage of secondary diode: Vd=0.4V Forward voltage of auxiliary diode: Vda=1V Feedback voltage of auxiliary winding: Va=20V Core_type: EE16 (Ae=19.2mm2) ∆B : ∆B =2450GS Vdc_spike=100V (with snubber circuit) Output cable: 28AWG, 1.5m long, 0.214Ω/m Secondary diode turns on duty cycle: D ons = 4/7 Feedback resistor: R6=36.5k, R7=9.1k 2-1. Calculation of the Inductance of Primary Side---Lp (46) k ⋅ IO (k ≈ 3.85) I pk N = 8 .3 (48) The turns of primary winding, Np = (37) L P I PK 10 4 Ae × ∆B Vindc_min = Vinac_min × 2 − 40 ( when IO=0.7A, Set: Vindc (38) N MAX = 8.3 (39) (49) (50) NP =102 N drops about 40V ) (47) 2-3. Calculate the Turns of Primary, Secondary and Auxiliary Sides 1-1. Calculate the Max. Turn Ratio of XFMR The turns of secondary winding, NS = NP N N S = 12T 1-2. Calculate the Peak Current of Primary Side and Current Sensed Resistor Jun. 2011 L p = 1.47mH N= Step 1. A Reasonable Ipk of Flyback with AP3765 Should be Designed k×η 1 − )(k ≈ 3.85) 2VO VO + Vd (45) O 2 PK SW 2-2. Re-calculate the Turn Ratio of Primary and Secondary Side---N Design Steps: N MAX = Vindc_min ( 2P I f η LP = Rev. 1. 1 (51) (52) BCD Semiconductor Manufacturing Limited 6 Application Note 1064 The turns of auxiliary winding, N V NA = S A VS (53) N A = 44T (54) Maximum reverse voltage of auxiliary side Vindc_max N A Vdar = VA + NP Vdar = 181.8V Vdc_max = Vdc_spike + Vindc_max + (56) Vdr = 49.1V (59) (60) Step 4. Select Reasonable Feedback Resistor R6 and R7 R 7 (Set:R7=9.1kΩ,R6=36.5kΩ) VFB = 4V = Va × R6 + R7 (55) NP VS N P NS Vdc_max = 520.9V 3-1. Select Diodes of Secondary and Auxiliary Sides Maximum reverse voltage of secondary side Vindc_max N S (58) 3-2. Select Primary Side Transistor Step 3. Select Diode and Primary Transistor Vdr = VO + (57) (61) Design Results Summary: 1. Calculate the Maximum Peak Current of Primary Side and RCS IPK= 325 mA Peak current of primary side RCS= 1.54 Ω LP= 1.47 mH(±8%) N= 8.3 NP= 102 T Turns of primary side NS= 12 T Turns of secondary side NA= 44 T Turns of auxiliary side Current sensed resistor 2. Design Transformer Inductance of primary side Turn ratio of primary and secondary 3. Select Diode and Primary Transistor Vdr= 49.1 V Maximum reverse voltage of secondary diode Vdar= 181.8 V Maximum reverse voltage of auxiliary diode Vdc_max= 520.9 V Voltage stress of primary transistor 4. Select Feedback Resistor R6= 36.5 kΩ Feedback resistor R7= 9.1 kΩ Feedback resistor Jun. 2011 Rev. 1. 1 BCD Semiconductor Manufacturing Limited 7

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