AN18

Application Note 18
Issue 1 March 1996
Power MOSFET Gate Driver Circuits using High
Current Super-β Transistors
6A Pulse Rated SOT23 Transistors for High Frequency MOSFET
Interfacing
Neil Chadderton
The pow er M OS F ET is c omm only
presented and regarded as a voltage
driven device, and as such there is a
natural expectation that it can be driven
from any pulse source, irrespective of
that source’s energy, or current
capability.
This assumption is partly justified, if the
system in question only pulses or
switches the MOSFET at a low
frequency, or in pure DC circuits, where
the transistor may only be used in a
toggled state. However, for typical
switching frequencies from several kHz
upwards, attention must be paid to the
gate drive requirements to ensure
efficient and “saturated” switching of
the MOSFET. This must be considered as
the gate-source (g-s) circuit is, to a first
approximation, essentially a CR
network;
comprising
the
g-s
capacitance, and the resistance of the
metallic/silicon interconnects. To this
network must be added the effective
resistance, or source impedance of the
ga te driv er circuitry, and for true
assessments, consideration of the
drain-gate (d-g) capacitance and the
Miller effect. Due to this network, the g-s
voltage follows an exponential curve as
the C elements charge, and so, either
sufficient time must be given to allow
this voltage to reach it’s target value
(thus limiting the operating frequency
and increasing the time spent in the
linear region thereby producing high
switching losses), or the “R” element
must be minimised.
As a guide, the input capacitance of
power MOSFETs ranges from a few
hundred picofarads to tens of
nanofarads . This capacitance is
increased by the effective amplification
of the drain-gate capacitance by the
voltage gain of the circuit (Miller effect),
such tha t the appa rent ca pa citive
component of the CR network assumes
a value of 2 to 5 times the value of the
d a t a s h e e t s t a t e d Ciss. A s t h i s
amplification effect is so circuit/bias
condition dependent, a useful tool has
been developed that considers the
amount of gate charge required to meet
a certain condition. Figure 1 shows a
cha rt i ll u s tra t i n g t h e g a t e c ha rg e
required to switch the ZVN4306A (a
220mΩ, 1A continuous TO92 part), and
this parameter’s dependence on the
Mi ll e r e f fe c t a s t h e d rain v oltage
increases.
As the operating frequency of switched
mode power supplies increases, due to
the need for less weight and product
volume demands smaller inductors and
capacitors, the MOSFET’s required gate
AN18 - 1
Application Note 18
Issue 1 March 1996
VGS-Gate Source Voltage (Volts)
14
also.
VDD=
20V
40V
60V
16
ID=3A
12
10
8
6
4
2
0
0
1
2
3
4
5
6
7
8
9
Application Note 18
Issue 1 March 1996
10 11 12
Q-Charge (nC)
Gate charge v gate-source voltage
Figure1
Gate Charge Curves for the ZVN4306A; a
1A DC rated 220mΩ E-Line (TO92) Style
MOSFET.
voltage must be driven to it’s final value
in as short a period as possible (within
EMI constraints) to minimise switching
losses. For a given value of required gate
charge, this means that the current
capability of the gate drive circuitry must
be carefully considered.
It is necessary therefore, that the gate
driver circuitry acts as a low impedance
voltage source, to enable the gate
capacitance to be charged and
discharged as quickly as possible. It
must also have the capability of sourcing
and sinking high transient gate currents
- possibly several amps, in tens of
nanoseconds. Standard logic family
gates, and even the output stages of
switch mode controller ICs are rarely
able to provide this requirement and so
would be unable to drive power
MOSFETs in many applications. To
p ro vi d e an inter fac e between the
logic/PWM and the MOSFET, a high
speed, high current capable (though not
neces sar ily high pow er) buffer is
therefore required.
The gate drive requirement is met by the
complimentary emitter follower circuit
shown in Figure 2, which should be
constructed with transistors possessing
As examples of the current required
from the driver stage, and using the gate
charge curves as a source:
+V
i) A typical 100V, 300mΩ TO220 power
MOSFET requires approximately 8nC,
which for a switching time of say 20ns,
leads to a current requirement of 400mA.
ii) A typical 500V, 900mΩ TO220 power
MOSFET needs around 30nC, which
could lead to a current requirement of
1.5A.
Obviously, paralleled MOSFETs are
another concern, but a high current
source could be used with the
appropriate shared gate drive to reduce
component count in this application
Q1
R1
0R - see text
Logic/PWM
opto-coup'
Drive O/P
Q2
0V
Figure 2
Complimentary Emitter Follower Gate
Driver.
AN18 - 2
R1
Q1
D1
C1
R2
Q2
Q4
Q4
R2
Q3
R1
Logic
Q2
V(logic)
R3
Q1
Logic
Figure 3
Complimentary Emitter Follower Gate
Driver.
a high current capability (eg significant
current gain at high collector currents),
high FT (as a benchmark to a fast
switching capability), and ideally high
gain. As the driver transistors only
supply current while the capacitance is
charging or discharging, the power
capability (essentially determined by the
package characteristics) is quite low,
and can be tolerated by the smaller
t h r o u g h - h o l e a n d s u r fa c e m o u n t
packages.
Figure 4
Level Shifted PMOS Gate Driver.
and Figure 5 a method of maintaining
the correct drive level and drive phase,
when deriving a control signal from a 5V
logic based controller, by driving the
emitter of a fast switching pre-driver
transistor. This can either be a ZTX314
fo r a t h r o u g h -h o l e d e s i g n , o r a
F M M T 2 3 6 9 A f o r a s u r fa c e m ou n t
version.
Other variations have been devised
This basic circuit can be adapted for
different circuit topologies and
performance requirements as shown in
Figures 3, 4 and 5. Figure 3 shows
another method of introducing unequal
turn-on/turn-off times; Figure 4 shows a
level shifted driver for a PMOS device;
+12V
+5V
By adjusting the amount of resistance in
the charge path as shown, it is possible
to delay the turn-on time. This may be
necessary in some instances to prevent
cross-conduction in push-pull output
stages, or to decrease dV/dT to ensure
compliance with EMI/RFI regulations.
1K
FMMT
618
2K2
FMMT
2369
0*
IRF830
PWM Controller
2K2
22pF
FMMT
718
0V
( * Set turn-on delay )
Figure 5
Complimentary Emitter Follower Gate
Driver using Emitter Driven Switching
Transistor to Retain Phasing.
AN18 - 3
Application Note 18
Issue 1 March 1996
VGS-Gate Source Voltage (Volts)
14
also.
VDD=
20V
40V
60V
16
ID=3A
12
10
8
6
4
2
0
0
1
2
3
4
5
6
7
8
9
Application Note 18
Issue 1 March 1996
10 11 12
Q-Charge (nC)
Gate charge v gate-source voltage
Figure1
Gate Charge Curves for the ZVN4306A; a
1A DC rated 220mΩ E-Line (TO92) Style
MOSFET.
voltage must be driven to it’s final value
in as short a period as possible (within
EMI constraints) to minimise switching
losses. For a given value of required gate
charge, this means that the current
capability of the gate drive circuitry must
be carefully considered.
It is necessary therefore, that the gate
driver circuitry acts as a low impedance
voltage source, to enable the gate
capacitance to be charged and
discharged as quickly as possible. It
must also have the capability of sourcing
and sinking high transient gate currents
- possibly several amps, in tens of
nanoseconds. Standard logic family
gates, and even the output stages of
switch mode controller ICs are rarely
able to provide this requirement and so
would be unable to drive power
MOSFETs in many applications. To
p ro vi d e an inter fac e between the
logic/PWM and the MOSFET, a high
speed, high current capable (though not
neces sar ily high pow er) buffer is
therefore required.
The gate drive requirement is met by the
complimentary emitter follower circuit
shown in Figure 2, which should be
constructed with transistors possessing
As examples of the current required
from the driver stage, and using the gate
charge curves as a source:
+V
i) A typical 100V, 300mΩ TO220 power
MOSFET requires approximately 8nC,
which for a switching time of say 20ns,
leads to a current requirement of 400mA.
ii) A typical 500V, 900mΩ TO220 power
MOSFET needs around 30nC, which
could lead to a current requirement of
1.5A.
Obviously, paralleled MOSFETs are
another concern, but a high current
source could be used with the
appropriate shared gate drive to reduce
component count in this application
Q1
R1
0R - see text
Logic/PWM
opto-coup'
Drive O/P
Q2
0V
Figure 2
Complimentary Emitter Follower Gate
Driver.
AN18 - 2
R1
Q1
D1
C1
R2
Q2
Q4
Q4
R2
Q3
R1
Logic
Q2
V(logic)
R3
Q1
Logic
Figure 3
Complimentary Emitter Follower Gate
Driver.
a high current capability (eg significant
current gain at high collector currents),
high FT (as a benchmark to a fast
switching capability), and ideally high
gain. As the driver transistors only
supply current while the capacitance is
charging or discharging, the power
capability (essentially determined by the
package characteristics) is quite low,
and can be tolerated by the smaller
t h r o u g h - h o l e a n d s u r fa c e m o u n t
packages.
Figure 4
Level Shifted PMOS Gate Driver.
and Figure 5 a method of maintaining
the correct drive level and drive phase,
when deriving a control signal from a 5V
logic based controller, by driving the
emitter of a fast switching pre-driver
transistor. This can either be a ZTX314
fo r a t h r o u g h -h o l e d e s i g n , o r a
F M M T 2 3 6 9 A f o r a s u r fa c e m ou n t
version.
Other variations have been devised
This basic circuit can be adapted for
different circuit topologies and
performance requirements as shown in
Figures 3, 4 and 5. Figure 3 shows
another method of introducing unequal
turn-on/turn-off times; Figure 4 shows a
level shifted driver for a PMOS device;
+12V
+5V
By adjusting the amount of resistance in
the charge path as shown, it is possible
to delay the turn-on time. This may be
necessary in some instances to prevent
cross-conduction in push-pull output
stages, or to decrease dV/dT to ensure
compliance with EMI/RFI regulations.
1K
FMMT
618
2K2
FMMT
2369
0*
IRF830
PWM Controller
2K2
22pF
FMMT
718
0V
( * Set turn-on delay )
Figure 5
Complimentary Emitter Follower Gate
Driver using Emitter Driven Switching
Transistor to Retain Phasing.
AN18 - 3
Application Note 18
Issue 1 March 1996
Application Note 18
Issue 1 March 1996
VCE=2V
1.4
450
25°C
0.8
0.6
225
-55°C
0.4
0.2
0.0
0
1mA
10mA
100mA
1A
10A
1.2
25°C
Normalised Gain
1.0
VCE=2V
100°C
1.0
450
0.8
0.6
-55°C
225
0.4
Typical Gain (hFE)
100°C
Typical Gain (hFE)
Table 1 presents some of the transistors
available from ZETEX, that are suitable
for the gate driver application. The
SOT23 package used by ZETEX
possesses a power dissipation figure of
500mW for the FMMT489/589, or
625mW for the FMMT618/718 (see Note
1) - the latter being approximately twice
that available from conventional SOT23
devices. This feature means that driver
circuits previously effected with SOT89
packaged transistors can now take
advantage of the smaller, lighter and
more cost effective SOT23 range. The
charts shown in Figures 6 and 7 illustrate
the high current hFE capability of the
FMMT618 and FMMT718 transistors
(also applicable to the through-hole
versions - ZTX618 and ZTX718) which,
1.2
Normalised Gain
including complimentary drivers for
level shift transformers, and for
analogue applications employing
op-amp driven voltage followers.
0.2
0.0
1mA
10mA
100mA
1A
0
10A
Collector Current
Collector Current
hFE vs IC
hFE vs IC
Figure 6
hFE Profile for the FMMT618.
Figure 7
hFE Profile for the FMMT718.
with transition frequencies around
150MHz, guarantees high current drive
integrity at the switching frequencies
being demanded by modern power
supply solutions.
Figures 8 and 9 are oscillographs
Device
Polarity
Package
B VCEO
IC (DC)
ICM
hFE (mb)2
FMMT489
NPN
SOT23
30
1
4
200
FMMT589
PNP
SOT23
30
1
2
200
FMMT618
NPN
SOT23
20
2.5
6
450
FMMT718
PNP
SOT23
20
1.5
6
450
ZTX618
NPN
E-Line
25
3.5
10
450
ZTX718
PNP
E-Line
25
2.5
6
450
Note 1: When mounted on an industry standard 15 x15mm ceramic substrate. For an FR4
assembly, and a board of 1” x1”, the FMMT618/718 series of “SuperSOT” transistors can
achieve a Pd of 700mW.
Note2: hFE (mb) - the value of the mid band current gain.
showing the response (albeit somewhat
contrived for the purpose of illustration)
of the g-s voltage and the resulting
charge and discharge current provided
by the complimentary emitter follower
shown in figure 2. Figure 8 is for a 500V
3Ω part, while Figure 9 is for a 500V
900mΩ part. The lower trace in both
cases being the control pulse to the
driver stage, and the load is 2.4A
resistive from a 350V supply. A peak
pulse current of 400mA, and 1.6A being
apparent respectively. A Tektronix
current probe was used to measure the
gate current in a 0.75” loop.
Figure 8
High Current Gate Driver with 500V 3Ω
MOSFET; 2.4A Load.
1. Logic signal 5V/div., 2. G-S Voltage
5V/div., 3. G-S Current 100mA/div.
Timebase at 50ns/div.
Figure 9
High Current Gate Driver with 500V
900mΩ MOSFET; 2.4A Load.
1. Logic Signal 10V/div., 2. G-S Voltage
5V/div., 3. G-S Current 500mA/div.
Timebase at 100ns/div.
Table 1
Zetex Bipolar Transistors for MOSFET Gate Driver Applications.
AN18 - 4
AN18 - 5
Application Note 18
Issue 1 March 1996
Application Note 18
Issue 1 March 1996
VCE=2V
1.4
450
25°C
0.8
0.6
225
-55°C
0.4
0.2
0.0
0
1mA
10mA
100mA
1A
10A
1.2
25°C
Normalised Gain
1.0
VCE=2V
100°C
1.0
450
0.8
0.6
-55°C
225
0.4
Typical Gain (hFE)
100°C
Typical Gain (hFE)
Table 1 presents some of the transistors
available from ZETEX, that are suitable
for the gate driver application. The
SOT23 package used by ZETEX
possesses a power dissipation figure of
500mW for the FMMT489/589, or
625mW for the FMMT618/718 (see Note
1) - the latter being approximately twice
that available from conventional SOT23
devices. This feature means that driver
circuits previously effected with SOT89
packaged transistors can now take
advantage of the smaller, lighter and
more cost effective SOT23 range. The
charts shown in Figures 6 and 7 illustrate
the high current hFE capability of the
FMMT618 and FMMT718 transistors
(also applicable to the through-hole
versions - ZTX618 and ZTX718) which,
1.2
Normalised Gain
including complimentary drivers for
level shift transformers, and for
analogue applications employing
op-amp driven voltage followers.
0.2
0.0
1mA
10mA
100mA
1A
0
10A
Collector Current
Collector Current
hFE vs IC
hFE vs IC
Figure 6
hFE Profile for the FMMT618.
Figure 7
hFE Profile for the FMMT718.
with transition frequencies around
150MHz, guarantees high current drive
integrity at the switching frequencies
being demanded by modern power
supply solutions.
Figures 8 and 9 are oscillographs
Device
Polarity
Package
B VCEO
IC (DC)
ICM
hFE (mb)2
FMMT489
NPN
SOT23
30
1
4
200
FMMT589
PNP
SOT23
30
1
2
200
FMMT618
NPN
SOT23
20
2.5
6
450
FMMT718
PNP
SOT23
20
1.5
6
450
ZTX618
NPN
E-Line
25
3.5
10
450
ZTX718
PNP
E-Line
25
2.5
6
450
Note 1: When mounted on an industry standard 15 x15mm ceramic substrate. For an FR4
assembly, and a board of 1” x1”, the FMMT618/718 series of “SuperSOT” transistors can
achieve a Pd of 700mW.
Note2: hFE (mb) - the value of the mid band current gain.
showing the response (albeit somewhat
contrived for the purpose of illustration)
of the g-s voltage and the resulting
charge and discharge current provided
by the complimentary emitter follower
shown in figure 2. Figure 8 is for a 500V
3Ω part, while Figure 9 is for a 500V
900mΩ part. The lower trace in both
cases being the control pulse to the
driver stage, and the load is 2.4A
resistive from a 350V supply. A peak
pulse current of 400mA, and 1.6A being
apparent respectively. A Tektronix
current probe was used to measure the
gate current in a 0.75” loop.
Figure 8
High Current Gate Driver with 500V 3Ω
MOSFET; 2.4A Load.
1. Logic signal 5V/div., 2. G-S Voltage
5V/div., 3. G-S Current 100mA/div.
Timebase at 50ns/div.
Figure 9
High Current Gate Driver with 500V
900mΩ MOSFET; 2.4A Load.
1. Logic Signal 10V/div., 2. G-S Voltage
5V/div., 3. G-S Current 500mA/div.
Timebase at 100ns/div.
Table 1
Zetex Bipolar Transistors for MOSFET Gate Driver Applications.
AN18 - 4
AN18 - 5
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