ANP005

ANP005
Application Note
AP2001 CCFL Inverter
Contents
1.
AP2001 Specifications
1.1 Features
1.2 General Description
1.3 Pin Assignments
1.4 Pin Descriptions
1.5 Block Diagram
1.6 Absolute Maximum Ratings
2.
Hardware
2.1
2.2
2.3
2.4
2.5
2.6
3.
Introduction
Description of the CCFL Inverter Circuit
Input / Output Connections
Schematic
Board of Materials
Board Layout
Design Procedures
3.1 Introduction
3.2 Operating Specifications
3.3 Design Procedures
3.3.1 Current Regulating Buck Converter
3.3.2 Royer-Type Resonant Oscillator
3.3.2.1
Selection of the Transformer (T)
3.3.2.2
Selection of the Ballast Capacitor (CY)
3.3.2.3
Selection of the Resonant Capacitor (CR)
3.3.2.4
Selection of the Push-Pull Transistors (Q)
3.3.2.5
Brightness Adjust of the Lamp
This application note contains new product information. Diodes, Inc. reserves the right to modify the product specification without notice. No liability is
assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.
1/15
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ANP005
Application Note
AP2001 CCFL Inverter
1.
AP2001 Specifications
1.1 Features
- Dual PWM Control Circuitry
- Operating Voltage can be up to 50V
- Adjustable Dead Time Control (DTC)
- Under Voltage Lockout (UVLO) Protection
- Short Circuit Protection (SCP)
- Variable Oscillator Frequency...... 500KHz Max
- 2.5V Voltage Reference Output
- 16-pin PDIP and SOP Packages
1.2 General Description
The AP2001 integrates Pulse-width-Modulation (PWM) control circuit into a single chip, mainly designs
for power-supply regulator. All the functions include an on-chip 2.5V Reference Output, two Error Amplifiers,
an Adjustable Oscillator, two Dead-Time Comparators, UVLO, SCP, DTC circuitry, and Dual Common-Emitter
(CE) output transistor circuits. Recommend the output CE transistors as pre-driver for driving externally. The
DTC can provide from 0% to 100%. Switching frequency can be adjustable by trimming RT and CT. During
low VCC situation, the UVLO makes sure that the outputs are off until the internal circuit is operating normally.
1.3 Pin Assignments
( Top View )
CT
1
16
RT
EA1+
EA1FB1
2
15
3
14
4
13
5
12
DTC1
OUT1
GND
6
11
7
10
8
9
REF
SCP
EA2+
EA2FB2
DTC2
OUT2
VCC
PDIP/SOP
1.4 Pin Descriptions
Name
Description
CT
Timing Capacitor
RT
Timing Resistor
EA+
Error Amplifier Input(+)
EA -
Error Amplifier Input(-)
FB
Feedback Loop Compensation
DTC
Dead Time Control
OUT
Pre-driver Output
GND
Ground
VCC
Supply Voltage
SCP
Short Circuit Protection
REF
Voltage Reference
2/15
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Application Note
AP2001 CCFL Inverter
1.5 Block Diagram
VCC
SCP
RT
Bandgap
Reference
REF
CT
DTC1
Oscillator
MAX.500KHz
+
+
-
EA1 +
EA1 -
OUT1
VREF
Error Amplifier 1
PWM Amplifier 1
170K
FB1
1.18V
+
+
UVLO
R
R
S
+
+
EA2+
EA2 Error Amplifier 2
OUT2
PWM Amplifier 2
FB2
GND
DTC2
1.6 Absolute Maximum Ratings
Symbol
Rating
Unit
Supply Voltage
40
V
VI
Amplifier Input Voltage
20
V
VO
Collector Output Voltage
40
V
Io
Collector Output Current
21
mA
VCC
TOP
TST
TLEAD
Parameter
Operating Temperature Range
Storage Temperature Range
Lead Temperature 1.6 mm (1/16 inch) from Case for 10 Seconds
-20 to +85
o
-65 to +150
o
260
o
C
C
C
3/15
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Application Note
AP2001 CCFL Inverter
2. Hardware
2.1 Introduction
The CCFL presents a highly nonlinear load to the converter. Initially when the lamp is cold (inoperative
for some finite time), the voltage to fire the lamp is typically more than three times higher than the sustaining
voltage. The lamp characteristic fires at 1800V and exhibits an average sustaining voltage (Vn) of 600V.
Notice that the lamp initially exhibits a positive resistance and then transitions to a negative resistance above
1mA. These characteristics dictate a high output impedance (current source) drive to suppress the negative
load resistance effect and limit current during initial lamp firing. Since the ZVS (zero voltage switched)
converter has low output impedance, an additional “lossless” series impedance such as a coupling capacitor
must be added. To facilitate analysis, the equivalent CCFL circuit (shown in figure 1) is used. VFL is the
average lamp sustaining voltage over the operating range. The lamp impedance (RFL) is a complex function,
but can be considered a fixed negative resistance at the sustaining voltage. Stray lamp and interconnect
capacitance are lumped together as CCFL.
VFL
CFL
RFL
Figure 1. CCFL equivalent circuit
The CCFL inverter demo board supply 2~4 pcs lamp. This board can supply output power up to 8.4W for
every transformer output (600Vrms / 14mA). Using a dc input voltage of 10.8 V to 13.2 V, The control method
used in the board is fixed frequency, variable on-time pulse-width-modulation (PWM). The feedback method
used is voltage-mode control. Other features of the board include under voltage lockout (UVLO), short-circuit
protection (SCP), and adjustable dead time control (DTC).
4/15
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AP2001 CCFL Inverter
2.2 Description of the CCFL inverter circuit
The CCFL inverter circuit is comprised of the current regulating buck converter and the Royer-type
resonant oscillator. The buck converter controls the magnitude of CCFL current. This feature is instrumental in
providing dimming control. The Royer-type resonant oscillator circuit is shown in Figure 2.
T
Vcc
Lm
LB
D
CY
CY
Lm
CR
0.7
0
PWM control
0.7
0
Figure 2. Royer-type Resonant Oscillator Circuit
2 CY
IL
4CR
Lm
RL / 2
Figure 3. Simplified Royer-type Resonant Oscillator Circuit
Royer-type Resonant Oscillator
The circuit shown in Figure 2 is essentially a current fed parallel loaded parallel resonant circuit, which
can be further simplified to that shown in Figure 3. The simplification in Figure 3 assumes that two lamps are
operating in parallel. If one lamp is used then the original output ballast capacitor value should be used in the
calculations. Lm is the magnetizing inductance of the inverter transformer, which tunes with the resonant
capacitor CR to set the resonant frequency of the inverter. The oscillator frequency of the AP2001 is set lower
than the resonant frequency to ensure synchronization. The current source labeled IC in Figure 2 is a
conceptual current-fed which models the function of LB.
5/15
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AP2001 CCFL Inverter
Buck Converter
The Buck converter converts a DC voltage to a lower DC voltage. Figure 4 shows the basic buck topology.
When the switch SW is turned on, energy is stored in the inductor L and it has constant voltage “VL = Vi – Vo”,
the inductor current iL ramps up at a slope determined by the input voltage. Diode D is off during this period.
Once the switch, SW, turns off, diode D starts to conduct and the energy stored in the inductor is released to
the load. Current in the inductor ramps down at a slope determined by the difference between the input and
output voltages.
iS
VS
SW
Vi
L
iD
VD
IO
VL
iL
iC
C
D
RL
VO
Figure 4. Typical Buck Converter Topology
6/15
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AP2001 CCFL Inverter
2.3
Input / Output Connections
V c c (1 2 V )
GND
E n a b le (5 V )
GND
D im m in g (0 ~ 5 V )
GND
Figure 5. I/O Connections
7/15
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AP2001 CCFL Inverter
2.4 Schematic
Figure 6. CCFL Inverter Schematic
8/15
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AP2001 CCFL Inverter
2.4
Board of Materials
No. Value
Q'ty Part Reference
Description
Metallized Polyester Film CAP. 0.15uF
100V
Ceramic Chip CAP. 1uF 25V ±10%
C2 C12
K X7R 0805
C3 C7 C8 C9 C10 Ceramic Chip CAP. 0.1uF 25V ±10%
C11 C14
K X7R 0805
C4 C5 C16 C17
To be Defined
Ceramic Chip CAP. 1uF 50V ±10%
C6 C18
K X7R 1206
Ceramic Chip CAP. 102pF 50V ±10%
C13
K X7R 0805
Ceramic CAP.SL (NPO) 27pF ± 5%
CY1 CY2 CY3 CY4
3KV
C1 C15
Manufacturers Part
Number
ARCOTRONICS
EPCOS
Philips,
Team-Young
Philips,
Team-Young
1
0.15uF/100V
2
2
1uF/25V
2
3
0.1uF/25V
7
4
Open
4
5
1uF/25V
2
6
102pF/25V
1
7
27pF/3KV
4
8
RB160L-40
2
D1 D4
Schottky Diode 1A 40V
9
LL4148
1
D2
Switching Diode 0.15A 75V
10 BAV99
2
D3 D5
Dual Switching Diode 0.15A 75V
11 220uF/25V
4
EC1 EC2 EC3 EC4 Electrolysis CAP. 220uF 25V
12 3A
1
F1
13 Header_8
1
J1
14 CON2
4
J2 J3 J4 J5
15 CON2
16 Power_Jack
1
1
J6
J7
17 Header_8
1
J8
18 100uH/1A
2
L1 L2
19 LED
1
LED1
20 PMOS_SOP8
2
Q1 Q8
21 RN2402
1
Q2
22 MMBT4401
3
Q3 Q4 Q9
23 MMBT4403
2
Q5 Q10
24 2SC3669-Y
4
Q6 Q7 Q11 Q12
25 2.7K
4
R1 R12 R27 R37
26 1K
8
R2 R3 R4 R5 R29
R30 R31 R32
Chip Resistance 1K 1/4W ±10% J 1206 Yageo(RL Series)
27 100K
2
R6 R17
Chip Resistance 100K 1/8W ±10%
J 0805
Yageo(RL Series)
28 36K
2
R7 R33
Chip Resistance 36K 1/8W ±10%
J 0805
Yageo(RL Series)
29 10
2
R8 R28
Chip Resistance 10 1/8W ±10% J 0805 Yageo(RL Series)
Fuse F/P 3A 32V 1206
2.54mm Connectors 90° 8 Pin Header
Single Row
3.5mm Disconnectable Crimp Style
Connectors
5.08mm PCB Terminal Block 2 Pin
DC Power Jack 6.4mm/2.5mm
2.54mm Connectors 90° 8pin Female
Header Single Row
Choke Coil 100uH 1A
Through-Hole Green 5mm(Pitch
2.54mm)
Philips,
Team-Young
Philips,
Team-Young
TDK, MURATA
DIODES
ROHM
ROHM
DIODES
ROHM
DIODES
NIPPON,
NICHICON
LITTLEFUSE
B140
RB160L-40
LL4148
LL4148
BAV99
BAV99
429003
E&T
JST
SM02B
DINKLE
LIH SHENG
ELK508V-02P
E&T
Delta
86A-2094
KingBright
L1513GT
Toshiba
Fairchild
Built-in Resistance PNP BJT -50V -0.1A Toshiba
SC-59
ROHM
ROHM
NPN BJT 40V 0.6A SOT-23
DIODES
ROHM
PNP BJT -40V -0.6A SOT-23
DIODES
NPN BJT 80V 2A
Toshiba
Chip Resistance 2.7K 1/8W ±10%
Yageo(RL Series)
J 0805
P-Channel MOSFET -30V -5A
TPC8104-H
FDS9435
RN2402
DTA114EK
SST2222A
MMBT4401
SST2907A
MMBT4403
2SC3669-Y
9/15
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ANP005
Application Note
AP2001 CCFL Inverter
Value
Q'ty Part Reference
Description
No.
30 1K
4
R9 R11 R15 R19
R23 R36
31 9.1K
2
R10 R35
32 33K
2
R13 R38
33 Open
2
R14 R25
34 20K
2
R16 R34
35 5.1K
3
R18 R22
36 15K
1
R20
37 43K
1
R21
38 0
2
R24 R42 R43
39 5.6K
1
R26
40 120
1
R39
41 360
1
R40
42 470
1
R41
43 SW_SPDT
CCFL
44
Transformer
1
SW1
Chip Resistance 1K 1/8W ±10%
J0805
Chip Resistance 9.1K 1/8W ±10%
J 0805
Chip Resistance 33K 1/8W ±10%
J 0805
To be Defined
Chip Resistance 20K 1/8W ±10%
J 0805
Chip Resistance 5.1K 1/8W ±10%
J 0805
Chip Resistance 15K 1/8W ±10%
J 0805
Chip Resistance 43K 1/8W ±10%
J 0805
Chip Resistance 0 1/8W ±10% J 0805
Chip Resistance 5.6K 1/8W ±10%
J 0805
Chip Resistance 120 1/8W ±10%
J 0805
Chip Resistance 362 1/8W ±10%
J 0805
Chip Resistance 470 1/8W ±10%
J 0805
SPDT Switch 3pin
2
T1 T2
Inverter X'FMR (10/10/3):1500TS
45 AP2001
1
U1
46 AP1117
47 10K
48 12V/0.5W
1
1
2
U2
VR1
ZD1 ZD2
Monolithic Dual Channel PWM
Controller
1A Positive Low Dropout Regulator
Variable Resistance 10K
Zener Diode 0.5W 12V
Manufacturers Part
Number
Yageo(RL Series)
Yageo(RL Series)
Yageo(RL Series)
Yageo(RL Series)
Yageo(RL Series)
Yageo(RL Series)
Yageo(RL Series)
Yageo(RL Series)
Yageo(RL Series)
Yageo(RL Series)
Yageo(RL Series)
Yageo(RL Series)
Delta
INT018T
Anachip
AP2001S
Anachip
AP1117T50
ROHM
DIODES
RLZ TE-11
12C
ZMM5242B
10/15
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AP2001 CCFL Inverter
2.6 Board Layout
Figure 8. Top silk layer
Figure 9. Top layer
Figure 10. Bottom layer
Figure 11. Bottom Silk layer
11/15
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AP2001 CCFL Inverter
3. Design Procedure
3.1 Introduction
The AP2001 integrated circuit is a dual PWM controller. It operates over a wide input voltage range.
Being low in cost, it is a very popular choice of PWM controller. This section will describe the AP2001
design procedure. The operation and the design of the CCFL inverter will also be discussed in detail.
3.2 Operating Specifications
Specification
Min
Typ
Max
Units
Input Voltage
10.8
12
13.2
V
Operating Frequency
90
100
110
KHz
Output Frequency
40
50
60
KHz
Output Power (For every Transformer)
0
Dimming
8.4
W
1500
1800
Vrms
Output Voltage (No Load)
Table 1. Operating Specifications
3.3 Design Procedures
This section describes the steps to design current regulating buck converters and Royer-type
oscillators, and explains how to construct basic power conversion circuits including the design of the
control chip functions and the basic loop. A switching frequency of 100 kHz was chosen.
3.3.1 Current Regulating Buck Converter
Example calculations accompany the design equations. Since this is a fixed output inverter, all
example calculations apply to the converter with an output power of 8.4W and input voltage set to 13.2V,
unless specified otherwise. The first quantity to be determined is the converter of the duty cycle value.
Duty ratio D =
Ton
Vo + Vd
=
Ts
Vin – Vds(sat)
, 0 ≦ D ≦ 1
Assuming the commutating diode forward voltage Vd = 0.5 V, the power switch on voltage Vds(sat)
= 0.1V and Vo = V PRI(DC) is dependent on CCFL (1 or 2 lamp, required current). In this case V PRI(DC) =
10.8V and Io = 0.78A for one lamp, V PRI(DC) = 7.5V, Io = 1.12A and for two lamp, so the duty cycle for
Vin = 13.2 is 0.78 for one lamp and 0.61 for two lamps. The inductor plays a central role in the proper
operation of the inverter circuit. To find the inductor value it is necessary to consider the inductor ripple
current. Choose an inductor to maintain continuous-mode operation down to 20 percent (Io(min)) of the
rated output load:
Δ IL = 2 x 20% x Io = 2 x 0.2 x 0.78 = 0.31A
12/15
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AP2001 CCFL Inverter
The inductor “LB” value for one lamp is connected to be:
LB ≧
(Vin - Vds(sat) – Vo) x Dmin
=
Δ IL x fs
(13.2 – 0.1 – 10.8) x 0.78
0.31 x (100 x 10^3)
= 58μ H
If the transformer’s output connects two lamps then LB ≧ 76μ H on above, so we choose buck
inductor value to be 100uH for this case. If core loss is a problem, increasing the inductance of L will
help. Other component selection (PMOS, Diode, Cout), please refer the AP2001 for Buck+Boost demo
board manual.
3.3.2 Royer-type Resonant Oscillator
The current fed Royer-type converter shown in figure 3 is driven at its resonant frequency to
provide ZVS operation. The BJTs (Q1 & Q2) are alternately driven at 50% duty cycle. Commutation
occurs as V1 and V2 resonate through zero thereby insuring zero voltage switching. This virtually
eliminates switching losses associated with charging BJT output and stray capacitance, and reduces
base drive losses by minimizing the base charge. Current is supplied to the Royer-type stage by a buck
regulator (Q3). Winding inductance, LR, and CR, the combined effective capacitance of CR and the
reflected secondary capacitances make up the resonant tank. The secondary side of the transformer
exhibits a symmetrical sine wave voltage varying from about 300Vrms to 1800Vrms. Capacitor CY
provides ballasting and insures that the converter is only subjected to positive impedance loads.
Example calculations accompany the design equations. All example calculations apply to the converter
with output striking voltages of 1500Vrms, operating voltages of 600Vrms and input voltages set to 12V,
unless specified otherwise.
3.3.2.1
Selection of the Transformer (T)
The inverter transformer T1 also has triple roles. Besides stepping up the low voltage to a
higher value suitable for the operation of the lamp(s), it is also a part of the resonant circuit and
driver of external BJTs. The magnetizing inductance of this transformer is the resonating inductor.
This transformer is an off the shelf part available from different coil manufacturers. The inverter
transformer used in the example circuit is capable of driving one 4.2W lamp with a start voltage of
1800V. The striking voltage is dependent on supply voltage and the turn ratio (TR) of transformer
as described below.
Vstrike(rms) ≧
TR ≧
π x V PRI(DC) x TR
2√ 2 x Vstrike(rms)
π x V PRI(DC)
2√ 2
=
2√ 2 x 1800
π x 10.8
= 150
So we choose part number “INT018T-1” CCFL transformer of Delta.
In this transformer, Lm = 10uH, TR = 1500/10 = 150, RDC(PRI) = 63mΩ , RDC(SEC) = 602Ω
3.3.2.2
Selection of the Ballast Capacitor (CY)
Since the circuit always operates at resonance the impedance seen by the above current
source is resistive and equal to the transformed impedance of the lamp which is given by the
formula below:
VL
RL =
IL
13/15
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Where VL is the operating voltage of the lamp at full brightness and IL is the lamp current. In
most cases the value of the ballasting capacitor CY is chosen such that its reactance is
approximately equal to the lamp resistance RL. The two capacitors CY are used to simulate two
separate current sources, so that the current will be shared between the lamps. The typical value
for RL is 100KΩ . For a typical operating frequency of 50kHz, CY yields a capacitor’s reactance of
approximately 100KΩ . The best choice for this capacitor is from 27 to 33pF. In many practical
designs, for minimizing current distortion caused by the non-linear behavior of the lamp, VC(BALLAST)
is set to be around 1.2~ 2 times of VLAMP.
VC(BALLAST) =
ILAMP
ILAMP
CY =
= K x VLAMP, K = 1.2 ~ 2
2π x FLAMP x CY
=
2π x FLAMP x K x VLAMP
7m
2π x 50K x 1.3 x 600
= 29pF
So we choose 27pF/3KV, a smaller CY can make more linear the lamp connection.
3.3.2.3
Selection of the Resonant Capacitor (CR)
The primary and secondary circuits determine the resonant frequency of the Royer oscillator.
Under steady state conditions, the oscillator frequency will be locked to twice the natural frequency
of the lamp inverter resonant frequency. The lower bound on the resonant frequency (that will be
used to calculate the oscillator timing components) can be calculated by using the following
formula:
FLAMP =
1
2π √ [Lm(4CR + n x TR^2 x CY)]
Where: n is the number of lamps at the output with ballasting capacitors CY, TR is the secondary to
primary turns ratio of T1, Lm is the primary inductance of T1 and CR is the capacitance across the
primary.
1
50K =
2π √ [10u(4 x CR + 1 x 22500 x 27p)]
CR = 0.101uF
So we choose 0.15uF/100V
3.3.2.4
Selection of the Push-Pull Transistors (Q)
The push-pull output BJTs(Q6, Q7, Q11, Q12) are alternately driven at 50% duty cycle by the
transformer (pin1 and pin6). Commutation occurs as VC(Q6) and VC(Q7) resonate through zero
thereby insuring zero voltage switching. This virtually eliminates switching losses associated with
charging BJT output and stray capacitance, and reduces base drive losses by minimizing the base
current. The current of the transformer primary IPRI is:
IPRI =
VPRI
ZTANK
,
ZTANK =√ (
Lm
CR
) , VPRI(RMS) =
VSEC(RMS)
=
TR
1800
150
= 12V(RMS)
so we can obtain IPRI(MAX) approximately 1.47A and VPRI(PEAK) = VPRI(RMS)√ 2 approximately 17V.
Therefore, the BJT’s VCEO = 2 x VPRI(PEAK) = 34V, We can choose 2 ~ 3 times of VCEO and 1.5 ~ 2
times of IC appropriate BJT, the Toshiba’s transistor “2SC3669” is selected by us. It’s VCEO = 80V
and IC = 2A.
14/15
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AP2001 CCFL Inverter
3.3.2.6
Brightness Adjust of the Lamp
Brightness adjust
There are several ways of generating the “brightness adjust” voltage. The
simplest method is by using a potentiometer as shown in Figure 10. If the 1KΩ
resistor installed to R9/R19 that goes to brightness adjust control serves from dark to
light, its method of brightness adjustment is modulating OP+(feedback) voltage to
change duty cycle of PWM out. If R9/R19 is not installed 1KΩ resistor then
brightness adjust control serves from dim to light, its method of brightness adjustment
is modulating OP-(compared voltage) voltage to change duty cycle of PWM out.
Figure 12. Dimming voltage generation
V DD = 5V
to J1's pin 7
(dimming)
100KO
Brightness Fixed
If you would like brightness fixed then just remove R9, R17, R19, and modify
R11/R36 resistance value, it is modulating appropriately for feedback (OP+) voltage
to fixed duty cycle of PWM out.
Written by Cheng-Yu Chen(陳政佑)
15/15
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