Data Sheet

INTEGRATED CIRCUITS
DATA SHEET
PCF8570
256 × 8-bit static low-voltage RAM
with I2C-bus interface
Product specification
Supersedes data of 1997 Sep 02
File under Integrated Circuits, IC12
1999 Jan 06
Philips Semiconductors
Product specification
256 × 8-bit static low-voltage RAM with
I2C-bus interface
CONTENTS
1
FEATURES
2
APPLICATIONS
3
GENERAL DESCRIPTION
4
QUICK REFERENCE DATA
5
ORDERING INFORMATION
6
BLOCK DIAGRAM
7
PINNING
8
CHARACTERISTICS OF THE I2C-BUS
8.1
8.2
8.3
8.4
8.5
Bit transfer
Start and stop conditions
System configuration
Acknowledge
I2C-bus protocol
9
LIMITING VALUES
10
HANDLING
11
DC CHARACTERISTICS
12
AC CHARACTERISTICS
13
APPLICATION INFORMATION
13.1
13.2
13.3
Application example
Slave address
Power-saving mode
14
PACKAGE OUTLINES
15
SOLDERING
15.1
15.2
15.2.1
15.2.2
15.3
15.3.1
15.3.2
15.3.3
15.4
Introduction
Through-hole mount packages
Soldering by dipping or by solder wave
Manual soldering
Surface mount packages
Reflow soldering
Wave soldering
Manual soldering
Suitability of IC packages for wave, reflow and
dipping soldering methods
16
DEFINITIONS
17
LIFE SUPPORT APPLICATIONS
18
PURCHASE OF PHILIPS I2C COMPONENTS
1999 Jan 06
2
PCF8570
Philips Semiconductors
Product specification
256 × 8-bit static low-voltage RAM with
I2C-bus interface
1
PCF8570
FEATURES
• Operating supply voltage 2.5 to 6.0 V
• Low data retention voltage; minimum 1.0 V
• Low standby current; maximum 15 µA
• Power-saving mode; typical 50 nA
• Serial input/output bus (I2C-bus)
3
• Address by 3 hardware address pins
The PCF8570 is a low power static CMOS RAM,
organized as 256 words by 8-bits.
• Automatic word address incrementing
• Available in DIP8 and SO8 packages.
2
GENERAL DESCRIPTION
Addresses and data are transferred serially via a two-line
bidirectional bus (I2C-bus). The built-in word address
register is incremented automatically after each written or
read data byte. Three address pins, A0, A1 and A2 are
used to define the hardware address, allowing the use of
up to 8 devices connected to the bus without additional
hardware.
APPLICATIONS
• Telephony:
– RAM expansion for stored numbers in repertory
dialling (e.g. PCD33xxA applications)
• General purpose RAM for applications requiring
extremely low current and low-voltage RAM retention,
such as battery or capacitor-backed.
• Radio, television and video cassette recorder:
– channel presets
• General purpose:
– RAM expansion for the microcontroller families
PCD33xxA, PCF84CxxxA, P80CLxxx and most other
microcontrollers.
4
QUICK REFERENCE DATA
SYMBOL
PARAMETER
VDD
supply voltage
IDD
supply current (standby)
CONDITIONS
MIN.
MAX.
UNIT
2.5
6.0
fSCL = 0 Hz
−
15
µA
Tamb = 25 °C
IDDR
supply current (power-saving mode)
−
400
nA
Tamb
operating ambient temperature
−40
+85
°C
Tstg
storage temperature
−65
+150
°C
5
ORDERING INFORMATION
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
PCF8570P
DIP8
plastic dual in-line package; 8 leads (300 mil)
SOT97-1
PCF8570T
SO8
plastic small outline package; 8 leads; body width 7.5 mm
SOT176-1
1999 Jan 06
3
Philips Semiconductors
Product specification
256 × 8-bit static low-voltage RAM with
I2C-bus interface
6
PCF8570
BLOCK DIAGRAM
handbook, full pagewidth
A0
A1
A2
PCF8570
WORD
ADDRESS
REGISTER
INPUT
FILTER
I C BUS
CONTROL
7
ROW
SELECT
MEMORY
CELL
ARRAY
COLUMN
SELECT
MULTIPLEXER
1
2
3
6
SCL
SDA
VDD
VSS
TEST
5
8
4
POWER
ON
RESET
2
8
SHIFT
REGISTER
R/W
CONTROL
7
MLB928
Fig.1 Block diagram.
7
PINNING
SYMBOL
PIN
DESCRIPTION
A0
1
hardware address input 0
A1
2
hardware address input 1
A2
3
hardware address input 2
VSS
4
negative supply
SDA
5
serial data input/output
SCL
6
serial clock input
TEST
7
Input for power-saving mode (see section
“Power-saving mode”). Also used as a test output
during manufacture. TEST should be tied to VSS
during normal operation.
VDD
1999 Jan 06
8
page
A0
1
A1
2
8
VDD
7
TEST
PCF8570
positive supply
4
A2
3
6
SCL
VSS
4
5
SDA
MLB929
Fig.2 Pin configuration.
Philips Semiconductors
Product specification
256 × 8-bit static low-voltage RAM with
I2C-bus interface
8
CHARACTERISTICS OF THE I2C-BUS
PCF8570
8.1
The I2C-bus is for bidirectional, two-line communication
between different ICs or modules. The two lines are a
serial data line (SDA) and a serial clock line (SCL). Both
lines must be connected to a positive supply via a pull-up
resistor. Data transfer may be initiated only when the bus
is not busy.
Bit transfer
One data bit is transferred during each clock pulse.
The data on the SDA line must remain stable during the
HIGH period of the clock pulse as changes in the data line
at this time will be interpreted as a control signal.
SDA
SCL
change
of data
allowed
data line
stable;
data valid
MBA607
Fig.3 Bit transfer.
8.2
Start and stop conditions
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the
clock is HIGH is defined as the start condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH is
defined as the stop condition (P).
SDA
SDA
SCL
SCL
S
P
START condition
STOP condition
Fig.4 Definition of start and stop conditions.
1999 Jan 06
5
MBA608
Philips Semiconductors
Product specification
256 × 8-bit static low-voltage RAM with
I2C-bus interface
8.3
PCF8570
System configuration
A device generating a message is a ‘transmitter’, a device receiving a message is the ‘receiver’. The device that controls
the message is the ‘master’ and the devices which are controlled by the master are the ‘slaves’.
SDA
SCL
MASTER
TRANSMITTER /
RECEIVER
SLAVE
RECEIVER
SLAVE
TRANSMITTER /
RECEIVER
MASTER
TRANSMITTER /
RECEIVER
MASTER
TRANSMITTER
MBA605
Fig.5 System configuration.
8.4
The device that acknowledges must pull down the SDA
line during the acknowledge clock pulse, so that the SDA
line is stable LOW during the HIGH period of the
acknowledge related clock pulse (set-up and hold times
must be taken into consideration). A master receiver must
signal an end of data to the transmitter by not generating
an acknowledge on the last byte that has been clocked out
of the slave. In this event the transmitter must leave the
data line HIGH to enable the master to generate a stop
condition.
Acknowledge
The number of data bytes transferred between the start
and stop conditions from transmitter to receiver is
unlimited. Each byte of eight bits is followed by an
acknowledge bit. The acknowledge bit is a HIGH level
signal put on the bus by the transmitter during which time
the master generates an extra acknowledge related clock
pulse. A slave receiver which is addressed must generate
an acknowledge after the reception of each byte. Also a
master receiver must generate an acknowledge after the
reception of each byte that has been clocked out of the
slave transmitter.
clock pulse for
acknowledgement
START
condition
handbook, full pagewidth
SCL FROM
MASTER
1
2
8
DATA OUTPUT
BY TRANSMITTER
S
DATA OUTPUT
BY RECEIVER
MBA606 - 1
Fig.6 Acknowledgement on the I2C-bus.
1999 Jan 06
6
9
Philips Semiconductors
Product specification
256 × 8-bit static low-voltage RAM with
I2C-bus interface
8.5
PCF8570
I2C-bus protocol
Before any data is transmitted on the I2C-bus, the device which should respond is addressed first. The addressing is
always carried out with the first byte transmitted after the start procedure. The I2C-bus configuration for the different
PCF8570 WRITE and READ cycles is shown in Figs 7, 8 and 9.
acknowledgement
from slave
acknowledgement
from slave
handbook, full pagewidth
S
SLAVE ADDRESS
0 A
WORD ADDRESS
A
acknowledgement
from slave
DATA
R/W
A
P
n bytes
auto increment
memory word address
MBD822
Fig.7 Master transmits to slave receiver (WRITE) mode.
handbook, full pagewidth
S
acknowledgement
from slave
SLAVE ADDRESS
0 A
R/W
acknowledgement
from slave
WORD ADDRESS
A
acknowledgement
from slave
SLAVE ADDRESS
S
at this moment master transmitter becomes
master - receiver and
PCF8570 slave receiver becomes
slave - transmitter
1 A
R/W
acknowledgement
from master
DATA
A
n bytes
auto increment
memory word address
no acknowledgement
from master
DATA
1
P
last byte
MLB930
auto increment
memory word address
Fig.8 Master reads after setting word address (WRITE word address; READ data).
1999 Jan 06
7
Philips Semiconductors
Product specification
256 × 8-bit static low-voltage RAM with
I2C-bus interface
acknowledgement
from slave
acknowledgement
from slave
andbook, full pagewidth
S
SLAVE ADDRESS
1 A
R/W
PCF8570
A
DATA
n bytes
acknowledgement
from slave
DATA
1
P
last bytes
auto increment
word address
auto increment
word address
MBD824
Fig.9 Master reads slave immediately after first byte (READ mode).
9 LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
VDD
supply voltage (pin 8)
−0.8
+8.0
V
VI
input voltage (any input)
−0.8
VDD + 0.8
V
II
DC input current
−
±10
mA
IO
DC output current
−
±10
mA
IDD
positive supply current
−
±50
mA
ISS
negative supply current
−
±50
mA
Ptot
total power dissipation per package
−
300
mW
PO
power dissipation per output
−
50
mW
Tamb
operating ambient temperature
−40
+85
°C
Tstg
storage temperature
−65
+150
°C
10 HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take precautions appropriate to handling MOS devices. Advice can be found in Data Handbook IC12 under
“Handling MOS Devices”.
1999 Jan 06
8
Philips Semiconductors
Product specification
256 × 8-bit static low-voltage RAM with
I2C-bus interface
PCF8570
11 DC CHARACTERISTICS
VDD = 2.5 to 6.0 V; VSS = 0 V; Tamb = −40 to +85 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
VDD
supply voltage
IDD
supply current
VPOR
2.5
−
6.0
V
standby mode
VI = VDD or VSS;
fSCL = 0 Hz;
Tamb = −25 to +70 °C
−
−
5
µA
operating mode
VI = VDD or VSS;
fSCL = 100 Hz
−
−
200
µA
note 1
1.5
1.9
2.3
V
V
Power-on reset voltage
Inputs, input/output SDA
VIL
LOW level input voltage
note 2
−0.8
−
0.3VDD
VIH
HIGH level input voltage
note 2
0.7VDD
−
VDD + 0.8 V
IOL
LOW level output current
VOL = 0.4 V
3
−
−
mA
ILI
input leakage current
VI = VDD or VSS
−1
−
+1
µA
VI = VDD or VSS
−250
−
+250
nA
VI = VSS
−
−
7
pF
1
−
6
V
VDDR = 1 V
−
−
5
µA
VDDR = 1 V;
Tamb = −25 to +70 °C
−
−
2
µA
TEST = VDD; Tamb = 25 °C
−
50
400
nA
−
50
−
µs
Inputs A0, A1, A2 and TEST
ILI
input leakage current
Inputs SCL and SDA
Ci
input capacitance
Low VDD data retention
VDDR
supply voltage for data retention
IDDR
supply current
Power-saving mode (see Figs 13 and 14)
IDDR
supply current
tHD2
recovery time
Notes
1. The Power-on reset circuit resets the I2C-bus logic when VDD < VPOR. The status of the device after a Power-on reset
condition can be tested by sending the slave address and testing the acknowledge bit.
2. If the input voltages are a diode voltage above or below the supply voltage VDD or VSS an input current will flow; this
current must not exceed ±0.5 mA.
1999 Jan 06
9
Philips Semiconductors
Product specification
256 × 8-bit static low-voltage RAM with
I2C-bus interface
PCF8570
12 AC CHARACTERISTICS
All timing values are valid within the operating supply voltage and ambient temperature range and reference to VIL and
VIH with an input voltage swing of VSS to VDD.
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
I2C-bus timing (see Fig.10; note 1)
fSCL
SCL clock frequency
−
−
100
kHz
tSP
tolerable spike width on bus
−
−
100
ns
tBUF
bus free time
4.7
−
−
µs
tSU;STA
START condition set-up time
4.7
−
−
µs
tHD;STA
START condition hold time
4.0
−
−
µs
tLOW
SCL LOW time
4.7
−
−
µs
tHIGH
SCL HIGH time
4.0
−
−
µs
tr
SCL and SDA rise time
−
−
1.0
µs
tf
SCL and SDA fall time
−
−
0.3
µs
tSU;DAT
data set-up time
250
−
−
ns
tHD;DAT
data hold time
0
−
−
ns
tVD;DAT
SCL LOW-to-data out valid
−
−
3.4
µs
tSU;STO
STOP condition set-up time
4.0
−
−
µs
Note
1. A detailed description of the I2C-bus specification, with applications, is given in brochure “The I2C-bus and how to
use it”. This brochure may be ordered using the code 9398 393 40011.
handbook, full pagewidth
t SU;STA
BIT 6
(A6)
BIT 7
MSB
(A7)
START
CONDITION
(S)
PROTOCOL
t LOW
t HIGH
BIT 0
LSB
(R/W)
ACKNOWLEDGE
(A)
STOP
CONDITION
(P)
1 / f SCL
SCL
t
tr
BUF
t
f
SDA
t HD;STA
t SU;DAT
t
HD;DAT
t VD;DAT
MBD820
Fig.10 I2C-bus timing diagram; rise and fall times refer to VIL and VIH.
1999 Jan 06
10
t SU;STO
Philips Semiconductors
Product specification
256 × 8-bit static low-voltage RAM with
I2C-bus interface
PCF8570
13 APPLICATION INFORMATION
13.1
Application example
VDD
handbook, full pagewidth
SDA
MASTER
TRANSMITTER/
RECEIVER
SCL
VDD
0
0
0
SCL
A0
A1
PCF8570
'1010'
A2
V SS
TEST
SDA
VDD
VDD
1
0
0
A1
up to 8 PCF8570C
SCL
A0
PCF8570
'1010'
A2
V SS
TEST
SDA
V DD
VDD
1
VDD
1
VDD
1
SCL
A0
A1
PCF8570
V DD
'1010'
A2
TEST
V SS
SDA
R
SDA
R
R: pull up resistor
tr
R=
C BUS
SCL
(I 2 C bus)
It is recommended that a 4.7 µF/10 V solid aluminium capacitor (SAL) be connected between VDD and VSS.
Fig.11 Application diagram.
1999 Jan 06
11
MLB931
Philips Semiconductors
Product specification
256 × 8-bit static low-voltage RAM with
I2C-bus interface
13.2
PCF8570
Slave address
The PCF8570 has a fixed combination 1 0 1 0 as group 1, while group 2 is fully programmable (see Fig.12).
handbook, halfpage
1
0
1
0
A2
A1
A0 R/W
group 2
group 1
MLB892
Fig.12 Slave address.
13.3
Power-saving mode
With the condition TEST = VDD or VDDR the PCF8570 goes into the power-saving mode and I2C-bus logic is reset.
power saving
mode (1)
TEST = VDDR
handbook, full pagewidth
operating mode
power saving
mode (2)
TEST = VDD
VDD
TEST
SCL
SDA
,,
,,
,,
,,
t SU (3)
,,,
,,,
,,,
,,,
t HD1 (3)
VDDR
,,,
,,,
,,,
,,,
0V
VDD
VDDR
0V
t SU (3)
t HD2 (3)
VDD
VDDR
0V
VDD
VDD
VDDR
0V
I DD
I DD
MLB932
(1) Power-saving mode without 5 V supply voltage.
(2) Power-saving mode with 5 V supply voltage.
(3) tSU and tHD1 ≥ 4 µs and tHD2 ≥ 50 µs.
Fig.13 Timing for power-saving mode.
1999 Jan 06
12
I DDS
Philips Semiconductors
Product specification
256 × 8-bit static low-voltage RAM with
I2C-bus interface
handbook, full pagewidth
PCF8570
5V
VDD
SDA
SCL
MICROCONTROLLER
TEST
8
3
5
6
PCF8570
2
(1)
1
7
A2
A1
A0
4
VSS
MLB933
It is recommended that a 4.7 µF/10 V solid aluminium capacitor (SAL) be connected between VDD and VSS.
(1) In the operating mode TEST = 0 V; in the power-saving mode TEST = VDDR.
Fig.14 Application example for power-saving mode.
1999 Jan 06
13
VDDR
1.2 V
(NiCd)
Philips Semiconductors
Product specification
256 × 8-bit static low-voltage RAM with
I2C-bus interface
PCF8570
14 PACKAGE OUTLINES
DIP8: plastic dual in-line package; 8 leads (300 mil)
SOT97-1
ME
seating plane
D
A2
A
A1
L
c
Z
w M
b1
e
(e 1)
b
MH
b2
5
8
pin 1 index
E
1
4
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
min.
A2
max.
b
b1
b2
c
D (1)
E (1)
e
e1
L
ME
MH
w
Z (1)
max.
mm
4.2
0.51
3.2
1.73
1.14
0.53
0.38
1.07
0.89
0.36
0.23
9.8
9.2
6.48
6.20
2.54
7.62
3.60
3.05
8.25
7.80
10.0
8.3
0.254
1.15
inches
0.17
0.020
0.13
0.068
0.045
0.021
0.015
0.042
0.035
0.014
0.009
0.39
0.36
0.26
0.24
0.10
0.30
0.14
0.12
0.32
0.31
0.39
0.33
0.01
0.045
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT97-1
050G01
MO-001AN
1999 Jan 06
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
92-11-17
95-02-04
14
Philips Semiconductors
Product specification
256 × 8-bit static low-voltage RAM with
I2C-bus interface
PCF8570
SO8: plastic small outline package; 8 leads; body width 7.5 mm
SOT176-1
D
E
A
X
c
y
HE
v M A
Z
8
5
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
L
1
4
e
detail X
w M
bp
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
Z (1)
mm
2.65
0.3
0.1
2.45
2.25
0.25
0.49
0.36
0.32
0.23
7.65
7.45
7.6
7.4
1.27
10.65
10.00
1.45
1.1
0.45
1.1
1.0
0.25
0.25
0.1
2.0
1.8
0.012 0.096
0.004 0.089
0.01
0.019 0.013
0.014 0.009
0.30
0.29
0.30
0.29
0.050
0.419
0.057
0.394
0.043
0.018
0.043
0.039
0.01
0.01
0.004
0.079
0.071
inches
0.10
θ
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
95-02-25
97-05-22
SOT176-1
1999 Jan 06
EUROPEAN
PROJECTION
15
o
8
0o
Philips Semiconductors
Product specification
256 × 8-bit static low-voltage RAM with
I2C-bus interface
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
15 SOLDERING
15.1
Introduction
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
15.3.2
15.2.1
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
Through-hole mount packages
SOLDERING BY DIPPING OR BY SOLDER WAVE
• For packages with leads on two sides and a pitch (e):
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joints for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg(max)). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
15.2.2
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
MANUAL SOLDERING
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 °C it may remain in contact for up to
10 seconds. If the bit temperature is between
300 and 400 °C, contact may be up to 5 seconds.
15.3
15.3.1
WAVE SOLDERING
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mount components are mixed on
one printed-circuit board. However, wave soldering is not
always suitable for surface mount ICs, or for printed-circuit
boards with high population densities. In these situations
reflow soldering is often used.
15.2
PCF8570
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Surface mount packages
REFLOW SOLDERING
15.3.3
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
1999 Jan 06
MANUAL SOLDERING
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
16
Philips Semiconductors
Product specification
256 × 8-bit static low-voltage RAM with
I2C-bus interface
15.4
PCF8570
Suitability of IC packages for wave, reflow and dipping soldering methods
SOLDERING METHOD
MOUNTING
PACKAGE
WAVE
REFLOW(1)
DIPPING
Through-hole mount DBS, DIP, HDIP, SDIP, SIL
suitable(2)
−
suitable
Surface mount
not suitable
suitable
−
suitable
−
suitable
−
not
recommended(4)(5)
suitable
−
not
recommended(6)
suitable
−
BGA, SQFP
suitable(3)
HLQFP, HSQFP, HSOP, HTSSOP, SMS
not
PLCC(4), SO, SOJ
suitable
LQFP, QFP, TQFP
SSOP, TSSOP, VSO
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
6. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
1999 Jan 06
17
Philips Semiconductors
Product specification
256 × 8-bit static low-voltage RAM with
I2C-bus interface
PCF8570
16 DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
17 LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
18 PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
1999 Jan 06
18
Philips Semiconductors
Product specification
256 × 8-bit static low-voltage RAM with
I2C-bus interface
NOTES
1999 Jan 06
19
PCF8570
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Internet: http://www.semiconductors.philips.com
© Philips Electronics N.V. 1999
SCA61
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
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under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
415106/00/04/pp20
Date of release: 1999 Jan 06
Document order number:
9397 750 04971
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