APD-256G064-1 Datasheet

APD-256G064-1
Vishay Dale
Plasma Panel Display Module
256 x 64 Graphics Display with Drive Electronics,
TTL Level Data Interfacer and Integrated DC Converter
FEATURES
• TTL level video interface.
• On board DC converter.
• Slim Profile.
• Large, bright characters and graphics.
• Highly visible for long distance viewing.
The APD-256G064-1 has been designed to offer high
brightness and superior viewing aesthetics in a package that
is very affordable. This display is ideal for low to
medium level information content messages and would be
ideal for applications such as arcade games, process
control, POS terminals, medical equipment, message
centers and ATM machines.
STANDARD ELECTRICAL SPECIFICATIONS*
DESCRIPTION
Logic supply
SYMBOL
MIN.
TYP.
MAX.
UNITS
Vcc
+ 4.5
+ 5.0
+ 5.5
VDC
DC converter input
VDC
+ 10
+ 24.0
+ 28.0
VDC
DC converter
power @ + 12V
Amps
Screen Clear 50% Lit 100% Lit
0.100
1.7
3.5
—
Logic 1 Input
Vih
2.0
—
—
VDC
Logic 0 Input
Vil
—
—
0.8
VDC
*Recommended operating voltages. All maximums are absolute
maximum.
DIMENSIONS in inches [millimeters]
.150
[3.81]
Dia.
ELECTRICAL SPECIFICATIONS
Voltages Required: VDC: + 12 to + 24 VDC.
Vcc: + 5 VDC.
Power Required: Typical = 12 watts, Maximum = 45 watts.
OPTICAL SPECIFICATIONS
Viewing Area: 12.75" [323.85] W x 4.24" [107.70] H.
Pixel Pitch: 0.050" [1.27] H, 0.0666" [1.69] W.
Pixel Size: 0.025" x 0.040" [0.635 x 1.016].
Color: Neon orange.
Text with typical 5x7 character matrix using 1 column
between characters and 1 row between lines.
Maximum Number of Characters per Line: 42.
Maximum Number of Lines: 16.
Maximum Character Size: .225 W x .439 H.
Luminance: 50 foot lamberts minimum.
ENVIRONMENTAL SPECIFICATIONS
Operating Temperature: 0°C to + 70°C.
Storage Temperature: - 40°C to + 85°C.
Relative Operating Humidity: To 95% non-condensing.
Mechanical Shock: 30G.
Vibration: 3G.
Operating Altitude: 10,000 feet.
256 x 64 Pixels
GENERAL DESCRIPTION
14.50
[368.3]
.150
[3.81]
7.25 [184.15]
Column 1,
Row 1
5.686
[144.42]
5.986
4.236 [152.04]
[107.60]
5.136
[130.45]
3.001
[76.22]
12.775
[324.49]
.150
[3.81]
7.25
[184.15]
14.00
[355.60]
.487
[12.37]
.883
[22.43]
14.80
[375.92]
.062 [1.57]
PCB
Thickness
•••••••
•••••••
•••••
6.750 [171.45]
8.775 [222.89]
CL
7.40 [187.96]
10.50 [266.70]
.447 ± .020
[11.35 ± .508]
Pin 1
of P2
CL
CL
Pin 1 of J3
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The APD-256G064-1 DC Plasma display offers viewing
qualities designers seek such as high contrast, viewing
angle of 150° minimum, and long distance readability.
It is bright (50 foot lamberts minimum) with characters and
graphics figures presented in a pleasing neon orange color
against a black background. Plasma is much more readable and eye-pleasing than liquid crystal or vacuum fluorescent displays and is filterable to red, amber, or neutral
density.
These plasma display panels are driven in a standard row column refresh method much like a CRT display. The
designer need only supply TTL level signals for SERIAL
DATA, DOT CLOCK, COLUMN LATCH, ROW DATA, ROW
CLOCK and DISPLAY ENABLE. The SERIAL DATA is
entered with the DOT CLOCK up to frequencies as high as
8mHz. After a row of 256 pixels is clocked in, the COLUMN
LATCH signal is toggled and the data is latched. At the time
the data is latched, the display is briefly disabled using the
DISPLAY ENABLE signal, then the row pointer is advanced
with the ROW CLOCK signal. Once each frame the ROW
DATA must be asserted to synchronize the column serial
data with the beginning row. The recommended scanning
frequency is approximately 70 Hz but may be as high as
200 Hz. The high clock rate on the data clock allows for
rapid refresh and maximum access time to the refresh ram.
Document Number: 37020
Revision 05-Dec-00
APD-256G064-1
Vishay Dale
PIN DESCRIPTION
LOGIC AND DATA TIMING
P3, POWER CONNECTOR
AMP #640445-5 or equivalent.
(Mates with AMP 640428-5, MOLEX 09-05-3051 or equivalent.)
PIN
1
2
3
4
5
DESCRIPTION
Vbb
DC Converter Supply
Logic Supply
Used to key connector
Vbb and Vcc
SIGNAL
GND
VDC
Vcc
KEY
GND
t4
Row Data
t2
t1
t3
Row Clock
0
62
2
1
0
63
1
P2, DATA CONNECTOR
AMP #103309-2 or equivalent.
(Mates with AMP 746195-2, MOLEX 39-27-1146 or equivalent.)
PIN
1
3
5
7
9
11
13
DESCRIPTION
DISPLAY ENABLE
ROW DATA
ROW CLOCK
COLUMN LATCH
DOT CLOCK
SERIAL DATA
No connect
PIN
2
4
6
8
10
12
14
DESCRIPTION
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
0
1
2
62
0
63
1
Display Enable
Row Clock
DESCRIPTION OF INPUT SIGNALS
DOT CLOCK - This signal enters the SERIAL DATA on each
low to high transition. A total of 256 DOT CLOCK transitions
must be present for each line of column/anode data.
SERIAL DATA - This signal presents the pixel data in
positive logic format. A logic one represents a lit pixel and a
logic zero represents an extinguished pixel. Data is entered
from right to left. The first pixel data entered will represent
the leftmost pixel in the row.
COLUMN LATCH - This signal latches the pixel data into the
driver outputs. When the COLUMN LATCH signal goes to
logic one the data entered previously will fall through to the
driver outputs. When the signal returns to a logic zero, the
data is latched and the shift register is now ready to accept
the next row of data. Must be held low while entering new
SERIAL DATA.
DISPLAY ENABLE - This signal enables the output drivers.
Using a duty cycle control, this signal may also be used for
intensity control. The DISPLAY ENABLE must be at logic
zero before the COLUMN LATCH signal transitions. To
avoid display blurring, the ROW CLOCK signal should also
transition while DISPLAY ENABLE is a logic zero. It is
recommended that this signal remain low for 10µS min.
ROW DATA - This signal is the first line marker for the scan.
This input should be held high to correspond to the first row
of pixel data.
ROW CLOCK - This signal clocks ROW DATA on the falling
edge. The ROW CLOCK signal is repetitive and must be
present for proper scanning of the display module.
The APD-256G064-1 has a unique input protection circuit
that assures the column drivers stay blanked on power up.
The protection circuit unblanks the column drivers when the
ROW CLOCK signal begins (i.e. the display begins scanning).
Column Latch
Display Enable
1st Bit of Row Will Appear in Leftmost Column
Serial Data
0
1
2
254 255
t5
Dot Clock
t6
Positive Edge x 256
t7
PARAMETER
MINIMUM
TYPICAL
MAXIMUM
UNITS
t1
100
—
—
nS
t2
5
—
—
uS
t3
1
—
—
uS
t4
—
70
200
Hz
t5
25
—
—
nS
t6
75
—
—
nS
t7
75
—
—
nS
ORDERING INFORMATION
Display Module with Drivers, TTL Interface and On Board Converter............................................................... ................ APD-256G064-1
Data Connector Kit...................................................................................................................................................... ................ 280105-05
Power Connector Kit................................................................................................................................................... ................ 280108-13
Video Controller (+5V) Parallel and Serial Interface...................................................................................................... ................. PDS-500
Video Controller (+12V) Parallel and Serial Interface................................................................................................. ................ PDS-500-1
Document Number: 37020
Revision 05-Dec-00
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Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
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applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
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Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
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