Data Sheet

PTN36001
SuperSpeed USB 3.0 redriver
Rev. 1 — 18 April 2016
Product data sheet
1. General description
PTN36001 is a small, low power SuperSpeed USB 3.0 redriver IC that enhances signal
quality by performing receive equalization on the deteriorated input signal followed by
transmit de-emphasis maximizing system link performance for mobile applications. With
its superior differential signal conditioning and enhancement capability, the device delivers
significant flexibility and performance scaling for various systems with different PCB trace
and cable channel conditions.
PTN36001 is a dual-channel device that supports data signaling rate of 5 Gbit/s through
each channel. The data flow of one channel is facing the USB host, and another channel
is facing the USB peripheral or device. Each channel consists of a high-speed Transmit
(Tx) differential lane and a high-speed Receive (Rx) differential lane.
PTN36001 is powered from a 1.8 V supply and is available in a small X2QFN12 package
(1.25 mm  2.1 mm  0.35 mm) with 0.4 mm pitch.
2. Features and benefits




Supports USB 3.0 specification (SuperSpeed only)
Compliant to SuperSpeed USB 3.0 standard
Support of two channels
Two control pins to select optimized signal conditions
 Receive equalization on each channel to recover from InterSymbol Interference
(ISI) and high-frequency losses, with provision to choose equalization gain settings
per channel
 Transmit de-emphasis on each channel delivers pre-compensation suited to
channel conditions
 Output swing adjustment
 Integrated termination resistors provide impedance matching on both transmit and
receive sides
 Automatic receiver termination detection
 Low active power: 200 mW/111 mA (typical) for VDD = 1.8 V
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
 Power-saving states:
 5.4 mW/3 mA (typical) when in U2/U3 states
 3.6 mW/2 mA (typical) when no connection detected
 10.8 W/6 A (typical) when in Deep power-saving state
 Excellent differential and common return loss performance
 10 dB differential and 10 dB common-mode return loss for 10 MHz to 1250 MHz
 Flow-through pinout to ease PCB layout and minimize crosstalk effects
 Hot Plug capable
 Power supply: VDD = 1.8 V (typical)
 Compliant with JESD 78 Class II
 Very thin X2QFN12 package: 1.25 mm  2.1 mm  0.35 mm, 0.4 mm pitch
 ESD protection exceeds 7000 V HBM per JDS-001-2012 and 1000 V CDM per
JESD22-C101
 Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
 Operating temperature range: 0 C to 85 C
3. Applications





Laptops, tablets
Active cables
Notebook/netbook/nettop platforms
Docking stations and AIO platforms
USB 3.0 peripherals such as flat panel display, consumer/storage devices, printers or
USB 3.0 capable hubs/repeaters
4. System context diagrams
Figure 1 illustrates PTN36001 usage.
PTN36001
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
2 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
AOUT+
AIN-
AOUT-
CPU/CHIP SET/
USB HOST
CONTROLLER
PTN36001
Rx
BOUT-
BIN-
BOUT+
BIN+
USB cable
CONNECTOR
AIN+
USB
PERIPHERAL
CONNECTOR
Tx
CONNECTOR
MOTHERBOARD
USB
PERIPHERAL
MOTHERBOARD
Tx
CPU/CHIP SET/
USB HOST
CONTROLLER
DOCKING
STATION
AIN+
AOUT+
AIN-
AOUT-
CONNECTOR
Rx
PTN36001
BOUT-
BIN-
BOUT+
BIN+
USB cable
USB cable
CONNECTOR
COMPUTER
PLATFORM
WITH
USB 3.0 HOST
CONTROLLER
CONNECTOR
USB 3.0 PERIPHERAL/DEVICE
AIN+
AOUT+
AIN-
AOUT-
PTN36001
BOUT-
BIN-
BOUT+
BIN+
FUNCTION
WITH USB 3.0
DEVICE
CONTROLLER
aaa-015961
Fig 1.
PTN36001 context diagrams
PTN36001
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
3 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
5. Ordering information
Table 1.
Ordering information
Type number
PTN36001HX
Topside
marking
Package
Name
Description
Version
001
X2QFN12
plastic, super thin quad flat package; no leads; 12 terminals;
body 1.25  2.10  0.35 mm; 0.4 mm lead pitch
SOT1408-1
5.1 Ordering options
Table 2.
Ordering options
Type number
Orderable
part number
Package
Packing method
Minimum
order
quantity
PTN36001HX
PTN36001HXAZ
X2QFN12
REEL 7" Q1/T1
500
*STANDARD MARK SMALL
PQ DP
PTN36001HX
PTN36001HXZ
X2QFN12
REEL 7" Q1/T1
*STANDARD MARK DP
6000
Temperature
Tamb = 0 C to +85 C
Tamb = 0 C to +85 C
6. Block diagram
VDD = 1.8 V
PTN36001
line
driver
equalizer
AOUT+
AOUT−
AIN+
AIN−
channel A
RX
TERMINATION
DETECTION
line
driver
equalizer
channel B
BIN+
BIN−
BOUT+
BOUT−
RX
TERMINATION
DETECTION
DEVICE CONTROL AND MANAGEMENT
C1
Fig 2.
C2
aaa-015962
Block diagram of PTN36001
PTN36001
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
4 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
7. Pinning information
7.1 Pinning
12
C1
terminal 1
index area
AOUT+
1
11
AIN+
AOUT−
2
10
AIN−
VDD(1V8)
3
9
GND
PTN36001
4
8
BOUT+
BIN−
5
7
BOUT−
C2
6
BIN+
Transparent top view
aaa-015963
Fig 3.
Pin configuration for X2QFN12
7.2 Pin description
Table 3.
Pin description
Symbol
Pin
Type
Description
Configuration and control signals
C1
12
Ternary input
C1 controls traces on the left side (as shown in Figure 2)
of the redriver — AOUT/AOUT+ and BIN/BIN+.
C1 controls setting of AOUT+/AOUT output swing and
de-emphasis and BIN/BIN+ equalization.
C2
6
Ternary input
C2 controls traces on the right side (as shown in Figure 2)
of the redriver — BOUT/BOUT+ and AIN/AIN+.
C2 controls setting of BOUT+/BOUT output swing and
de-emphasis and AIN/AIN+ equalization.
High-speed differential signals
PTN36001
Product data sheet
AIN+
11
self-biasing
differential input
Differential signal from SuperSpeed USB 3.0 transmitter.
AIN+ makes a differential pair with AIN. The input to this
pin must be AC-coupled externally.
AIN
10
self-biasing
differential input
Differential signal from SuperSpeed USB 3.0 transmitter.
AIN makes a differential pair with AIN+. The input to this
pin must be AC-coupled externally.
AOUT+
1
Differential signal to SuperSpeed USB 3.0 receiver.
self-biasing
differential output AOUT+ makes a differential pair with AOUT. The output
of this pin must be AC-coupled externally.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
5 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
Table 3.
Pin description …continued
Symbol
Pin
Type
AOUT
2
self-biasing
Differential signal to SuperSpeed USB 3.0 receiver.
differential output AOUT makes a differential pair with AOUT+. The output
of this pin must be AC-coupled externally.
BIN+
4
self-biasing
differential input
Differential signal from SuperSpeed USB 3.0 transmitter.
BIN+ makes a differential pair with BIN. The input to this
pin must be AC-coupled externally.
BIN
5
self-biasing
differential input
Differential signal from SuperSpeed USB 3.0 transmitter.
BIN makes a differential pair with BIN+. The input to this
pin must be AC-coupled externally.
BOUT+
8
Differential signal to SuperSpeed USB 3.0 receiver.
self-biasing
differential output BOUT+ makes a differential pair with BOUT. The output
of this pin must be AC-coupled externally.
BOUT
7
Differential signal to SuperSpeed USB 3.0 receiver.
self-biasing
differential output BOUT makes a differential pair with BOUT+. The output
of this pin must be AC-coupled externally.
Description
Power supply
VDD(1V8)
3
power
1.8 V supply. A 0201 or 0402 size 0.1 F de-coupling
capacitor is highly recommended to be placed as close as
possible on this pin to GND.
power
Ground.
Ground connection
GND
PTN36001
Product data sheet
9
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
6 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
8. Functional description
Refer to Figure 2 “Block diagram of PTN36001”.
PTN36001 is a SuperSpeed USB 3.0 redriver meant to be used for signal integrity
enhancement on mobile platforms – laptops, tablets, notebooks, hub, A/V displays and
peripheral devices, for example. With its high fidelity differential signal conditioning
capability and wide configurability, this chip is flexible and versatile enough for use under
a variety of system environments. PTN36001 implements ternary control IO logic on C1
and C2 control pins to detect HIGH (connected to VDD), LOW (connected to GND) or left
unconnected condition (OPEN).
The following sections describe the individual block functions and capabilities of the
device in more detail.
8.1 C1 control pin
C1 controls signal traces on the left side (as shown in Figure 2) of the redriver. It controls
the transmit de-emphasis and output swing of AOUT/AOUT+ channel. It also controls
the receive equalization of BIN/BIN+ channel.
When C1 = HIGH, the left side of the redriver is optimized to drive long trace length of the
left Link.
When C1 = OPEN, the left side of the redriver is optimized to drive medium trace length of
the left Link.
When C1 = LOW, the left side of the redriver is optimized to drive short trace length of the
left Link.
C1
USB3.0 downlink example
C2
USB3.0 uplink example
AOUT
USB3.0
CONNECTOR
AIN
REDRIVER
BIN
BOUT
USB3.0
HOST
CONTROLLER
aaa-011990
Fig 4.
C1 controls traces on left side of the redriver
Table 4.
C1 pin controls long/medium/short traces
State
PTN36001
Product data sheet
Channel type
Pin C1 state
Channel B
Channel A
EQ[1]
DE[2]
OS[3]
9 dB
5 dB
1.1 V
HIGH
Long
HIGH
OPEN
Medium
OPEN
6 dB
3 dB
1.0 V
LOW
Short
LOW
3 dB
0 dB
0.9 V
[1]
EQ is the internal input receiver equalization gain at 2.5 GHz.
[2]
DE is the internal output signal de-emphasis gain.
[3]
OS is the internal transmit output differential voltage swing.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
7 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
8.2 C2 control pin
C2 controls signal traces on the right side with functionality similar to C1.
Table 5.
State
C2 pin controls long/medium/short traces
Channel type
Pin C2 state
Channel A
Channel B
EQ[1]
DE[2]
OS[3]
HIGH
Long
HIGH
9 dB
5 dB
1.1 V
OPEN
Medium
OPEN
6 dB
3 dB
1.0 V
LOW
Short
LOW
3 dB
0 dB
0.9 V
[1]
EQ is the internal input receiver equalization gain at 2.5 GHz.
[2]
DE is the internal output signal de-emphasis gain.
[3]
OS is the internal transmit output differential voltage swing.
8.3 Deep power-saving mode entry and exit using C1 and C2 pins
C1 and C2 pins can be controlled by GPIOs from the on-board processor. When C1 and
C2 pins are both pulled LOW, it will take up to 115 ms (tsHL)for internal logic to sample C1
and C2 pin states, and place the PTN36001 in Deep Power-saving mode. To exit from
Deep Power-saving mode, the processor GPIOs should pull up C1 and/or C2 pins to
HIGH, and PTN36001 will return back to normal active mode in 1 s. In order for C1/C2
settings to take effect 6 ms (tsLH) after PTN36001 returns back to Active mode, C1/C2
settings should be applied within the first 4 ms window. If settings are applied outside this
4 ms window, new C1 and C2 values will be latched and take effect every 115 ms (trcfg).
Refer to Figure 5 for Deep Power-saving entry and exit control timing.
After 1 µs (max), PTN36001 exits
Deep power-saving mode
C1/C2 settings can be
applied here. If the settings
[C1:C2]1 are applied within
this 4 ms window, it will take
effect 6 ms after returning
to Active mode
[C1:C2] = [00]
to enter Deep power-saving mode
[C1:C2] = [1x] or [x1] or [11]
to exit Deep power-saving mode
[C1:C2]2
[C1:C2]1
1 µs
115 ms max.
If C1/C2 settings are applied
after first 4 ms window,
new settings [C1:C2]2 will be
latched and take effect every
115 ms (max) afterward
4 ms
tstartup 6 ms
115 ms
C1
C2
state
Active
Deep power-saving
Transition to Active state if a cable is connected;
Power-saving state if a cable is disconnected
Termination detection done on
Channel A and Channel B outputs
Fig 5.
aaa-015965
Deep power-saving entry and exit control timing
PTN36001
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
8 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
8.4 C1 and C2 overall control table
Table 6.
C1
C1 and C2 control table
C2
EQ
DE
CE[1]
OS
Channel A
Channel B
Channel A
Channel B
Channel A
Channel B
HIGH
HIGH
9 dB
9 dB
5 dB
5 dB
1.1 V
1.1 V
1
HIGH
OPEN
6 dB
9 dB
5 dB
3 dB
1.1 V
1.0 V
1
HIGH
LOW
3 dB
9 dB
5 dB
0 dB
1.1 V
0.9 V
1
OPEN
HIGH
9 dB
6 dB
3 dB
5 dB
1.0 V
1.1 V
1
OPEN
OPEN
6 dB
6 dB
3 dB
3 dB
1.0 V
1.0 V
1
OPEN
LOW
3 dB
6 dB
3 dB
0 dB
1.0 V
0.9 V
1
LOW
HIGH
9 dB
3 dB
0 dB
5 dB
0.9 V
1.1 V
1
LOW
OPEN
6 dB
3 dB
0 dB
3 dB
0.9 V
1.0 V
1
LOW
LOW
[1]
Deep power-saving mode
0
CE is the internal chip enable signal.
8.5 Transmit de-emphasis
1 bit
1 to N bits
1 bit
1 to N bits
VTX_DIFF_DEp-p
VTX_CM_DC
VTX_DIFFp-p
002aag010
Fig 6.
PTN36001
Product data sheet
Output with 6 dB de-emphasis
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
9 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
8.6 Device states and power management
PTN36001 has implemented an advanced power management scheme that operates in
tune with USB 3.0 bus electrical condition. Although the device does not decode USB
power management commands (related to USB 3.0 U1/U2/U3 transitions) exchanged
between USB 3.0 host and peripheral/device, it relies on bus electrical conditions and
control pins/register settings to decide to be in one of the following states:
• Active state wherein device is fully operational, USB data is transported on
channels A and B. In this state, USB connection exists and the Receive Termination
indication remains active. But there is no need for Receive Termination detection.
• Power-saving state wherein the channels A and B are kept enabled. In this state,
squelching, detection and/or Receive termination detection circuitry are active. Based
on USB connection, there are two possibilities:
– No USB connection.
– When USB connection exists and when the link is in USB 3.0 U2/U3 mode.
• Deep power-saving state wherein both channels' TX and RX terminations are
placed in OPEN condition, and the device achieves the most power saving. To enter
deep power saving mode, an external GPIO controller can pull down C1 and C2 pins
to ground at any time. Please refer to Section 8.3 for Deep power-saving entry and
exit control timing information.
As an example of utilizing deep power saving mode to achieve maximum power
saving when USB3.0 interface is not active in a device such as a smart phone, the
system can use the following scheme as a design guideline to implement the deep
power saving mode.
PTN36001
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
10 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
PTN36001 Deep Power Saving Mode Implementation on a Device
• Supplies 1.8 V power to PTN36001’s VDD(1V8) pin
• Drive PTN36001’s C1/C2 pins low
• PTN36001 enters deep power saving state
N
Detect Vbus Input Voltage
from USB Connector
Y
• Drive PTN36001’s [C1,C2] pins with channel settings
other than [0,0] to exit from deep power saving state.
• Start device enumeration
USB3.0 feature
support required?
Y
Keep PTN36001 in active state by driving [C1,C2]
pins with channel settings other than [0,0]
N
Cable Unplugged (or USB3.0
interface stopped working)
Y
• Drive PTN36001’s [C1,C2] pins [0,0]
• PTN36001 enters deep power saving state.
aaa-016089
Fig 7.
PTN36001
Product data sheet
Flow chart
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
11 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
• Off state: When PTN36001 is not being powered (i.e., VDD1V8 = 0 V), special steps
should be done to prevent back-current issues on C1/C2 pins when these pins' states
are not low. C1/C2 pins can be controlled through two different ways.
a. pull-up/pull-down resistors - make sure these pull-up resistors' VDD is the same
power source as to power PTN36001. When power to PTN36001 is off, power to
these pull-up resistors will be off as well.
b. external processor's GPIO - if PTN36001 is turned off when the external
processor's power stays on, processor should configure these GPIOs connected to
C1/C2 pins as output low (< 0.4 V) or tri-state mode (configure GPIOs as input
mode). This will make sure no current will be flowing into PTN36001 through
C1/C2 pins.
The Receive termination detection circuitry is implemented as part of a transmitter and
detects whether a load device with equivalent DC impedance ZRX_DC is present.
PTN36001
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
12 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
9. Limiting values
Table 7.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
supply voltage (1.8 V)
[1]
VI
input voltage
[1]
Tstg
storage temperature
VESD
electrostatic discharge voltage
VDD(1V8)
Min
Max
Unit
0.3
+2.5
V
0.3
VDD(1V8) + 0.5
V
65
+150
C
HBM
[2]
-
7000
V
CDM
[3]
-
1000
V
[1]
All voltage values (except differential voltages) are with respect to network ground terminal.
[2]
Human Body Model: ANSI/ESDA/JEDEC JDS-001-2012 (Revision of ANSI/ESDA/JEDEC JS-001-2011), ESDA/JEDEC Joint standard
for ESD sensitivity testing, Human Body Model - Component level; Electrostatic Discharge Association, Rome, NY, USA; JEDEC Solid
State Technology Association, Arlington, VA, USA.
[3]
Charged Device Model; JESD22-C101E December 2009 (Revision of JESD22-C101D, October 2008), standard for ESD sensitivity
testing, Charged Device Model - Component level; JEDEC Solid State Technology Association, Arlington, VA, USA.
10. Recommended operating conditions
Table 8.
Operating conditions
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDD(1V8)
supply voltage (1.8 V)
1.8 V supply option
1.7
1.8
1.9
V
VI
input voltage
control and configuration pins
(C1, C2)
0.3
VDD(1V8)
VDD(1V8) + 0.3
V
Tamb
ambient temperature
operating in free air
0
-
+85
C
PTN36001
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
13 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
11. Characteristics
11.1 Device characteristics
Table 9.
Device characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tstartup
start-up time
between supply voltage within operating range
(90 % of VDD) until automatic receiver
termination detection
-
-
6
ms
ts(LH)
LOW to HIGH
settling time
disable to enable; enable time from ‘Deep
power-saving mode’ (C1 = C2 = LOW) to active
modes change; device is supplied with valid
supply voltage
-
-
6
ms
ts(HL)
HIGH to LOW
settling time
enable to disable; disable time from active
modes to ‘Deep power-saving mode’
(C1 = C2 = LOW) change until Deep
power-saving mode; 
device is supplied with valid supply voltage
-
-
115
ms
trcfg
reconfiguration time
any configuration pin change (from one setting
to another setting) to specified operating
characteristics; 
device is supplied with valid supply voltage
-
-
115
ms
tPD(dif)
differential propagation
delay
between 50 % level at input and output;
see Figure 8
-
-
0.5
ns
tidle
idle time
default wait time to wait before getting into
Power-saving state
-
300
400
ms
time for exiting from Power-saving state and get
into Active state; see Figure 10
-
-
115
s
td(pwrsave-act) delay time from
power-save to active
td(act-idle)
delay time from active
to idle
reaction time for squelch detection circuit;
see Figure 9
-
9
14
ns
td(idle-act)
delay time from idle
to active
reaction time for squelch detection circuit;
see Figure 9
-
5
11
ns
Rth(j-a)
thermal resistance from
junction to ambient
JEDEC still air test environment; 
value is based on simulation under JEDEC still
air test environment with 2S2P(4L) JEDEC PCB
-
92
-
C/W
jt
junction to top of case
thermal characterization
parameter
to case top; 
at ambient temperature of 85 C; value is based
on simulation under JEDEC still air test
environment with 2S2P(4L) JEDEC PCB
-
0.5
-
C/W
IDD
supply current
Active state; C1 = C2 = OPEN; 
Rx equalization gain = 6 dB; 
Tx output signal swing = 1000 mV (differential
peak-to-peak value); Tx de-emphasis = 3.1 dB
-
111
-
mA
U2/U3 Power-saving state
-
3
-
mA
no USB connection state
-
2
-
mA
Deep power-saving state; C1 = C2 = LOW
-
6
-
A
PTN36001
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
14 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
IN+
in
VSQTH
VDC_CM
IN−
tPD(dif)
tPD(dif)
td(idle-act)
td(act-idle)
OUT+
out
VDC_CM
OUT−
002aag025
Fig 8.
Propagation delay
channel A, RX
Fig 9.
LFPS electrical idle transitions in U0/U1 modes
U2 exit LFPS
U2 exit LFPS
channel A, TX
channel B, RX
U2 exit handshake LFPS
U2 exit handshake LFPS
channel B, TX
002aag026
RECOVERY
RECOVERY
RECOVERY
RECOVERY
block active
td(pwrsave-act)
002aag028
Fig 10. U2/U3 exit behavior
PTN36001
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
15 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
11.2 Receiver AC/DC characteristics
Table 10.
Receiver AC/DC characteristics
Symbol
Parameter
ZRX_DC
receiver DC common-mode impedance
ZRX_DIFF_DC
DC differential impedance
ZRX_HIGH_IMP
common-mode input impedance
VRX(diff)(p-p)
VRX_DC_CM
VRX_CM_AC_P
RX AC common-mode voltage
Vth(i)
RLDD11,RX
RLCC11,RX
PTN36001
Product data sheet
Conditions
Min
Typ
Max
Unit
18
-
30

RX pair
72
-
120

DC common-mode
input impedance when
output of redriver is not
terminated
25
-
-
k
peak-to-peak differential receiver voltage
100
-
1200
mV
RX DC common mode voltage
-
1.8
-
V
peak
-
-
150
mV
input threshold voltage
differential
peak-to-peak value
75
-
150
mV
RX differential mode return loss
10 MHz to 1250 MHz
-
10
-
dB
1250 MHz to 2500 MHz
-
8
-
dB
2500 MHz to 3000 MHz
-
7
-
dB
RX common mode return loss
10 MHz to 1250 MHz
-
10
-
dB
1250 MHz to 2500 MHz
-
7
-
dB
2500 MHz to 3000 MHz
-
6
-
dB
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
16 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
11.3 Transmitter AC/DC characteristics
Table 11.
Transmitter AC/DC characteristics
Symbol
Parameter
Conditions
ZTX_DC
transmitter DC common-mode
impedance
ZTX_DIFF_DC
DC differential impedance
VTX_DIFFp-p
differential peak-to-peak
output voltage
Min
Typ
Max
Unit
18
-
30

72
-
120

OS = short channel
800
900
1000
mV
OS = medium channel
900
1000
1100
mV
mV
RL = 100 
OS = long channel
1000
1100
1200
-
1.3
VDD(1V8) V
device input fed with
differential signal
-
-
100
mV
when link is in electrical idle
-
-
10
mV
160
175
200
ps
positive voltage swing to
sense the receiver
termination detection
-
-
600
mV
TX receiver termination detect
charging resistance
output resistor of the
transmitter when it does
RX detection
-
3.1
-
k
tr(tx)
transmit rise time
measured using 20 % and
80 % levels; see Figure 11
40
55
75
ps
tf(tx)
transmit fall time
measured using 80 % and
20 % levels; see Figure 11
40
55
75
ps
t(r-f)tx
difference between transmit
rise and fall time
measured using 20 % and
80 % levels
-
-
20
ps
RLDD11,TX
TX differential mode return loss
10 MHz to 1250 MHz
-
10
-
dB
1250 MHz to 2500 MHz
-
7
-
dB
VTX_DC_CM
transmitter DC common-mode
voltage
VTX_CM_ACpp_ACTIV
TX AC common-mode
peak-to-peak output voltage
(active state)
VTX_IDL_DIFF_ACpp
electrical idle differential
peak-to-peak output voltage
tW(deemp)TX
transmitter de-emphasis
pulse width
VTX_RCV_DETECT
voltage change allowed during
receiver detection
RTX_RCV_DETECT
RLCC11,TX
TX common mode return loss
2500 MHz to 3000 MHz
-
6
-
dB
10 MHz to 1250 MHz
-
10
-
dB
1250 MHz to 2500 MHz
-
7
-
dB
2500 MHz to 3000 MHz
-
6
-
dB
80 %
20 %
tr(tx)
tf(tx)
002aag027
Fig 11. Output rise and fall times
PTN36001
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
17 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
11.4 Jitter performance
Table 12 provides jitter performance of PTN36001 under a specific set of conditions that is
illustrated by Figure 8.
Table 12. Jitter performance characteristics
Unit Interval (UI) = 200 ps.
Symbol
Parameter
Conditions
tjit(o)(p-p)
peak-to-peak output jitter time
total jitter at test point C
tjit(dtrm)(p-p)
tjit(rndm)(p-p)
Min
Typ
Max
Unit
[1]
-
0.19
-
UI
[1]
-
0.11
-
UI
[1][2]
-
0.08
-
UI
peak-to-peak deterministic jitter time
peak-to-peak random jitter time
[1]
Measured at test point C with K28.5 pattern, VID = 1000 mV (peak-to-peak), 5 Gbit/s; 3.1 dB de-emphasis from source.
[2]
Random jitter calculated as 14.069 times the RMS random jitter for 1012 bit error rate.
less than 76.2 cm (30-inch) FR4 trace
AWG
SIGNAL
SOURCE
test point A
test point C
test point B
PTN36001
SMA
connector
SMA
connector
aaa-016090
Source jitter measurements:
total jitter = 21 ps
deterministic jitter = 8 ps
random jitter (RMS value) = 0.95 ps
Fig 12. Jitter measurement setup
11.5 Ternary control inputs C1 and C2
Table 13.
Ternary control inputs for C1 and C2 pins
Symbol
Parameter
Min
Typ
Max
Unit
VIH
HIGH-level input voltage Trigger level of the Schmitt Trigger
buffer when input is going from
LOW to HIGH
0.70  VDD
VDD
VDD + 0.3
V
VIL
LOW-level input voltage
Trigger level of the Schmitt Trigger
buffer when input is going from
HIGH to LOW
0.3
0
0.30  VDD
V
Rpu(ext)
external pull-up resistor
connected between VDD1V8 and
setting pin; for detection of HIGH
condition
0
-
30
k
Rpd(ext)
external pull-down
resistor
connected between setting pin and
GND; for detection of LOW
condition
0
-
30
k
for detection of OPEN condition
250
-
-
k
setting pin is driven LOW by
external GPIO
45
-
-
A
Zext(OPEN) external impedance
IIL
LOW-level input current
PTN36001
Product data sheet
Conditions
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
18 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
Table 13.
Ternary control inputs for C1 and C2 pins …continued
Symbol
Parameter
IIH
HIGH-level input current setting pin is driven HIGH (to 1.8 V)
by external GPIO
Conditions
ILext(OPEN) external leakage current of external GPIO; for reliable
detection of OPEN condition
Min
Typ
Max
Unit
-
-
+45
A
6
-
+6
A
CL(ext)
external load
capacitance
on setting pin; for reliable detection
of OPEN condition
-
-
150
pF
Rpu(int)
internal pull-up
resistance
for detection of Ternary setting
-
50
-
k
Rpd(int)
internal pull-down
resistance
for detection of Ternary setting
-
50
-
k
PTN36001
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
19 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
12. Package outline
X2QFN12: plastic, super thin quad flat package; no leads; 12 terminals; body 2.10 x 1.25 x 0.35 mm
D
B
SOT1408-1
A
A
terminal 1
index area
C
E
A1
detail X
C
v
w
b (12x)
C A B
C
6
y1 C
y
7
5
e
L
(12x)
e1
11
1
terminal 1
index area
12
X
0
2 mm
scale
Dimensions (mm are the original dimensions)
Unit
mm
A
A1
b
C
D
E
max 0.40 0.05 0.25
1.30 2.15
nom 0.35 0.02 0.20 0.10 1.25 2.10
1.20 2.05
min 0.30 0.00 0.15
e
e1
0.4
1.6
L
v
w
y
0.35
0.30 0.07 0.05 0.08
0.25
y1
0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
Outline
version
SOT1408-1
References
IEC
JEDEC
JEITA
sot1408-1_po
European
projection
Issue date
15-01-15
15-01-19
MO-255
Fig 13. Package outline SOT1408-1 (X2QFN12)
PTN36001
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
20 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
13. Packing information
13.1 SOT1408-1 (X2QFN12); Reel dry pack, SMD, 7"; Q1/T1 standard
product orientation; Orderable part number ending ,515 or Z;
Ordering code (12NC) ending 515
13.1.1 Packing method
%DUFRGHODEHO
'U\DJHQW
%DJ
(6'SULQW
5HODWLYHKXPLGLW\
LQGLFDWRU
0RLVWXUHFDXWLRQ
SULQW
(6'HPERVVHG
7DSH
5HHODVVHPEO\
%DUFRGHODEHO
*XDUGEDQG
3ULQWHGSODQRER[
&LUFXODUVSURFNHWKROHVRSSRVLWHWKH
ODEHOVLGHRIUHHO
&RYHUWDSH
4$VHDO
&DUULHUWDSH
6SDFHIRUDGGLWLRQDO
ODEHO
3UHSULQWHG(6'
ZDUQLQJ
%DUFRGHODEHO
'U\SDFN,'VWLFNHU
3ULQWHGSODQRER[
DDD
Fig 14. Reel dry pack for SMD
PTN36001
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
21 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
Table 14.
Dimensions and quantities
Reel dimensions
d  w (mm) [1]
SPQ/PQ
(pcs) [2]
Reels
per box
Outer box dimensions
l  w  h (mm)
180  8
6 000
1
209  206  34
[1]
d = reel diameter; w = tape width.
[2]
Packing quantity dependent on specific product type.
View ordering and availability details at NXP order portal, or contact your local NXP representative.
13.1.2 Product orientation
47 47
SLQ
47 47
DDD
DDD
Tape pocket quadrants
Pin 1 is in quadrant Q1/T1
Fig 15. Product orientation in carrier tape
13.1.3 Carrier tape dimensions
4 mm
W
K0
A0
B0
P1
T
direction of feed
001aao148
Not drawn to scale.
Fig 16. Carrier tape dimensions
Table 15. Carrier tape dimensions
In accordance with IEC 60286-3.
PTN36001
Product data sheet
A0 (mm)
B0 (mm)
K0 (mm)
T (mm)
P1 (mm)
W (mm)
1.55  0.1
2.40  0.1
0.5  0.05
0.25  0.05
4.0  0.1
8.0  0.3
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
22 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
13.1.4 Reel dimensions
A
Z
W2
B
ØC
ØD
detail Z
001aao149
Fig 17. Schematic view of reel
Table 16. Reel dimensions
In accordance with IEC 60286-3.
PTN36001
Product data sheet
A [nom]
(mm)
W2 [max]
(mm)
B [min]
(mm)
C [min]
(mm)
D [min]
(mm)
180
14.4
1.5
12.8
20.2
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
23 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
13.1.5 Barcode label
Fixed text
Country of origin
i.e. "Made in....." or
"Diffused in EU [+]
Assembled in......
Packing unit (PQ) identification
2nd traceability lot number*
2nd (youngest) date code*
2nd Quantity*
Traceability lot number
Date code
With linear barcode
Quantity
With linear barcode
Type number
NXP 12NC
With linear barcode
NXP SEMICONDUCTORS
MADE IN >COUNTRY<
[PRODUCT INFO]
(Q) QTY
Optional product information*
Re-approval date code*
Origin code
Product Manufacturing Code
MSL at the Peak Body solder
temperature with tin/lead*
MSL at the higher lead-free
Peak Body Temperature*
2D matrix with all data
(including the data identifiers)
HALOGEN FREE
(30P) TYPE
RoHS compliant
(1P) CODENO
Additional info if halogen
free product
Additional info on RoHS
(33T) PUID: B.0987654321
(30T) LOT2
(31D) REDATE
(30D) DATE2 (32T) ORIG
(30Q) QTY2
(31T) PMC
(31P) MSL/PBT
(1T) LOT
MSL/PBT
(9D) DATE
Lead-free symbol
001aak714
Fig 18. Example of typical box and reel information barcode label
Table 17.
PTN36001
Product data sheet
Barcode label dimensions
Box barcode label
l  w (mm)
Reel barcode label
l  w (mm)
100  75
100  75
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
24 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
13.2 SOT1408-1 (X2QFN12); Reel dry pack, SMD, 7"; Q1/T1 standard
product orientation; Orderable part number ending ,531 or Z;
Ordering code (12NC) ending 531
13.2.1 Packing method
%DUFRGHODEHO
'U\DJHQW
%DJ
(6'SULQW
5HODWLYHKXPLGLW\
LQGLFDWRU
0RLVWXUHFDXWLRQ
SULQW
(6'HPERVVHG
7DSH
5HHODVVHPEO\
%DUFRGHODEHO
*XDUGEDQG
3ULQWHGSODQRER[
&LUFXODUVSURFNHWKROHVRSSRVLWHWKH
ODEHOVLGHRIUHHO
&RYHUWDSH
4$VHDO
&DUULHUWDSH
6SDFHIRUDGGLWLRQDO
ODEHO
3UHSULQWHG(6'
ZDUQLQJ
%DUFRGHODEHO
'U\SDFN,'VWLFNHU
3ULQWHGSODQRER[
DDD
Fig 19. Reel dry pack for SMD
PTN36001
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
25 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
Table 18.
Dimensions and quantities
Reel dimensions
d  w (mm) [1]
SPQ/PQ
(pcs) [2]
Reels
per box
Outer box dimensions
l  w  h (mm)
180  8
500
1
209  206  34
[1]
d = reel diameter; w = tape width.
[2]
Packing quantity dependent on specific product type.
View ordering and availability details at NXP order portal, or contact your local NXP representative.
13.2.2 Product orientation
47 47
SLQ
47 47
DDD
DDD
Tape pocket quadrants
Pin 1 is in quadrant Q1/T1
Fig 20. Product orientation in carrier tape
13.2.3 Carrier tape dimensions
4 mm
W
K0
A0
B0
P1
T
direction of feed
001aao148
Not drawn to scale.
Fig 21. Carrier tape dimensions
Table 19. Carrier tape dimensions
In accordance with IEC 60286-3.
PTN36001
Product data sheet
A0 (mm)
B0 (mm)
K0 (mm)
T (mm)
P1 (mm)
W (mm)
1.55  0.1
2.40  0.1
0.5  0.05
0.25  0.05
4.0  0.1
8.0  0.3
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
26 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
13.2.4 Reel dimensions
A
Z
W2
B
ØC
ØD
detail Z
001aao149
Fig 22. Schematic view of reel
Table 20. Reel dimensions
In accordance with IEC 60286-3.
PTN36001
Product data sheet
A [nom]
(mm)
W2 [max]
(mm)
B [min]
(mm)
C [min]
(mm)
D [min]
(mm)
180
14.4
1.5
12.8
20.2
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
27 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
13.2.5 Barcode label
Fixed text
Country of origin
i.e. "Made in....." or
"Diffused in EU [+]
Assembled in......
Packing unit (PQ) identification
2nd traceability lot number*
2nd (youngest) date code*
2nd Quantity*
Traceability lot number
Date code
With linear barcode
Quantity
With linear barcode
Type number
NXP 12NC
With linear barcode
NXP SEMICONDUCTORS
MADE IN >COUNTRY<
[PRODUCT INFO]
(Q) QTY
Optional product information*
Re-approval date code*
Origin code
Product Manufacturing Code
MSL at the Peak Body solder
temperature with tin/lead*
MSL at the higher lead-free
Peak Body Temperature*
2D matrix with all data
(including the data identifiers)
HALOGEN FREE
(30P) TYPE
RoHS compliant
(1P) CODENO
Additional info if halogen
free product
Additional info on RoHS
(33T) PUID: B.0987654321
(30T) LOT2
(31D) REDATE
(30D) DATE2 (32T) ORIG
(30Q) QTY2
(31T) PMC
(31P) MSL/PBT
(1T) LOT
MSL/PBT
(9D) DATE
Lead-free symbol
001aak714
Fig 23. Example of typical box and reel information barcode label
Table 21.
PTN36001
Product data sheet
Barcode label dimensions
Box barcode label
l  w (mm)
Reel barcode label
l  w (mm)
100  75
100  75
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
28 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
14. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.
14.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
14.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
•
•
•
•
•
•
Board specifications, including the board finish, solder masks and vias
Package footprints, including solder thieves and orientation
The moisture sensitivity level of the packages
Package placement
Inspection and repair
Lead-free soldering versus SnPb soldering
14.3 Wave soldering
Key characteristics in wave soldering are:
• Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
• Solder bath specifications, including temperature and impurities
PTN36001
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
29 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
14.4 Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 24) than a SnPb process, thus
reducing the process window
• Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 22 and 23
Table 22.
SnPb eutectic process (from J-STD-020D)
Package thickness (mm)
Package reflow temperature (C)
Volume (mm3)
< 350
 350
< 2.5
235
220
 2.5
220
220
Table 23.
Lead-free process (from J-STD-020D)
Package thickness (mm)
Package reflow temperature (C)
Volume (mm3)
< 350
350 to 2 000
> 2 000
< 1.6
260
260
260
1.6 to 2.5
260
250
245
> 2.5
250
245
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 24.
PTN36001
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
30 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
maximum peak temperature
= MSL limit, damage level
temperature
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 24. Temperature profiles for large and small components
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
15. Abbreviations
Table 24.
PTN36001
Product data sheet
Abbreviations
Acronym
Description
A/V
Audio/Video device
AIO
All In One computer platform
CDM
Charged-Device Model
CMOS
Complementary Metal-Oxide Semiconductor
ESD
ElectroStatic Discharge
HBM
Human Body Model
I2C-bus
Inter-Integrated Circuit bus
I/O
Input/Output
IC
Integrated Circuit
ISI
InterSymbol Interference
LFPS
Low Frequency Periodic Signaling
PCB
Printed-Circuit Board
RX
Receive (or Receiver)
SI
Signal Integrity
TX
Transmit (or Transmitter)
USB
Universal Serial Bus
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
31 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
16. Revision history
Table 25.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PTN36001 v.1
20160418
Product data sheet
-
-
PTN36001
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
32 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
17. Legal information
17.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
17.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
17.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
PTN36001
Product data sheet
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
33 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
17.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
18. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
PTN36001
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
34 of 35
PTN36001
NXP Semiconductors
SuperSpeed USB 3.0 redriver
19. Contents
1
2
3
4
5
5.1
6
7
7.1
7.2
8
8.1
8.2
8.3
8.4
8.5
8.6
9
10
11
11.1
11.2
11.3
11.4
11.5
12
13
13.1
13.1.1
13.1.2
13.1.3
13.1.4
13.1.5
13.2
13.2.1
13.2.2
13.2.3
13.2.4
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
System context diagrams . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 4
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 4
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pinning information . . . . . . . . . . . . . . . . . . . . . . 5
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
Functional description . . . . . . . . . . . . . . . . . . . 7
C1 control pin . . . . . . . . . . . . . . . . . . . . . . . . . . 7
C2 control pin . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Deep power-saving mode entry and exit using C1
and C2 pins . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
C1 and C2 overall control table . . . . . . . . . . . . 9
Transmit de-emphasis . . . . . . . . . . . . . . . . . . . 9
Device states and power management . . . . . 10
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 13
Recommended operating conditions. . . . . . . 13
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 14
Device characteristics. . . . . . . . . . . . . . . . . . . 14
Receiver AC/DC characteristics . . . . . . . . . . . 16
Transmitter AC/DC characteristics . . . . . . . . . 17
Jitter performance. . . . . . . . . . . . . . . . . . . . . . 18
Ternary control inputs C1 and C2 . . . . . . . . . . 18
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 20
Packing information . . . . . . . . . . . . . . . . . . . . 21
SOT1408-1 (X2QFN12); Reel dry pack, SMD, 7";
Q1/T1 standard product orientation; Orderable
part number ending ,515 or Z; Ordering code
(12NC) ending 515 . . . . . . . . . . . . . . . . . . . . . 21
Packing method . . . . . . . . . . . . . . . . . . . . . . . 21
Product orientation . . . . . . . . . . . . . . . . . . . . . 22
Carrier tape dimensions . . . . . . . . . . . . . . . . . 22
Reel dimensions . . . . . . . . . . . . . . . . . . . . . . . 23
Barcode label . . . . . . . . . . . . . . . . . . . . . . . . . 24
SOT1408-1 (X2QFN12); Reel dry pack, 
SMD, 7"; Q1/T1 standard product orientation;
Orderable part number ending ,531 or Z; Ordering
code (12NC) ending 531 . . . . . . . . . . . . . . . . 25
Packing method . . . . . . . . . . . . . . . . . . . . . . . 25
Product orientation . . . . . . . . . . . . . . . . . . . . . 26
Carrier tape dimensions . . . . . . . . . . . . . . . . . 26
Reel dimensions . . . . . . . . . . . . . . . . . . . . . . . 27
13.2.5
14
14.1
14.2
14.3
14.4
15
16
17
17.1
17.2
17.3
17.4
18
19
Barcode label . . . . . . . . . . . . . . . . . . . . . . . . .
Soldering of SMD packages . . . . . . . . . . . . . .
Introduction to soldering. . . . . . . . . . . . . . . . .
Wave and reflow soldering. . . . . . . . . . . . . . .
Wave soldering . . . . . . . . . . . . . . . . . . . . . . .
Reflow soldering . . . . . . . . . . . . . . . . . . . . . .
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . .
Revision history . . . . . . . . . . . . . . . . . . . . . . .
Legal information . . . . . . . . . . . . . . . . . . . . . .
Data sheet status . . . . . . . . . . . . . . . . . . . . . .
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . .
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . .
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . .
Contact information . . . . . . . . . . . . . . . . . . . .
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
28
29
29
29
29
30
31
32
33
33
33
33
34
34
35
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP Semiconductors N.V. 2016.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 18 April 2016
Document identifier: PTN36001
Similar pages