ST Serial EEPROM WLCSP* portfolio February 2016 *WLCSP : Wafer Level Chip Scale Package Full WLCSP portfolio Density (Kbit) 1-7mm² 2024 256 0.7mm² Hardware write protect 128 0.5mm² 64 32 Software write protect Industry standard footprint 16 8 Compatible 4 balls I2C SWP 4 balls I2C Features HWP 5&8 balls I2C & SPI 2 4 balls WLCSP portfolio Check our device select code options to hook 2 EEPROMs or more on a same I2C bus Density (Kbit) 0.7mm² 128 0.5mm² 64 Industry standard footprint 32 16 8 Use our software write protect command to lock your settings • • • pin assignment pitch die orientation Software write protect • • lock settings by software Same pinout from 32 up to 128-Kbit + 2 options for Device select code + 2 options for Device select code Compatible 4 balls SWP 4 balls Features 3 Software Write Protect feature • Designer’s requirements • Lock partially or completely the memory array, even if device has no hardware write protect pin (4 balls design) • ST’s solution • ST developed a software write protect feature which allows customer to protect the whole/defined blocks of the EEPROM by software, against undesirable write instruction • Software write protect requires no design change, only software update • Flexible configuration of protected area Whole memory (b2,b1=1,1) • the whole memory array • the upper 3/4 memory array Upper ¾ (b2,b1=1,0) • the upper half memory array Upper Half (b2,b1=0,1) • the upper quarter memory array Upper ¼ (b2,b1=0,0) Protect Register 4 Device select code option • Designer’s requirements • Hook several EEPROM on the same I2C bus, even if device has no chip select pin (4 balls design) • ST’s solution • ST designed chips with different “device select code” to identify 2 EEPROMs or more on the same bus: • • • 1010 001x 1010 000x 1010 100x • Example : SDA SCL I²C Bus Master M24C32-F M24C32M-FCU M24C32S-FCU 1010 000x 1010 100x 1010 001x Vcc Vss 5 Compatibility Matrix of 4-Ball EEPROM Use different options to hook on the same I2C bus 2 EEPROMs or more (4 balls) Density 8-Kbit RPN 8-Kbit* 32-Kbit 64-Kbit M24C08-F 32-Kbit M24C32-F M24C08-F Y M24C32-F Y M24C32MFCU Y M24C32SFCU Y Y M24C32SFCU M24C32TFCU M24C64-F M24C64MFCU 128-Kbit M24C64SFCU M24C64TFCU M24128SFCU M24128TFCU Y Y Y Y Y Y Y Y Y Device select code 1010 0zzx Y Y Y Y Y Y Y 1010 000x Y 1010 100x Y 1010 001x M24C32TFCU Y Y Y Y Y 1010 000x M24C64-F Y Y Y Y Y 1010 000x M24C64MFCU M24C64SFCU Y Y Y M24C64TFCU 128-Kbit M24C32MFCU 64-Kbit M24128SFCU M24128TFCU Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y 1010 100x Y 1010 001x Y Y Y Y 1010 000x Y Y 1010 001x 1010 000x Notes: - M24C16-DFCU6TP can’t share the same I²C bus with other EEPROM. - *8-Kbit needs only 1 address byte 6 Portfolio with 4 balls WLCSP serie Part number Memory density Software Profile Dimension Write (max) (max X/Y) (mm) Protect (mm) Ball size (typ) (mm) Pinout compatibility Min Pitch Back side Device select (mm) coating code I2C bus SWP 4 balls M24C32S-FCU6T/T 32-Kbit Yes 0.853 0.853 0.300 0.185 M24C64S 0.4 x 0.5 No 1010 001x M24C32S-FCU6T/TF 32-Kbit Yes 0.853 0.853 0.330 0.185 M24C64S 0.4 x 0.5 Yes 1010 001x M24C64S-FCU6T/T 64-Kbit Yes 0.853 0.853 0.300 0.185 M24128S 0.4 x 0.5 No 1010 001x M24C64S-FCU6T/TF 64-Kbit Yes 0.853 0.853 0.330 0.185 M24128S 0.4 x 0.5 Yes 1010 001x M24128S-FCU6T/T 128-Kbit Yes 0.853 0.853 0.300 0.185 M24C64S 0.4 x 0.5 No 1010 001x M24128S-FCU6T/TF 128-Kbit Yes 0.853 0.853 0.330 0.185 M24C64S 0.4 x 0.5 Yes 1010 001x M24C32T-FCU6T/TF 32-Kbit Yes 0.853 0.853 0.330 0.185 M24C64T 0.4 x 0.5 Yes 1010 000x M24C64T-FCU6T/TF 64-Kbit Yes 0.853 0.853 0.330 0.185 M24128T 0.4 x 0.5 Yes 1010 000x M24128T-FCU6T/TF 128-Kbit Yes 0.853 0.853 0.330 0.185 M24C64T 0.4 x 0.5 Yes 1010 000x M24C08-FCT6TP/T 8-Kbit No 0.715 0.705 0.330 0.185 M24C16 0.4 x 0.4 No 1010 0zzx M24C16-DFCU6TP/K 16-Kbit No 0.745 0.839 0.300 0.185 M24C08 0.4 x 0.4 No N/A M24C32-FCU6TP/TF 32-Kbit No 0.815 0.694 0.345 0.160 M24C64-FCU 0.4 x 0.4 Yes 1010 000x M24C32M-FCU6T/TF 32-Kbit No 0.815 0.694 0.345 0.160 M24C64M-FCU 0.4 x 0.4 Yes 1010 100x M24C64-FCU6TP/TF 64-Kbit No 0.815 0.694 0.345 0.160 M24C32-FCU 0.4 x 0.4 Yes 1010 000x M24C64M-FCU6T/TF 64-Kbit No 0.815 0.694 0.345 0.160 M24C32M-FCU 0.4 x 0.4 Yes 1010 100x Compatible 4 balls 7 Portfolio with Hardware Write Protect All devices are embedding Hardware Write Protect and are in mass production WLCSP serie Part number Memory density Dimension (max X/Y) (mm) Profile (max) Ball size Pinout (mm) (typ) (mm) compatibility Bump number I2C bus HWP 5&8 balls M24C64-FCS6TP/K 64-Kbit 1.168 1.074 0.645 0.27 - 5 M24C64-DFCT6TP/K 64-Kbit 1.093 0.979 0.33 0.16 - 8 M24128-DFCS6TP/K 128-Kbit 1.291 1.101 0.580 0.27 M24256 8 M24256-DFCS6TP/K 256-Kbit 1.291 1.378 0.580 0.27 M24128 8 M24512-DFCS6TP/K 512-Kbit 1.291 1.957 0.580 0.27 M24M01 8 M24M01-DFCS6TP/K 1-Mbit 1.718 2.580 0.580 0.27 M24512 8 M24M02-DRCS6TP/K 2-Mbit 2.031 3.576 0.580 0.27 - 8 M95640-DFCT6TP/K 64-Kbit 1.093 0.979 0.330 0.16 - 8 M95128-DFCS6TP/K 128-Kbit 1.291 1.101 0.580 0.27 M95256 8 M95256-DFCS6TP/K 256-Kbit 1.291 1.378 0.580 0.27 M95128 8 M95512-DFCS6TP/K 512-Kbit 1.291 1.957 0.580 0.27 M95M01 8 M95M01-DFCS6TP/K 1-Mbit 1.718 2.580 0.580 0.27 M95512 8 M95M02-DRCS6TP/K 2-Mbit 2.031 3.576 0.580 0.27 - 8 SPI bus 8 Thank you! 9