On-Demand Webinar: Si87xx Digital Isolators

www.silabs.com
“Using Drop-in Opto Upgrade
Devices to Improve System
Reliability and Performance”
October 2012
Agenda
 Opto Backgrounder
 A Close Look at Optos
 Common Opto Remedies
 Conclusion
 Upgrading to the Si87xx CMOS Digital Isolator




A Close Look at Si87xx/826x
Si87xx/826x vs. Optos
Upgrading optos with Si87xx/826x
Interactive Problem Solving
 Summary
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What You’re Going to See…
 FIRST: You’re going to see how hard it is to apply optos because of:






Substantial internal parasitic coupling
Key parameters that interact with one another
Additional external BOM
Parametric wander with temperature and current
Internal wear-out mechanisms
Mushy current thresholds
 NEXT: Experience the wonder of the Si87xx/826x
 The world’s one and only true opto upgrade
• Enhanced performance
• EASY to use
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Birth of the Optocoupler
 Optos have been around in various forms since the early 1970’s
 Early optos were called “Light Cells”
 A miniature incandescent bulb sandwiched between two photocells packaged in a heat shrink
tube!
 Optos have evolved into the incumbent isolation device
 30+ years in the market; highly diversified customer base!
 Optos outsell all other semiconductor isolation devices combined
 Multiple suppliers: Avago, Toshiba, Fairchild. IXYS, Sharp, etc.
 Large product offerings, BUT…
 Customers need for improved devices are driving CMOS isolators growth
 Wider temp ranges, greater performance, and improved reliability
 Silicon isolators are starting to supplant optos in many applications
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Silicon Laboratories Confidential
Si87xx/826x upgrade – That was easy!
 For most upgrading to Si87xx/826x couldn’t be easier:
1.
2.
3.
4.
Find the proper cross reference part with the online selection guide
Unsolder the optocoupler from the board
Solder the compatible Si87xx/826x part onto the opto footprint
Enjoy the superior performance and extended life of Si87xx/826x!
 Check out this demo of just how easy upgrading is…

http://www.youtube.com/watch?v=0GQ5OyVSYao
Drop-in isolator upgrade
for legacy optocouplers
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Board with Competitor’s Optocoupler Installed
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Step 1: Desolder Competitor’s Optocoupler
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Step 2: Throw Competitor’s Optocoupler Away
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Step 3: Place Si87xx Optocoupler on Board
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Step 4: Solder-in the Si87xx
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Step 5: Be Sure the Si87xx is Soldered Correctly
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Step 6: Apply Power
 Better timing performance and reliability, easier to use, longer lifetime,
wider operating temperature range, improved CMTI, 10 kV surge tolerant,
lower input current, 2x to 3x lower internal parasitics vs. optocouplers,
60+ years TDDB…the FIRST and ONLY optocoupler upgrade!!
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Digging Deeper
 For most applications, you can simply swap with Si87xx/826x
 Find the compatible part, solder it in, and win the socket!
 Optimize your system with Si87xx/826x
 Optos often have lots of circuits around them to achieve acceptable performance
 Many of these components can be removed when using Si87xx/826x
 Other component values can be changed to further improve performance
 The next section will reveal the numerous problems with optocouplers
 Revealing the work you must perform to make optos work correctly, and
 How you can simplify your system using Si87xx/826x
Hold your nose – optocouplers stink!
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Silicon Laboratories Confidential
Use Grounded Cathode Topology (Best CMTI)
NC
RF
VDD
NC
ANODE
CLEDP
RL
IF
VF
CATHODE
VO
0.1uF
CLEDN
NC
GND
Optocoupler
VCM
 Parasitic capacitor CLEDN is typically much larger than CLEDP
 Grounded cathode directly shorts CLEDN across VCM; CLEDN is eliminated as a parasitic!
• CLEDN can account for up to 90% of input/output parasitic capacitance CIO.
 CLEDP remains a smaller, but still an active parasitic coupling
 If VIN is high, CLEDP can steal current from IF, turning the LED OFF
 If VIN is low, CLEDP can inject current into the LED, turning it ON
 BOTH optos AND Si87xx/826x have internal parasitic coupling
 Si87xx/826x parasitics are much lower than those of optos!
 BOTH optos AND Si87xx/826x benefit from the use of the Grounded Cathode configuration
 All circuit examples in this presentation will be Grounded Cathode configurations
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Silicon Laboratories Confidential
Opto Flaw 1: Strong Internal Parasitic Coupling
CLEDP can rob current from
IF turning the LED OFF if VIN
is high; or turn LED ON if VIN
is low.
NC
RF
VDD
NC
ANODE
CLEDP
VIN
Shield
RL
IF
CATHODE
VO
Cbypass
CLEDN
NC
GND
1.5kV
Optocoupler
0V
1µS
VCM
 Parasitic coupling enables fast CMTs to occur on one side of the isolator
 These fast dv/dt pulses can turn the opto LED on or off causing data errors
 Key isolation parameter: Common Mode Transient Immunity (CMTI)
• CMTI is the isolator’s ability to reject CMT and continue operating without errors
 Note that a low ohmic value RF helps CMTI!
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Opto Flaw 2: Unshielded Opto Offering
NC
VDD
ANODE
NC
NC
ANODE
VDD
NC
CLEDP
CATHODE
VO
CATHODE
CLEDN
NC
NC
GND
Shielded Optocoupler
 CLEDP, CLEDN affects sensitive receive diode
• Significantly degrades CMTI
 Receive diode no longer affected
 LED still affected by parasitic coupling
• Small reduction in CMTI
 Example: HCPL-4502
 Typical CMTI = 1 kV/µS at IF = 16 mA
 Positive and negative false triggers
Positive CMT can turn receive diode OFF
Negative CMT can turn receive diode ON
Positive CMT can turn LED OFF
Negative CMT can turn LED ON
 Takeaway:
 Unshielded optocouplers are useless in high
CMT environments
16
VO
CLEDN
GND
Unshielded Optocoupler
•
•
•
•
Shield
CLEDP
 Example: HCPL-4503
 Typical CMTI = 30 kV/µS at IF = 16 mA
 Positive and negative false triggers
• Positive CMT can turn LED OFF
• Negative CMT can turn LED ON
 Takeaway:
 Shielded optocouplers are targets for
Si87xx/826x!
Silicon Laboratories Confidential
Opto Flaw 3: “Wandering” CTR
 Current Transfer Ratio (CTR) is a gain term
 Typical values for CTR:
 10% to 50% for devices with an output phototransistor
 Up to 2000% for devices with a Darlington transistor output pair
 Some optos remove CTR as a spec and instead add compensating circuits to the receive diode
 CTR Dependencies:
 Output transistor current gain (hfe), VDD supply voltage, forward current through the LED, operating
temperature
 CTR varies with absolute current level:
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 Peaks at an LED current level of about 10 mA, and falls away at both higher and lower current levels
Silicon Laboratories Confidential
Current
Thresholds?
Unit 1
Opto Turn-On/Turn-off
“Thresholds”
Forward Current (mA)
Forward Current (mA)
Opto Flaw 4: “Mushy” Current Thresholds
Current
Thresholds?
Unit 2
Opto Turn-On/Turn-off
“Thresholds”
Forward Voltage (V)
Forward Voltage (V)
 Opto begin to turn on at “some point”
 Poor unit-to-unit current threshold value matching
 Sloping (Analog turn-on/turn-off) further muddles true turn-on threshold value
 Threshold value is temperature dependent
 Lab measurements have shown most optos begin turn on BELOW
the specified threshold
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Forward Current Thresholds (mA)
Opto Flaw 5: “Low Current” Thresholds
i2
B
LED ON
Higher threshold
current = higher CMTI
iTH2
A
A
i1
iTH1
LED ON
Lower threshold
current = lower CMTI
Forward Voltage (V)
 Turn-on Threshold affects spurious turn-on
 Higher threshold = more CMTI
• The LED requires more requires more parasitic current to turn-on!
 Example:
 Opto “B” requires more parasitic current to cause a false turn-on
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Opto Flaw 6: False Output Turn-on/Turn-Off
Negative dVCM: Negative glitch
(false turn-on) on VOUT due to
CLED01+CLED02
Positive dVCM: Positive glitch
(false turn-off) on VOUT due to
CLED01+CLED02
 CMTI is degraded when using an internal pull-up. Example: HCPL-4506:
 IF = 10 mA for 30 kV & external pull-up
 IF = 16 mA for 30 kV & internal pull-up
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Opto Flaw 7: Compound Coupling
NC
ANODE
IF
VDD
DP
CLE
01
CLED
20KΩ
RL
RF
VF
CMT
CATHODE
+V
Output
CLED
CLED
+1500V
NC
02
N
VO
GND
V
0V
t
VCM
HCPL-4506
Circuit Model
 Parasitic caps CLED01/2, CLEDP combine to create unwanted effects
 CLED01/2 inject current into internal pull-up & collector causing output parasitic turn-off
 CLEDP can inject current into cathode causing LED parasitic turn-off
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VDD2
Opto Flaw 8: Performance Degradation
Can’t take the
Heat No Mo!!
OPTO
 One key optocoupler wear-out mechanism is LED light output (LOP)
 LED to loses brightness over time
 Reduced LED emission decreases the photo detector output signal
• Negatively impacts opto timing and output impedance characteristics
 LOP typically worsens with increasing temperature and LED current
 Manufacturer’s LOP data based on normalized light output over a period of 10,000 hours
• Best case: nominal light falls by output by as much as 20%
• Worst case: light output falls below the minimum value required for proper device operation.
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Opto Flaw 9: Current, Current and MORE Current!
Issue
Opto Solutions
Si87xx/826x Solutions
Improve CMTI: Spurious Turn-on
Use higher threshold device
Use clamping diode or switch
Decrease value of RF (more current)
Increase value of CL (more current)
Decrease value of RL (more current)
Use higher threshold device
Decrease value of RF (more current) (Note 1)
Remove CL
Improve CMTI: Spurious Turn-off
Decrease value of RF (more current)
Decrease value of RF (more current)
Increase value of RL
Use higher threshold device
Decrease value of RF (more current) (Note 1)
Increase value of RL
Decrease tPHL
Decrease RF value (more current)
Increase RL value
Decrease CL value
Add peaking cap across RF
Non-issue
Non-issue
Non-issue
Non-issue
Decrease tPLH
Decrease value of RL (more current)
Decrease value of CL
Add peaking cap across RF
Decrease value of RL (more current)
Remove CL
Non-issue
Address CTR Variation
Use worst case # (more current)
Non-Issue
Address LED aging
Decrease RF (more current)
Non-Issue
Notes
1.
All “More Current” comments in RED refer to LED current only; not output current. All “More Current” comments in
BLUE refer to output current.
2.
Significant coupling through CLED01 and CLED02 can cause 87xx turn-on failures, which can be mitigated by reducing RL
or increasing using CL a higher threshold device. These coupling mechanisms are minimal in Si87xx; usually < 1V
3.
Increasing CL requires more current for same tPHL or tPLH .
4.
Decreasing RL requires more LED current for the opto.
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Opto Flaw 10: Long Prop Delays
NC
VDD
ANODE
NC
VBIAS
Cp
RL
RF
Opto
VO
CATHODE
VF
Peaking Cap: “Kick-starts”
the LED, decreasing tPHL
GND
NC
150
B
Cp
Opto
LED
RLED
`
D
100
Opto
Prop Delay (nS)
F
E
C
A: 0.5mA to 1.0mA, Cp =20pF
0.5mA to 0.75mA, Cp = 20pF
tPHL
B: 0.5mA, Cp = 0pf
C: 1.0mA, Cp = 0pf
50
A
tPLH
D: 0.5mA to 1.0mA Cp= 20pF
0.5mA to 0.75mA, Cp = 20pF
E: 0.5mA, Cp=0pF
F: 1.0mA, Cp=0pF
OptoPro
Si87xx/826x
CL = 15pF all devices
-60
-40
-20
0
20
40
60
80
Temperature (C)
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100
120
No peaking
cap needed!
Common Optocoupler Remedies
 Optos need added “remedies” to “work” properly; i.e.:





Prevent False turn-on
Increase operating service life
De-glitch output
Lower power consumption
Etc…..
 ER “opto-docs” routinely implement the following gimmicks…
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Propping-Up the Opto…
Clamping diode:
Keeps LED off by
shorting RF in reverse
direction
RL: External pullup resistor
Peaking capacitor: hastens
LED turn-on/turn-off for
faster propagation time
VDD2
VDD
NC
RF
Internal
Pull-Up
ANODE
RL
NC
Optocoupler
CATHODE
VO
CPK
NC
GND
VF
-V
Shorting or Reverse Bias switches:
helps keep LED turned-off during
CMT events
26
CL: Filters output glitches caused
by CMT coupling to internal pullup resistor
Silicon Laboratories Confidential
CL
Opto Remedy 1: Helping CMTI
 Clamp Diode
 Low forward-drop diode shorts RF in reverse direction
 Transistor Clamp
 Hard short across LED prevents LED turn-on
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Opto Remedy 2: Preventing False Turn-On/Off
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Opto Remedy 3: Deglitching Output
CLOAD
IMPACT
COMMENTS
Small Capacitive Value
Higher speed output
Large Capacitive Value
Improved CMTI
Less capacitive loading translates to faster output rise and fall times.
More capacitive loading prevents CMT output glitches. CMT glitch is a
"hump-like" waveform shape. Increased output capacitance filters the
glitch by reducing its amplitude.
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Opto Remedy 4: When in Doubt, Increase Input Current
Decreasing RF = higher
LED emission and lower
LED impedance
VBIAS
NC
IF
ANODE
CLED01
RF
VDD
Opto
Decreased RL: Increased
current flow acts to oppose
many parasitic effects
RI
NC
RL
CLEDP
CATHODE
VF
VO
CLEDN
CLED02
NC
GND
Higher current flow
decreases switch effective
output impedance
 BUT…excessive input current shortens opto service life!
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Opto Remedy 5: Increase Opto Service Life
 Use less LED input current
 Typically operate at 85 ºC or less
 This tactic lowers CMTI
• Compensate by applying more aggressive CMTI external component techniques to
compensate
• Flies in the face of previous slide
 Contact opto supplier for apps help?
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Opto Summary
 Opto vendors should ship a clothespin with each opto ’cause they
stink!
 The evidence against optos is overwhelming!!









Poor performance
Questionable reliability
Multiple/interdependent parasitic parameters
Variable turn-on/turn-off thresholds
Poor power efficiency
Added BOM “fix-’em-up” circuits
Poor unit-to-unit matching
Narrow operating temperature range
Intrinsic wear-out mechanisms, etc…
 No doubt…optos are REALLY lame
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Agenda
 Overview
 Opto Backgrounder




Introduction
A Close Look at Optos
Common Opto Remedies
Conclusion
 Si87xx/826x Training





Introduction
A Close Look at Si87xx/826x
Si87xx/826x vs. Optos
Upgrading Optos with Si87xx/826x
Interactive Problem Solving
 Summary
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Si87xx/826x: Easy as Shootin’ Fish in a Barrel!
“Si87xx/826x is what an opto wants to be when it grows-up!”
 Well behaved, intuitive and easy to apply
 A flexible, comprehensive solution
 Robust and rugged
 Solid performance over temperature and voltage
 DROP-IN compatibility with popular optos and optodrivers
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Rudye McGlothlin
Si87xx/826x: Simple Yet Elegant Architecture
Forward voltage VF
provides input-side VDD
VBIAS
VBIAS
Si87xx Digital Isolator
NC
VDD1
ANODE
XMIT
CATHODE
NC
INPUT DIE
Forward voltage VF causes
current flow IF determined by
resistor RF - i.e:
IF = [VF – 2]/RF
RECV
RF
RECV
e
ENABLE
XMIT
CATHODE
OUTPUT
BUFFER
GND2
OUTPUT DIE
UVLO
ANODE
GND1
VOUT
ISOLATION
ENABLE
ISOLATION
e
GND1
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IF
NC, VE
or VL
VDD
VDD2
VDD1
VDD2
ISOLATION
VF
IF
NC
VDD
ISOLATION
RF
Si826x Isolated Gate Driver
GATE
DRIVER
V0
V0
OUTPUT
OUTPUT
GND
NC
GND
INPUT DIE
GND2
OUTPUT DIE
Receiver energizes output
buffer when sufficient inband energy is detected
The transmitter is
enabled when IF is at or
above threshold value
Silicon Laboratories Confidential
Si826x operation is the
largely the same as Si87xx
Si87xx/826x Packages & Performance Grades
DIP8
Gullwing
SOIC8
SDIP6
LGA8
A-GRADE
B-GRADE
Input
Input
Isolation
Data Isolation
Current Data Rate
Surge
Current
Surge
Ratings
Packages Comments
Rate
Ratings
Packages Comment
Threshold (Mbps)
(kV)
Threshold
(kV)
(kV)
(Mbps)
(kV)
DEVICE
(mA)
(mA)
Si8710xD-A-IS
3
1
5
10
SDIP6 Low Power
6
15
5
10
SDIP6
SO8,
SO8,
High CMTI
Si8710xx-A-IS
3
1
3.75, 5
10
6
15
3.75, 5
10
LGA8,
LGA8, Low Power
PDIP
PDIP8
Si8711xx-A-IS
Si8712xx-A-IS
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3
3
1
1
3.75, 5
3.75, 5
10
SO8,
LGA8,
PDIP
Low
Power,
Integrated
20KΩ
10
SO8,
LGA8,
PDIP
Low
Power, VE
(Output
Enable)
Silicon Laboratories Confidential
6
6
15
15
3.75, 5
3.75, 5
10
SO8,
LGA8,
PDIP8
10
SO8,
LGA8, High CMTI
PDIP8
High CMTI
What Makes Si87xx/826x so Easy to Use?
x/
x
87 6 x
i
S 2
8
Item
Parasitics
Si87xx/826x
Less than half the parasitic coupling of optos;
most parameters independent from each other
Optocoupler
High parasitic coupling with interdependent parameters
No wear out mechanisms, 60+ year operating
lifetime at 125 C at maximum VDD
Intrinsic wear-out mechanisms; 10x lower lifetime
Input Current
Low parasitic coupling requires less current
Requires higher input current to be competitive
Ease-of-Use
Fewer second order effects, tight unit-to-unit
matching, no CTR
Significant 1st and 2nd order effects, temperature
dependencies, imprecise current thresholds, CTR
Simple: Use Si87xx/826x B-grade (high threshold
device) with IF = 6mA
Make design trade-offs for optimum input current, CMTI
performance, operating temperature, and operating lifetime
Input Interface
Precise thresholds, multiple threshold versions
Ambiguous threshold often positioned below specifications
Performance
Fast prop time, better CMTI, stable over temp
and voltage, -40 C to +125 C operating range
Slow prop time, narrow temperature range, parametric
change with temperature, input current and device age
Reliability
Opto Retrofit
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Si87xx/826x Virtue 1: Threshold Options
Low Output CMTI (min, V/µS)
Si871xB
Improved CMTI
Si871xA
50% lower current
Forward Current (mA)
 Si871xA provides CMTI performance similar to the best optos with < ½ the forward current
 Si871xB provides superior CMTI performance with slightly less forward current
 Black points represent replaceable optos
 X-axis is the forward current used for specifying CMTI
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Si87xx/826x Virtue 2: Digital (vs. Analog) Behavior
Optimum ON Current
Optimum ON Current
Output HI
Minimum Current Required for Turn-On (B Grade)
Maximum Operating Current
OFF
ON
Minimum Current Required for Turn-On
(Undetermined)
Si87xx/826x Turn-On/Turn-Off Characteristics
Opto Turn-On
Characteristics
 Si87xx/826x: precise current thresholds with hysteresis
 Output is either high or low – no ambiguous output states
 Opto: Highly non-linear transfer function
 Ambiguous thresholds that vary unit-to-unit and wander with temperature
 LED turn-on typically begins below data sheet threshold specification
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xmA
Maximum Opto
Emulator Input Current
20mA
6.0mA
2.3mA
Output LO
2.0mA
20mA
Maximum Opto
Emulator Input Current
3.0mA
1.2mA
1.1mA
Minimum Current Required for Turn-On (A Grade)
Start of LED turn-on? – Maybe!
Datasheet Thresholds?
Si87xx/826x Virtue 3: No CTR
Guaranteed
OFF
2.0mA
A-Grade
 Digital operation and precision current
thresholds eliminate the need for CTR
 The Si87xx/826x is either full-on or completely off!
CTR???...we don’t need
no stinking CTR!
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Silicon Laboratories Confidential
Guaranteed
ON
2.3mA
Guaranteed
ON
1.2mA
1.1mA
Guaranteed
OFF
B-Grade
Si87xx/826x Virtue 4: Substantially Lower Parasitics
 It takes a substantially faster, higher amplitude
CMT pulse to perturb Si87xx/826x
NC
VDD
ANODE
NC
 Disturbances are easily addressed using a higher
threshold device and/or decreasing the value of RF
CLEDP is a small parasitic capacitance
CLEDN is eliminated (shorted) through VCM
CLED01 is eliminated using external RL
CLED02 is half that of opto parasitics
CATHODE
VCM
• The parasitic effects of which are <1 volt
 CMTI-to-current ratio
Tx
RL
ISOLATION




e
ISOLATION
 Si87xx/826x lower parasitic coupling:
VDDO
Rx
CLED02
VO
CL
ED
P
NC
GND
VCM
Si87xx
• 16x (Silicon Labs) vs. 9x (optos)
Measured CMTI:
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Part #
Threshold
Measured Spurious Turn-on
Common-Cathode (CLEDP)
Spurious Turn-on
Common-Anode (CLEDN)
Si8712A
1.2 mA
19 kV/us (16:1)
6.9 kV/us
Si8712B
2.3 mA
40 kV/us (17:1)
12 kV/us
HCPL-4506
1.4 mA
12.5 kV/us (9:1)
3.3 kV/us
Silicon Laboratories Confidential
Example: Spurious Turn-on
NC
1.5kV CMTI Pulse
Si8712A
Tfall = 120 ns
Output
ANODE
Gradual turn-off
(~350µS)
External 20k pull-up
Output
HCPL-4506
Tfall = 80 ns
VF = 0V
VF
RF
CATHODE
VDD2
NC
CLEDP
Shield
Before
VDD
RPULL-UP
VO
1.5kV CMTI Pulse
Gradual turn-on
Hard Turn-on
CMT
NC
V
GND
-V
0V
Turn off (~20nS)
-1500V
t
After
Si8710B
Tfall = 120 nS
VCM
 Negative-going CMT pulls down cathode, turning
LED on and driving output low.
 Fixes:
 Opto Fix (Hard): Shorting switch? Lower RF value? Add CL?
 Si87xx/826x Fix (Simple): Use higher threshold Si870xB
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Silicon Laboratories Confidential
Example: Spurious Turn-off
Resistive (20k)
Pull-up
1.5kV CMTI Pulse
Si8712A
Trise = 40 ns
HCPL-4506
Trise = 400 ns
RF
Gradual
Turn-on
Hard turn-on
VF
Gradual
Turn-off
Output
Output
ANODE
IF
CATHODE
CLEDP
Shield
1.5kV CMTI Pulse
VDD
RPULL-UP
NC
RL
1
D0
CLE
CLE
D0
2
V+ CLEDN
CMT
+1500V
NC
GND
V
0V
t
VCM
 Positive-going CMT momentarily turns diode off, driving output high
 ACPL-4506 output goes high momentarily
 Si8712: ~500 mV parasitic rise with no logic state change
 Fix:
 Opto fix (Hard): Add CL? Decrease RF value? Add shorting switch? Decrease RL?
 Si87xx/826x Fix (Simple): No action required!
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Silicon Laboratories Confidential
VO
VDD2
Si87xx/826x Virtue 5: No need for CL
 CL useful as a glitch filter in optos, but not necessarily in Si87xx/826x
 “Snappy” on-off action of Si87xx/826x eliminates need for CL
 CL acts only to slow Si87xx/826x performance
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Silicon Laboratories Confidential
Si87xx/826x Virtue 6: Stable Operation Over Temp
 CMOS process technology and careful design gives Si87xx/826x
solid parametric consistency over the entire operating range
 Note the slope and linearity of the Si87xx/826x curve vs. competing optos!
Si87xx/826x
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Silicon Laboratories Confidential
Si87xx/826x Virtue 7: No Wear-out Mechanisms
 Standard CMOS process
technology instead of GaAs
 Mature and well understood
• 40+ years of learning
 Substantially more reliable than GaAs
• 5.5x lower FIT rate
• TDDB = 60 years
• MTTF = 87 years
 Other benefits of CMOS:
 Wider operating temp range
 Parametrically stable over voltage
and temperature
Product
 Low operating power
Avago
 Economical
Coupler
Type
Ta
FITs
(90%)
MTTF
GaAs –
Optical
125 oC
7195
15 years
Avago HCPL0900
GMR
125 oC
8722
13 years
Silicon Labs
Si8442
CMOS –
Capacitive
125 oC
1310
87 years
6N135/136
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Silicon Laboratories Confidential
(1)
Si87xx/826x Virtue 8: Drop-in Opto Upgrade!
Step 2: Check the value of RF – If
necessary, adjust its value to optimize
input current range for Si87xx/826x. Do
not exceed +20 mA !
Step 1: Use the on-line selection guide
to find the correct Si87xx/826x part
number, then remove and replace the
opto with the Si87xx/826x device
VDD
NC
VF
RF
Cp
Sw
R1
VDD
RL
ANODE
NC
Si87xx
OptoPro
/826x
CATHODE
Out
VO
Q1
CL
NC
GND
GND1
Step 3: “Helper” components like this
shorting switch can optionally be left
in place or removed. (Note the
Si87xx/826x can withstand reverse
input current of -150 mA (max))
GND2
Step 4: Apply power and verify
system operation!
Typically a bullet-proof drop-in, regardless of application circuit
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Silicon Laboratories Confidential
Si87xx/826x Virtue 9: Comprehensive Solution
NC
1
ANODE
IF
RF
VF
2
CATHODE
3
VDD2
VDD2
NC
1
VDD
ANODE
8
RF
CMOS
Inverter
8
UVLO
VO
2
4
Q1
VO
NC
3
6
7
NC
GND
4
5
Output
Si8261BCC
VO
6
CBOOT
7
CATHODE
Output
VDD2
VDD
ANODE
NC
HV
VDD
GND
5
RF
VF
1
UVLO
6
NC
VO
2
5
Q2
GND
CATHODE
4
3
Si8261BCD
Si87xx Digital Isolator
 Digital isolators and isolated gate drivers
 Both use the same technology
 Both enjoy the same drop-in replacement strategy
 The Si87xx, Si826x are 10 kV surge tolerant!
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Silicon Laboratories Confidential
Si826x Isolated Drivers
Si87xx/826x Virtue 10: On-Line Design Tools
 High-side bootstrap and bypass capacitor values are calculated using five different
equations:
 Occupies four-pages in application note AN677
• Not a complex calculation, but easily prone to error
 Silicon Labs will offer an on-line high-side bootstrap and bypass capacitor calculator:
• User needs only the MOSFET datasheet QG vs. VGS curve
• Plug in the operating point and the calculator provides the values for both capacitors, and required
capacitor recharge current!
49
Silicon Laboratories Confidential
Example: High-Side Bootstrap Calculator
50
Silicon Laboratories Confidential
Si87xx/826x Virtue 11: Intuitive Behavior
 Si87xx/826x is more intuitive to use vs. optos
 Si87xx/826x is a digital device – it’s either on or off
 Operation is straight-forward and easy to understand and diagnose
• Most key Si87xx/826x parameters are independent from each other
 High threshold, low CIO and few second-order effects
 You can hand someone a (high threshold) B-grade Si87xx/826x, tell them to use
6 mA for IF and be reasonably confident it will perform in most system
configurations
• Optos: complicated by compound parasitics, CTR and other variable parameters
 Si87xx/826x is for retrofit AND for new designs!
 Few key parameters:
• Primary isolator design variables: IF, RL and input current threshold
• Primary gate driver design variables: IF, peak output current and input current threshold
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Silicon Laboratories Confidential
Summary
 Here’s your chance to put optocouplers out of their misery for good!
 Si87xx/826x benefits:










Higher timing performance and reliability
Pin-compatible drop-ins – little or no PCB modifications
Lower internal parasitic coupling
Precision current thresholds
Lower input current for greater operating efficiency
Full -40 to +125 ºC operating range
Easier system design
On-line support tools
Replaces both optos, signal isolators and opto-coupled gate drivers
Supports 10 kV surge and isolation ratings of 2.5 kV, 3.75 kV and 5.0 kV
…And Silicon Labs is the only place you can get ’em!
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Silicon Laboratories Confidential
Isolation Support Tools
 Isolation support tools
 Application notes
 Evaluation Boards (EVBs)
 Turnkey reference designs
• ISOvolt, ISOlinear, Class D Audio, and more…
 Website isolation product design utilities
Discrete ISOvolt
Reference Design
• Isolator power calculator, high-side bootstrap calculator, and more…
 Technical Support
• Expert guidance from the best team in the business!
9-Bit Version
(Circuit #3)
10-Bit Version
(Circuit #2)
12-Bit Version
(Circuit #1)
ISOlinear Reference Design
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Silicon Laboratories Confidential
Si890x EVB
Turnkey Tools Get You Started Today
 Evaluation kits streamline testing directly in your system
Si84xxISO-KIT
• Quick evaluation of 6
different isolators from
the Si84xx family
Si86xxISO-KIT
• Quick evaluation of 6
different isolators from
the Si86xx family
Si82xx-KIT
• Quick evaluation of 4
different isolated
drivers from the Si82xx
family
 Reference designs explore new applications
Si86ISOLIN-KIT
• Three cost and
performance optimized
analog isolation circuits
ISOVOLT35-KIT
• Isolated DC/DC
converter and isolated
digital channels
SI890xPWR-KIT
• Isolated power line
monitoring with analog
or digital output
You
Silicon Laboratories Confidential
54 can find more at: http://www.silabs.com/products/power/isolators/Pages/DevelopmentTools.aspx
Isolator Product Support & Tools
Competitor Cross-Reference Search
Parametric Search Tool
Digital Isolator Resources
Isolation Products Brochure
55
Isolator White Papers
Silicon Laboratories Confidential
Summary
 Si87xx/826x: great opportunity!




Drop-in upgrades for opto-based devices
Considerable value add
Easy to use
Increased performance, reliability
 Outstanding product mix
 Digital isolators and isolated gate drivers
 Drop-ins for Avago and others
 On-line design resources in the works
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Silicon Laboratories Confidential
www.silabs.com
Thank you!
www.silabs.com/isolation