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Datasheet
Sound Processor with Built-in 2-band Equalizer
BD37512FS
General Description
Key Specifications
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BD37512FS is a sound processor with built-in 2-band
equalizer for car audio. The functions are 4ch stereo
input selector, input-gain control, main volume and 4ch
fader volume. Moreover, its “Advanced switch circuit”,
which is an original ROHM technology, can reduce
various switching noise (ex. No-signal, low frequency
like 20Hz & large signal inputs). “Advanced switch”
makes control of microcomputer easier, supporting the
construction of a high quality car audio system.
Package
Features
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Power Supply Voltage Range:
Circuit Current (No Signal):
Total Harmonic Distortion:
Maximum Input Voltage:
Cross-talk Between Selectors:
Volume Control Range:
Output Noise Voltage:
Residual Output Noise Voltage:
Operating Temperature Range:
Reduce switching noise of mute, main volume,
fader volume, bass, trebles by using advanced
switch circuit
Built-in 1 differential input selector and 3
single-ended input selectors.
Built-in ground isolation amplifier inputs, ideal for
external stereo input.
Decrease the number of external components due
to built-in 2-band equalizer filter.
It is possible to adjust the gain of the bass and
treble up to ±20dB with 1 dB step gain adjustment.
Energy-saving design resulting in low current
consumption, by utilizing the Bi-CMOS process. It
has the advantage in quality over scaling down the
power heat control of the internal regulators.
Input terminals and output terminals are organized
and separately laid out to keep the signal flow in
one direction which results in simpler and smaller
PCB layout.
It is possible to control the I2C BUS by 3.3V / 5V.
7.0V to 9.5V
15mA(Typ)
0.005%(Typ)
2.3Vrms(Typ)
-100dB(Typ)
+0dB to -40dB
6µVrms(Typ)
2µVrms(Typ)
-40°C to +85°C
W(Typ) x D(Typ) x H(Max)
SSOP-A20
8.70mm x 7.80mm x 2.01mm
Applications
It is optimal for use in car audio systems. It can also be
used for audio equipment of mini Compo, micro Compo,
TV, etc.
○Product structure:Silicon monolithic integrated circuit
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TSZ22111・14・001
○This product has no designed protection against radioactive rays
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TSZ02201-0C2C0E100420-1-2
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BD37512FS
Typical Application Circuit
BD37512FS
Pin Configuration
TOP VIEW
A1 1
20 FIL
A2 2
19 GND
B1 3
18 SDA
B2 4
17 SCL
C1 5
16 MUTE
C2 6
15 VCC
DP1 7
14 OUTF1
DN 8
13 OUTF2
DP2 9
12 OUTR1
N.C 10
11 OUTR2
Pin Descriptions
1
Pin
Name
A1
2
A2
3
Pin No.
Description
Pin No.
Pin Name
A input terminal of 1ch
11
OUTR2
Rear output terminal of 2ch
A input terminal of 2ch
12
OUTR1
Rear output terminal of 1ch
B1
B input terminal of 1ch
13
OUTF2
Front output terminal of 2ch
4
B2
B input terminal of 2ch
14
OUTF1
Front output terminal of 1ch
5
C1
C input terminal of 1ch
15
VCC
6
C2
C input terminal of 2ch
16
MUTE
7
DP1
D positive input terminal of 1ch
17
SCL
I2C Communication clock terminal
8
DN
D negative input terminal
18
SDA
I2C Communication data terminal
9
DP2
D positive input terminal of 2ch
19
GND
GND terminal
10
N.C.
No Connection
20
FIL
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Description
Power supply terminal
External compulsory mute terminal
VCC/2 terminal
TSZ02201-0C2C0E100420-1-2
16.Dec.2015 Rev.001
BD37512FS
Block Diagram
20
19
18
17
16
15
14
13
12
11
VCC
VCC/2
GND
I2C BUS LOGIC
Fader★
Fader★
Fader★
Fader★
■Fader:0dB~-62dB/1dB
Fader: 0dB to -62dB/1dB -∞-∞
★no pop noise
■2 Band EQ (Tone control)
Gain:
+20dB to -20dB/1dB
Gain:+20dB~-20dB/1dB
★no pop noise
・Bass:f0=100Hz
Q=1.0
・Treble:f0=10kHz
Q=1
★2 Band P-EQ
(Tone control)
Volume: 0dB to -40dB/1dB step
■Volume:0dB~-40dB/1dB
step
★no pop noise
★Volume/Mute
Input Gain:
+20dB to 0dB/1dB step
■Input
Gain:+20dB~0dB/1dB
step
Input Gain
Input selector (3 single-end and 1 stereo ISO)
GND
ISO amp
100k
1
100k
2
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100k
3
100k
4
100k
5
3/26
50k
100k
6
GND
ISO amp
7
50k
50k
8
9
10
TSZ02201-0C2C0E100420-1-2
16.Dec.2015 Rev.001
BD37512FS
Absolute Maximum Ratings (Ta=25°C)
Parameter
Symbol
Rating
Unit
Power Supply Voltage
VCC
10.0
V
Input Voltage
VIN
VCC+0.3 to GND-0.3
V
Power Dissipation
Pd
Storage Temperature
0.94
Tstg
(Note)
W
-55 to +150
°C
(Note) This value derates by 7.5mW/°C for Ta=25°C or more when ROHM standard board is used.
Thermal resistance θja = 133.3(°C/W)
ROHM Standard board
Size : 70 x 70 x 1.6(mm3)
Material : A FR4 grass epoxy board(3% or less of copper foil area)
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Recommended Operating Conditions
Parameter
Symbol
Min
Typ
Max
Unit
Power Supply Voltage
VCC
7.0
-
9.5
V
Temperature
Topr
-40
-
+85
°C
Electrical Characteristics
BLOCK
(Unless specified otherwise, Ta=25°C, VCC=8.5V, f=1kHz, VIN =1Vrms, Rg=600Ω, RL=10kΩ, A input, Input gain 0dB,
Mute OFF, Volume 0dB, Tone control 0dB, Loudness 0dB, Fader 0dB)
Limit
Parameter
Symbol
Unit
Conditions
Min
Typ
Max
IQ
-
15
30
mA
No signal
Voltage Gain
GV
-1.5
0
1.5
dB
GV=20log(VOUT/VIN)
Channel Balance
CB
-1.5
0
1.5
dB
THD+N1
-
0.005
0.05
%
Output Noise Voltage *
VNO1
-
6
25
μVrms
CB = GV1-GV2
VOUT=1VRMS
BW=400Hz-30KHz
Rg = 0Ω
BW = IHF-A
Residual Output Noise Voltage*
VNOR
-
2
10
μVrms
Cross-talk Between Channels*
CTC
-
-100
-90
dB
RR
-
-70
-40
dB
Input Impedance(A, B, C)
RIN_S
70
100
130
kΩ
Input Impedance (D)
RIN_D
35
50
65
kΩ
Maximum Input Voltage
VIM
2.1
2.3
-
Vrms
Cross-talk Between Selectors*
CTS
-
-100
-90
dB
Common Mode Rejection Ratio*
CMRR
50
65
-
dB
Minimum Input Gain
GIN_MIN
-2
0
+2
dB
Maximum Input Gain
GIN_MAX
18
20
22
dB
Gain Set Error
GIN_ERR
-2
0
+2
dB
Circuit Current
GENERAL
Total Harmonic Distortion
INPUT GAIN
INPUT SELECTOR
Ripple Rejection
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Fader = -∞dB
Rg = 0Ω
BW = IHF-A
Rg = 0Ω
CTC=20log(VOUT/VIN)
BW = IHF-A
f=1kHz
VRR=100mVrms
RR=20log(VCC IN/VOUT)
VIM at THD+N(VOUT)=1%
BW=400Hz-30KHz
Rg = 0Ω
CTS=20log(VOUT/VIN)
BW = IHF-A
DP1 and DN input
DP2 and DN input
CMRR=20log(VIN/VOUT)
BW = IHF-A
Input gain 0dB
VIN=100mVrms
GIN=20log(VOUT/VIN)
Input gain 20dB
VIN=100mVrms
GIN=20log(VOUT/VIN)
GAIN=+1dB to +20dB
TSZ02201-0C2C0E100420-1-2
16.Dec.2015 Rev.001
BD37512FS
FADER
TREBLE
BASS
VOLUME
MUTE
BLOCK
Electrical Characteristics - continued
Limit
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
Mute Attenuation*
GMUTE
-
-105
-85
dB
Mute ON
GMUTE=20log(VOUT/VIN)
BW = IHF-A
Maximum Attenuation
GV_MIN
-43
-40
-37
dB
Volume = -40dB
GV=20log(VOUT/VIN)
Attenuation Set Error 1
GV_ERR1
-2
0
+2
dB
GAIN & ATT=0dB to -15dB
Attenuation Set Error 2
GV_ERR2
-3
0
+3
dB
ATT=-16dB to -40dB
Maximum Boost Gain
GB_BST
18
20
22
dB
Maximum Cut Gain
GB_CUT
-22
-20
-18
dB
Gain Set Error
GB_ERR
-2
0
+2
dB
Maximum Boost Gain
GT_BST
18
20
22
dB
Maximum Cut Gain
GT_CUT
-22
-20
-18
dB
Gain Set Error
GT_ERR
-2
0
+2
dB
Maximum Attenuation*
GF_MIN
-
-100
-90
dB
Attenuation Set Error 1
GF_ERR1
-2
0
+2
dB
ATT=0dB to -15dB
Attenuation Set Error 2
GF_ERR2
-3
0
+3
dB
ATT=-16dB to -47dB
Attenuation Set Error 3
GF_ERR3
-4
0
+4
dB
ATT=-48dB to -62dB
Output Impedance
ROUT
-
-
50
Ω
VIN =100mVrms
Maximum Output Voltage
VOM
2
2.2
-
Vrms
VP-9690A(Average value detection, effective value display) filter by Matsushita Communication is used for
Phase between input / output is same.
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*
Gain=+20dB f=100Hz
VIN=100mVrms
GB=20log (VOUT/VIN)
Gain=-20dB f=100Hz
VIN=2Vrms
GB=20log (VOUT/VIN)
Gain=-20dB to +20dB f=100Hz
Gain=+20dB f=10kHz
VIN=100mVrms
GT=20log (VOUT/VIN)
Gain=-20dB f=10kHz
VIN=2Vrms
GT=20log (VOUT/VIN)
Gain=-20dB to +20dB
f=10kHz
Fader = -∞dB
GF=20log(VOUT/VIN)
BW = IHF-A
THD+N=1%
BW=400Hz-30KHz
measurement.
TSZ02201-0C2C0E100420-1-2
16.Dec.2015 Rev.001
BD37512FS
Typical Performance Curves
Total Harmonic Distortion : THD+N [%]
30
Quiescent Current : IQ [mA]
25
20
15
10
5
0
0
2
4
6
8
10
10
10kHz
1
1kHz
100Hz
0.1
0.01
0.001
0.001
Supply Voltage : VCC [V]
5
25
4
20
Bass Voltage Gain : GV [dB]
3
Voltage Gain : GV [dB]
0.1
1
10
Figure 2. Total Harmonic Distortion vs Output Voltage
Figure 1. Quiescent Current vs Supply Voltage
2
Gain=0dB
1
0.01
Output Voltage : VOUT [Vrms]
0
-1
-2
-3
-4
BASS GAIN : -20dB to +20dB
/1dB step
fo : 100Hz
Q:1
15
10
5
0
-5
-10
-15
-20
-5
10
100
1k
10k
-25
100k
10
Frequency : f [Hz]
1k
10k
100k
Frequency : f [Hz]
Figure 3. Voltage Gain vs Frequency
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100
Figure 4. Bass Voltage Gain vs Frequency
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16.Dec.2015 Rev.001
BD37512FS
Typical Performance Curves - continued
TREBLE GAIN : -20dB to +20dB
/1dB step
fo : 10kHz
Q:1
20
Treble Voltage Gain : Gv [dB]
Common Mode Rejection Ratio : CMRR [dB]
25
15
10
5
0
-5
-10
-15
-20
-25
10
100
1k
10k
100k
0
-20
-40
-60
-80
-100
10
1k
10k
100k
Frequency : f [Hz]
Frequency : f [Hz]
Figure 6. Common Mode Rejection Ratio vs Frequency
Figure 5. Treble Voltage Gain vs Frequency
0
0
-20
Ripple Rejection : RR [dB]
Cross-talk between Channels : CTC [dB]
100
-40
-60
-80
-100
-20
-40
-60
-80
-100
-120
10
100
1k
10k
10
100k
Frequency : f [Hz]
1k
10k
100k
Frequency : f [Hz]
Figure 7. Cross-Talk between Channels vs Frequency
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100
Figure 8. Ripple Rejection Ratio vs Frequency
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BD37512FS
Typical Performance Curves - continued
100
Output Noise : VNO [μVrms]
Output Noise : VNO [μVrms]
100
DIN-AUDIO
IHF-A
10
DIN-AUDIO
IHF-A
10
1
1
-40
-30
-20
-10
0
-20
10
-15
-5
0
5
15
10
20
Bass Voltage Gain : Gv [dB]
Volume Attenuation : ATT [dB]
Figure 9. Output Noise vs Volume Attenuation
Figure 10. Output Noise vs Bass Voltage Gain
100
100
DIN-AUDIO
Output Noise : VNO [μVrms]
Output Noise : VNO [μVrms]
-10
IHF-A
10
DIN-AUDIO
IHF-A
10
1
1
-20
-15
-10
-5
0
5
10
15
-80
20
Treble Voltage Gain :Gv [dB]
-60
-50
-40
-30
-20
-10
0
Fader Voltage Gain : Gv [dB]
Figure 11. Output Noise vs Treble Voltage Gain
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TSZ22111・15・001
-70
Figure 12. Output Noise vs Fader Voltage Gain
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TSZ02201-0C2C0E100420-1-2
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BD37512FS
Typical Performance Curves - continued
Maximum Output Voltage : VOUT [Vrms]
2.5
2.0
1.5
1.0
0.5
0.0
100
1000
10000
100000
Load Resistance : RL [Ω]
Figure 13. Maximum Output Voltage vs Load Resistance
OUTF1
OUTF1
OUTF2
OUTF2
Figure 14. Advanced Switch 1
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Figure 15. Advanced Switch 2
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BD37512FS
Timing Chart
Control Signal Specification
(1) Electrical Specifications and Timing for Bus Lines and I/O Stages
SDA
tBUF
tLOW
tHD;STAT
tF
tR
tSP
SCL
tHD;STA
P
tHD;DAT
tHIGH
tSU;DAT
tSU;STAT
tSU;STOT
Sr
S
P
Figure 16. I2C-bus Signal Timing Diagram
Table 1 Characteristics of the SDA and SCL bus lines for I2C-bus devices
Parameter
1
2
3
4
5
6
7
8
9
Fast-mode I2C-bus
Min
Max
400
0
1.3
-
Symbol
SCL clock frequency
Bus free time between a STOP and START condition
Hold time (repeated) START condition. After this period, the first clock
pulse is generated
LOW period of the SCL clock
HIGH period of the SCL clock
Set-up time for a repeated START condition
Data hold time:
Data set-up time
Set-up time for STOP condition
fSCL
tBUF
Unit
kHz
μS
tHD;STA
0.6
-
μS
tLOW
tHIGH
1.3
0.6
0.6
0.7 (Note)
700
0.6
-
-
-
-
-
-
μS
μS
μS
μS
ns
μS
tSU;STA
tHD;DAT
tSU;DAT
tSU;STO
All values referred to VIH Min and VIL Max Levels (see Table 2).
(Note) To avoid sending right after the fall-edge of SCL (VIHmin of the SCL signal), the transmitting device should set a hold time of 300ns or more for the SDA
signal.
For 7(tHD;DAT), 8(tSU;DAT), make the setup in which the margin is fully in.
Table 2 Characteristics of the SDA and SCL I/O stages for I2C-bus devices
Parameter
10
11
12
13
14
Symbol
LOW level input voltage:
HIGH level input voltage:
Pulse width of spikes which must be suppressed by the input filter.
LOW level output voltage: at 3mA sink current
Input current of each I/O pin with an input voltage between 0.4V and
4.5V.
tHD;STA
tHD;STA
:2µs
:2us
tHD;DAT
tHD;DAT
:1µs
:1us
VIL
VIH
tSP
VOL1
II
Fast-mode devices
Min
Max
-0.3
+1
2.3
5
0
50
0
0.4
-10
tSU;DAT
tSU;DAT
:1µs
:1us
+10
Unit
V
V
ns
V
μA
tSU;STO
tSU;STO
:2µs
:2us
SCL
SCL
tBUF
tBUF
:4µs
:4us
tLOW
tLOW
:3µs
:3us
tHIGH
tHIGH
:1µs
:1us
SDA
SDA
SCL
: 250 kHz
SCLclock
clockfrequency
frequency:250kHz
Figure 17. I2C Data Transmission Command Timing Diagram
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TSZ02201-0C2C0E100420-1-2
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BD37512FS
(2) I2C BUS FORMAT
S
1bit
MSB
LSB
Slave Address
8bit
S
Slave Address
A
Select Address
Data
P
MSB
LSB
MSB
LSB
A
Select Address
A
Data
A
P
1bit
8bit
1bit
8bit
1bit 1bit
= Start condition (Recognition of start bit)
= Recognition of slave address. The first 7 bits correspond to the slave address.
The least significant bit is “L” which corresponds to write mode.
= ACKNOWLEDGE bit (Recognition of acknowledgement)
= Select address corresponding to volume, bass or treble.
= Data on every volume and tone.
= Stop condition (Recognition of stop bit)
(3) I2C BUS Interface Protocol
(a) Basic Format
S
Slave Address
A
Select Address
A
Data
A
MSB
LSB
MSB
LSB
MSB
LSB
P
(b) Automatic Increment (Select Address increases (+1) according to the number of data.)
Slave Address
A
Select Address
A
Data1
A
Data2
A ・・・・
DataN
A
MSB
LSB
MSB
LSB MSB
LSB MSB
LSB
MSB
LSB
(Example) ① Data1 shall be set as data of address specified by Select Address.
② Data2 shall be set as data of address specified by Select Address +1.
③ DataN shall be set as data of address specified by Select Address +N-1.
S
(c) Configuration Unavailable for Transmission (In this case, only Select Address1 is set.)
S Slave Address A
Select Address1 A Data
A Select Address 2 A Data
MSB
LSB
MSB
LSB MSB LSB
MSB LSB MSB LSB
(Note) If any data is transmitted as Select Address 2 next to data, it is recognized
as data, not as Select Address 2.
A
P
P
(4) Slave Address
MSB
A6
1
A5
0
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TSZ22111・15・001
A4
0
A3
0
A2
0
11/26
A1
0
A0
0
LSB
R/W
0
80H
TSZ02201-0C2C0E100420-1-2
16.Dec.2015 Rev.001
BD37512FS
(5) Select Address & Data
Select
Address
(hex)
Items
Initial setup 1
01
Input Selector
04
Input gain
06
Volume gain
Fader 1ch Front
Fader 2ch Front
Fader 1ch Rear
Fader 2ch Rear
20
28
29
2A
2B
Bass gain
51
Treble gain
57
System Reset
FE
MSB
D7
Advance
d switch
ON/OFF
0
Mute
ON/OFF
1
1
1
1
1
Bass
Boost/
Cut
Treble
Boost/
Cut
1
Data
D6
0
0
0
D5
D4
Advanced switch
time of
Volume/Tone/Fader
0
0
LSB
D3
D2
0
0
0
0
D1
D0
Advanced switch
time of Mute
Input selector
Input Gain
0
0
0
0
0
Volume Attenuation
Fader Attenuation
Fader Attenuation
Fader Attenuation
Fader Attenuation
0
0
Bass Gain
0
0
Treble Gain
0
0
0
0
0
0
1
Advanced switch
Note
1. The Advanced Switch works in the latch part while changing from one function to another.
2. When changing a tone into the cut from the boost, or the cut and the boost, always go via the condition of the
tone 0dB.
3. Upon continuous data transfer, the Select Address rolls over because of the automatic increment function, as
shown below.
→01→04→06→20→28→29→2A→2B→51→57
4. For the function of Input Selector etc, Advanced Switch is not used. Therefore, please apply mute on the set side
when changing these settings.
5. When using mute function of this IC at the time of changing input selector, please switch mute ON/OFF while
waiting for advanced-mute time.
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TSZ02201-0C2C0E100420-1-2
16.Dec.2015 Rev.001
BD37512FS
Select address 01 (hex)
Mode
MSB
D7
0.6msec
1.2msec
2.4msec
4.8msec
Advanced
Switch
ON/OFF
Mode
4.6 msec
9.3 msec
18.6 msec
37.2 msec
Mode
OFF
ON
D6
0
D5
Advanced switch time
of Volume/Tone/Fader
MSB
D7
D6
Advanced
Switch
ON/OFF
0
MSB
D7
0
1
D6
0
Advanced switch time of Mute
D4
D3
D2
D5
0
0
1
1
0
Advanced switch time of
Volume/Tone/Fader
D4
D3
0
1
0
0
1
Advanced switch ON/OFF
D5
D4
D3
Advanced switch time
0
of Volume/Tone/Fader
0
D1
0
0
1
1
LSB
D0
0
1
0
1
LSB
D2
0
D2
0
D1
D0
Advanced switch
Time of Mute
LSB
D1
D0
Advanced switch
Time of Mute
Select address 04(hex)
Mode
A
B
C
D
SHORT
MSB
D7
D6
D5
0
0
0
Input Selector
D4
D3
0
INPUT MUTE
0
D2
0
0
0
1
1
1
1
D1
0
0
1
0
0
1
1
LSB
D0
0
1
0
0
1
0
1
: Initial condition
SHORT : The input impedance of each input terminal is lowered from 100kΩ(TYP) to 6 kΩ(TYP).
(For quick charge of coupling capacitor)
INPUT MUTE : Mute is done at the input signal part of Input Selector.
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TSZ22111・15・001
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TSZ02201-0C2C0E100420-1-2
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BD37512FS
Select address 06 (hex)
Gain
0dB
1dB
2dB
3dB
4dB
5dB
6dB
7dB
8dB
9dB
10dB
11dB
12dB
13dB
14dB
15dB
16dB
17dB
18dB
19dB
20dB
MSB
D7
Mute
ON/OFF
D6
D5
0
0
Input Gain
D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
1
:
:
Prohibition
D4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
0
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
LSB
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
:
1
:
1
:
1
D2
D1
LSB
D0
1
(Note) In case sending prohibited data, 0dB is set.
Mode
OFF
ON
MSB
D7
0
1
D6
D5
0
0
Mute ON/OFF
D4
D3
Input Gain
:Initial condition
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TSZ02201-0C2C0E100420-1-2
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BD37512FS
Select address 20 (hex)
Gain & ATT
0dB
-1dB
-2dB
・
・
・
-38dB
-39dB
-40dB
MSB
D7
D6
1
0
Prohibition
D5
0
0
0
・
・
・
1
1
1
1
Vol Attenuation
D4
D3
0
0
0
0
0
0
・
・
・
・
・
・
0
0
0
0
0
1
0
1
D2
0
0
0
・
・
・
1
1
0
0
D1
0
0
1
・
・
・
1
1
0
0
LSB
D0
0
1
0
・
・
・
0
1
0
1
:
1
1
:
1
1
:
1
1
:
1
1
:
0
1
D2
0
0
0
・
・
・
1
1
1
D1
0
0
1
・
・
・
0
1
1
LSB
D0
0
1
0
・
・
・
1
0
1
:
1
1
(Note) In case sending prohibited data, -40dB is set.
Select address 28, 29, 2A, 2B (hex)
MSB
Gain & ATT
D7
0dB
-1dB
-2dB
・
・
1
・
-61dB
-62dB
-∞dB
D6
0
Fader Attenuation
D4
D3
0
0
0
0
0
0
・
・
・
・
・
・
1
1
1
1
1
1
D5
0
0
0
・
・
・
1
1
1
: Initial condition
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TSZ22111・15・001
15/26
TSZ02201-0C2C0E100420-1-2
16.Dec.2015 Rev.001
BD37512FS
Select address 51, 57 (hex)
MSB
Gain
D7
0dB
1dB
2dB
3dB
4dB
5dB
6dB
7dB
8dB
9dB
10dB
Bass/
11dB
Treble
12dB
Boost
13dB
/cut
14dB
15dB
16dB
17dB
18dB
19dB
20dB
D6
D5
0
0
Bass/Treble Gain
D4
D3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
0
1
0
:
1
1
Prohibition
:
1
1
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
LSB
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
:
1
1
:
1
1
:
0
1
D2
D1
LSB
D0
(Note) In case sending prohibited data, 0dB is set.
Mode
Boost
Cut
MSB
D7
0
1
D6
D5
0
0
Bass/Treble Boost/Cut
D4
D3
Bass/Treble Gain
:Initial condition
(6) About Power ON Reset
Built-in IC initialization is made during power on of the supply voltage. Please send initial data to all addresses
at supply voltage on. And please turn on mute at the side being set until this initial data is sent.
Limit
Parameter
Symbol
Unit
Conditions
Min
Typ
Max
Rise Time of VCC
tRISE
20
µsec VCC rise time from 0V to 3V
-
-
VCC Voltage of Release Power ON
VPOR
4.1
V
-
-
Reset
(7) About External Compulsory Mute Terminal
It is possible to force mute externally by setting an input voltage to the MUTE terminal.
Mute Voltage Condition
Mode
GND to 1.0V
MUTE ON
2.3V to VCC
MUTE OFF
Establish the voltage of MUTE in the condition to be defined.
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TSZ22111・15・001
16/26
TSZ02201-0C2C0E100420-1-2
16.Dec.2015 Rev.001
BD37512FS
Application Information
1. Function and Specifications
Function
Input selector
Input gain
Mute
Volume
Specifications
・Stereo 3 input
・Differential 1 input
・0dB to 20dB
・Possible to use “Advanced switch” for prevention of switching noise.
・0dB to -40dB (1dB step)
・Possible to use “Advanced switch” for prevention of switching noise.
・-20dB to +20dB (1dB step)
Bass
・Q=1
・fo=100Hz
・Possible to use advanced switch at changing gain
・-20dB to +20dB (1dB step)
Treble
・Q=1
・fo=10kHz
・Possible to use advanced switch at changing gain
Fader
・0dB to -62dB(1dB step), -∞dB
・Possible to use “Advanced switch” for prevention of switching noise.
2. Volume / Fader Volume Attenuation Data
(dB)
D7 D6 D5 D4 D3 D2 D1 D0
0
0
0
0
0
0
0
-1
0
0
0
0
0
1
-2
0
0
0
0
1
0
-3
0
0
0
0
1
1
-4
0
0
0
1
0
0
-5
0
0
0
1
0
1
-6
0
0
0
1
1
0
-7
0
0
0
1
1
1
-8
0
0
1
0
0
0
-9
0
0
1
0
0
1
-10
0
0
1
0
1
0
-11
0
0
1
0
1
1
-12
0
0
1
1
0
0
-13
0
0
1
1
0
1
-14
0
0
1
1
1
0
-15
0
0
1
1
1
1
1
0
-16
0
1
0
0
0
0
-17
0
1
0
0
0
1
-18
0
1
0
0
1
0
-19
0
1
0
0
1
1
-20
0
1
0
1
0
0
-21
0
1
0
1
0
1
-22
0
1
0
1
1
0
-23
0
1
0
1
1
1
-24
0
1
1
0
0
0
-25
0
1
1
0
0
1
-26
0
1
1
0
1
0
-27
0
1
1
0
1
1
-28
0
1
1
1
0
0
-29
0
1
1
1
0
1
-30
0
1
1
1
1
0
-31
0
1
1
1
1
1
For Volume attenuation, only 0dB to -40dB are available.
(dB)
-32
-33
-34
-35
-36
-37
-38
-39
-40
-41
-42
-43
-44
-45
-46
-47
-48
-49
-50
-51
-52
-53
-54
-55
-56
-57
-58
-59
-60
-61
-62
-∞
D7
D6
1
0
D5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
D4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
D3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
: Initial condition
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TSZ02201-0C2C0E100420-1-2
16.Dec.2015 Rev.001
BD37512FS
3.
Application Circuit
GND
FIL
SDA
SCL
MUTE
VCC
10μ
OUTF1 OUTF2 OUTR1 OUTR2
0.1μ
10μ
10μ
20
19
18
17
16
15
14
10μ
10μ
13
10μ
12
11
VCC
VCC/2
GND
I2C BUS LOGIC
Fader★
Fader★
Fader★
Fader★
■Fader:0dB~-62dB/1dB
Fader: 0dB to -62dB/1dB -∞-∞
★no pop noise
■2 Band EQ (Tone control)
Gain:
+20dB to -20dB/1dB
Gain:+20dB~-20dB/1dB
★no pop noise
・Bass:f0=100Hz
Q=1.0
・Treble:f0=10kHz
Q=1
★2 Band P-EQ
(Tone control)
Volume: 0dB to -40dB/1dB step
■Volume:0dB~-40dB/1dB
step
★no pop noise
★Volume/Mute
Input Gain:
+20dB to 0dB/1dB step
■Input
Gain:+20dB~0dB/1dB
step
Input Gain
Input selector (3 single-end and 1 stereo ISO)
GND
ISO amp
100k
1
100k
2
2.2μ
Single1
100k
3
2.2μ
100k
4
2.2μ
Single2
100k
5
2.2μ
2.2μ
Single3
50k
100k
6
7
2.2μ
GND
ISO amp
8
2.2μ
50k
50k
9
10μ
Diff1
10
2.2μ
Unit
R : [Ω]
C : [F]
Notes on Wiring
① Please connect the decoupling capacitor of the power supply in the shortest possible distance to GND.
② GND lines shall be one-point connected.
③ Wiring pattern of Digital should be away from that of Analog unit and cross-talk should not be acceptable.
④ SCL and SDA lines of I2C BUS should not be parallel if possible.
The lines should be shielded, if they are adjacent to each other.
⑤ Analog input lines should not be parallel if possible. The lines should be shielded, if they are adjacent to each other.
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TSZ22111・15・001
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16.Dec.2015 Rev.001
BD37512FS
Power Dissipation
About the thermal design of the IC
Characteristics of an IC have a great deal to do with the temperature at which it is used, and exceeding absolute maximum
ratings may degrade and destroy the device. Careful consideration must be given to the heat of the IC from the two
standpoints of immediate damage and long-term reliability of operation.
Reference data
SSOP-A20
Power Dissipation : Pd (W)
1.5
Measurement condition: ROHM Standard board
board Size : 70 x 70 x 1.6(mm3)
material : A FR4 grass epoxy board
(3% or less of copper foil area)
0.94W
1.0
θja = 133.3°C/W
0.5
0.0
0
25
50
75
85
100
125
150
Ambient Temperature : Ta (°C)
Figure 18. Temperature Derating Curve
(Note) Values are actual measurements and are not guaranteed.
Power dissipation values vary according to the board on which the IC is mounted.
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BD37512FS
I/O Equivalent Circuits
Terminal
No.
Terminal
Name
Terminal
Voltage
Equivalent Circuit
Terminal Description
A terminal for signal input.
The input impedance is 100kΩ(typ).
VCC
1
A1
2
A2
3
B1
4
B2
5
C1
6
C2
4.25
100k
GND
A terminal for positive input of ground
isolation amplifier.
The input impedance is 50kΩ(typ).
VCC
7
DP1
9
DP1
25k
4.25
25k
GND
VCC
8
DN
A terminal for negative input of ground
isolation amplifier.
The input impedance is 12.5kΩ(typ).
4.25
12.5k
12.5k
GND
A terminal for external compulsory mute.
If terminal voltage is High level, the mute is
off. And if the terminal voltage is Low level,
the mute is on.
VCC
16
MUTE
1.65V
GND
A terminal for fader and Subwoofer output.
VCC
11
OUTR2
12
OUTR1
13
OUTF2
14
OUTF1
4.25
GND
Values in the pin explanation and input/output equivalent circuit are reference values only and are not guaranteed.
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BD37512FS
I/O Equivalence Circuits - continued
Terminal
No.
Terminal
Name
Terminal
Voltage
Equivalent Circuit
Terminal Description
Power supply terminal.
15
VCC
8.5
A terminal for clock input of I2C BUS
communication.
VCC
17
SCL
-
1.65V
GND
A terminal for data input of I2C BUS
communication.
VCC
18
SDA
-
1.65V
GND
Ground terminal.
19
GND
0
Voltage for reference bias of analog signal
system. The simple precharge circuit and
simple discharge circuit for an external
capacitor are built in.
VCC
50k
20
FIL
4.25
50k
GND
Values in the pin explanation and input/output equivalent circuit are reference values only and are not guaranteed.
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BD37512FS
Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the board size
and copper area to prevent exceeding the Pd rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and
routing of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10.
Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
11.
Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge
acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power
supply or ground line.
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TSZ22111・15・001
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TSZ02201-0C2C0E100420-1-2
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BD37512FS
Operational Notes – continued
12.
Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
E
Pin A
N
P+
P
N
N
P+
N
Pin B
B
Parasitic
Elements
N
P+
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
GND
GND
Parasitic
Elements
GND
Parasitic
Elements
GND
N Region
close-by
Figure 19. Example of monolithic IC structure
13.
About a Signal Input Part
(a) About Input Coupling Capacitor Constant Value
In the input signal terminal, please decide the constant value of the input coupling capacitor C(F) that would be
sufficient to form an RC characterized HPF with input impedance R IN(Ω) inside the IC.
G〔dB〕
C〔F〕
0
RIN
〔Ω〕
A(f)
SSH
f〔Hz〕
INPUT
A f  
2 fCRIN 2
2
1  2 fCRIN 
(b) About the Input Selector SHORT
SHORT mode is the command which makes switch SSH =ON of input selector part so that the input impedance
RIN of all terminals becomes small. Switch SSH is OFF when SHORT command is not selected.
The constant time brought about by the small resistance inside and the capacitor outside the LSI becomes
small when this command is used. The charge time of the capacitor becomes short. Since SHORT mode turns
ON the switch of SSH and makes it low impedance, please use it at no signal condition.
14.
About Mute Terminal(Pin 16) when power supply is OFF
There should be no applied voltage across the Mute terminal (Pin 16) when power-supply is OFF.
A resistor (about 2.2kΩ) should be connected in series to Mute terminal in case a voltage is supplied to Mute terminal.
(Please refer Application Circuit Diagram.)
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BD37512FS
Ordering Information
B
D
3
7
5
1
2
Part Number
F
S
-
Package
FS: SSOP-A20
E2
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagram
SSOP-A20(TOP VIEW)
Part Number Marking
BD37512FS
LOT Number
1PIN MARK
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© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
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BD37512FS
Physical Dimension, Tape and Reel Information
Package Name
SSOP-A20
(Max 9.05 (include.BURR))
(UNIT : mm)
PKG : SSOP-A20
Drawing No. : EX132-5001
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BD37512FS
Revision History
Date
Revision
16.Dec.2015
001
Changes
New Release
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Datasheet
Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
, transport
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.002
Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.002
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001