Silicon Labs White Paper CIP-51 Performance for Standard Library Math Routines Introduction This document summarizes a collection of profiling tests for fixed and floating point math routines using Silicon Labs’ CIP-51 Microcontroller Core. Code was developed using the Keil C51 Compiler and Keil 8051 Library Routines, and executed on a Silicon Labs C8051F005 device. Measurement was performed using an on-chip timer configured to count system clocks. Floating-Point Characterization These tests measured the execution time requirements for various floating-point math functions performed with the CIP-51 Microcontroller Core on a C8051F005 device. A pseudo-random number generator (based on the rand( ) function) was used to generate input parameters; 10,000 samples were taken for each function. Input parameters for the Sin( ), Cos( ), and Tan( ) functions were restricted to the input range -65535 to +65535; inputs for the Sqrt( ), Log10( ) and Log( ) functions were restricted to non-negative numbers; all other function inputs were limited to valid floating-point numbers. Samples were only counted if the result was a valid floating-point number (no overflows). All times are given in system clocks, where one system clock for the CIP-51 equals one oscillator clock and is independent of oscillator frequency. Floating-point routine execution times are inputdependent; the table below lists the minimum, maximum, and mean execution times for the various routines. Each routine profile is detailed with an execution time histogram in the following pages. The x-axis represents each specific execution time; the y-axis represents the number of times that execution time occurred (out of 10,000 input samples). Execution Times for Various Floating-Point Routines (in Oscillator Clocks) Function Mean Minimum Maximum Addition Subtraction Multiplication Division Comparison Square Root 173 179 225 877 113 2650 156 160 98 111 112 2433 320 347 307 1279 162 3004 Rev. 2.1 12/03 Standard 8051 (Mean)† 1284 1356 1368 8244 648 23232 Copyright © 2003 by Silicon Laboratories Speed Increase Factor vs. Standard 8051 (Mean) 7.4 7.6 6.1 9.4 5.7 8.8 Execution Times for Various Floating-Point Routines (in Oscillator Clocks) Standard 8051 Speed Increase Factor vs. Standard 8051 (Mean) (Mean)† Sin 2033 823 5558 35136 17.3 Cos 1852 786 5587 35052 18.9 Tan 3707 1280 8001 59592 16.1 ArcSin 4461 3941 9847 83892 18.8 ArcCos 6513 5832 9883 90936 14.0 ArcTan 1810 734 6126 39840 22.0 Exponential 4245 295 6646 39768 9.4 Natural Log 4692 4208 5175 41184 8.8 Common Log 4931 4448 5376 43284 8.8 †Based on data taken from the Keil C51 User’s Guide v1.97. Statistics in the Keil book are given in CPU machine cycles; the numbers presented here are adjusted to represent the number of oscillator clocks required (1 CPU machine cycle = 12 oscillator clocks for a Standard 8051). Function Mean Minimum Maximum Addition Mean: Min: Max: 173 156 320 Add 4500 4000 Samples (out of 10,000) 3500 3000 2500 2000 1500 1000 500 0 140 2 160 180 200 220 240 260 System Clock Cycles Rev. 2.1 280 300 320 Subtraction 179 160 347 Subtract 4500 4000 3500 Samples (out of 10,000) Mean: Min: Max: 3000 2500 2000 1500 1000 500 0 160 180 200 220 240 260 280 System Clock Cycles Rev. 2.1 300 320 340 360 3 Multiplication Mean: Min: Max: 225 98 307 Multiply 2000 1800 Samples (out of 10,000) 1600 1400 1200 1000 800 600 400 200 0 50 4 100 150 200 250 System Clock Cycles Rev. 2.1 300 350 Division 877 111 1279 Divide 1800 1600 1400 Samples (out of 10,000) Mean: Min: Max: 1200 1000 800 600 400 200 0 0 200 400 600 800 System Clock Cycles Rev. 2.1 1000 1200 1400 5 Comparison (a == b) Mean: Min: Max: 113 112 162 Compare 9000 8000 Samples (out of 10,000) 7000 6000 5000 4000 3000 2000 1000 0 110 6 120 130 140 150 System Clock Cycles Rev. 2.1 160 170 Square Root 2650 2433 3004 SquareRoot 160 140 120 Samples (out of 10,000) Mean: Min: Max: 100 80 60 40 20 0 2400 2500 2600 2700 2800 System Clock Cycles Rev. 2.1 2900 3000 3100 7 Sin Mean: Min: Max: 2033 823 5558 Sin 3500 Samples (out of 10,000) 3000 2500 2000 1500 1000 500 0 8 0 1000 2000 3000 4000 System Clock Cycles Rev. 2.1 5000 6000 Cos 1852 786 5587 Cos 1600 1400 1200 Samples (out of 10,000) Mean: Min: Max: 1000 800 600 400 200 0 0 1000 2000 3000 4000 System Clock Cycles Rev. 2.1 5000 6000 9 Tan Mean: Min: Max: 3707 1280 8001 Tan 1000 900 Samples (out of 10,000) 800 700 600 500 400 300 200 100 0 1000 10 2000 3000 4000 5000 6000 System Clock Cycles Rev. 2.1 7000 8000 9000 ArcSin 4461 3941 9847 Arcsin 7000 6000 Samples (out of 10,000) Mean: Min: Max: 5000 4000 3000 2000 1000 0 3000 4000 5000 6000 7000 System Clock Cycles Rev. 2.1 8000 9000 10000 11 ArcCos Mean: Min: Max: 6513 5832 9883 Arccos 160 140 Samples (out of 10,000) 120 100 80 60 40 20 0 5500 12 6000 6500 7000 7500 8000 8500 System Clock Cycles Rev. 2.1 9000 9500 10000 ArcTan 1810 734 6126 Arctan 4000 3500 3000 Samples (out of 10,000) Mean: Min: Max: 2500 2000 1500 1000 500 0 0 1000 2000 3000 4000 System Clock Cycles Rev. 2.1 5000 6000 7000 13 Exponential Mean: Min: Max: 4245 295 6646 Exponent 600 Samples (out of 10,000) 500 400 300 200 100 0 14 0 1000 2000 3000 4000 System Clock Cycles Rev. 2.1 5000 6000 7000 Natural Log 4692 4208 5175 NaturalLog 70 60 Samples (out of 10,000) Mean: Min: Max: 50 40 30 20 10 0 4200 4300 4400 4500 4600 4700 4800 4900 System Clock Cycles Rev. 2.1 5000 5100 5200 15 Log (Base 10) Mean: Min: Max: 4931 4448 5376 Log10 70 Samples (out of 10,000) 60 50 40 30 20 10 0 4400 16 4500 4600 4700 4800 4900 5000 5100 System Clock Cycles Rev. 2.1 5200 5300 5400 Fixed-Point Characterization These tests measured the execution time requirements for various fixed-point math functions performed with the CIP-51 Microcontroller Core on a C8051F005 device. A pseudo-random number generator (based on the rand( ) function) was used to generate input parameters; 10,000 samples were taken for each function. All times are given in system clocks, where one system clock for the CIP-51 equals one oscillator clock and is independent of oscillator frequency. Note: all 16-bit routines produced a 16-bit result; all 32-bit routines produced a 32-bit result. 16- and 32-bit division routine execution times are input-dependent; the tables below list the minimum, maximum, and mean execution times for each division routine. Each division routine profile is detailed with an execution time histogram in the following pages. The x-axis represents each specific execution time; the y-axis represents the number of times that execution time occurred (out of 10,000 input samples). Execution Times for 16-bit Fixed Math Routines (in Oscillator Clocks) Function Mean Minimum Maximum Standard 8051 (Mean)† Speed Increase Factor vs. Standard 8051 (Mean) Addition 12 12 12 72 6 (signed/unsigned) Subtraction 13 13 13 84 6.4 (signed/unsigned) Multiplication 47 47 47 348 7.4 (signed/unsigned) Division 221 66 252 1692 7.6 (signed) Division 194 41 217 1536 7.9 (unsigned) † Based on data taken from the Keil C51 User’s Guide v1.97. Statistics in the Keil book are given in CPU machine cycles; the numbers presented here are adjusted to represent the number of oscillator clocks required (1 CPU machine cycle = 12 oscillator clocks for a Standard 8051). Execution Times for 32-bit Fixed Point Math Routines (in Oscillator Clocks) Function Mean Minimum Maximum Standard 8051 (Mean)† Speed Increase Factor vs. Standard 8051 (Mean) Addition 24 24 24 144 6 (signed/unsigned) Subtraction 25 25 25 156 6.2 (signed/unsigned) Multiplication 141 141 141 1272 9.0 (signed/unsigned) Division 359 334 795 6768 18.8 (signed) Division 331 309 770 5964 18.0 (unsigned) †Based on data taken from the Keil C51 User’s Guide 1.97. Statistics in the Keil book are given in CPU machine cycles; the numbers presented here are adjusted to represent the number of oscillator clocks required (1 CPU machine cycle = 12 oscillator clocks for a Standard 8051). Rev. 2.1 17 Signed 16-bit Division Mean: Min: Max: 221 66 252 Division,16x16->16 4500 4000 Samples (out of 10,000) 3500 3000 2500 2000 1500 1000 500 0 60 18 80 100 120 140 160 180 System Clock Cycles Rev. 2.1 200 220 240 260 Unsigned 16-bit Division 194 41 217 Division,16x16->16 5000 4500 4000 Samples (out of 10,000) Mean: Min: Max: 3500 3000 2500 2000 1500 1000 500 0 40 60 80 100 120 140 160 System Clock Cycles Rev. 2.1 180 200 220 19 Signed 32-bit Division Mean: Min: Max: 359 334 795 Division,32x32->32 5000 4500 Samples (out of 10,000) 4000 3500 3000 2500 2000 1500 1000 500 0 300 20 350 400 450 500 550 600 System Clock Cycles Rev. 2.1 650 700 750 800 Unsigned 32-bit Division 331 309 770 Division,32x32->32 5000 4500 4000 Samples (out of 10,000) Mean: Min: Max: 3500 3000 2500 2000 1500 1000 500 0 300 350 400 450 500 550 600 System Clock Cycles Rev. 2.1 650 700 750 800 21 Contact Information Silicon Laboratories Inc. 4635 Boston Lane Austin, TX 78735 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Email: [email protected] Internet: www.silabs.com The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where personal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized application, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. 22 Rev. 2.1

- Similar pages