C8051T6xx/3xx One Time Programmable (OTP) USB MCUs

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C8051T6xx/3xx One Time
Programmable (OTP) USB MCUs
Agenda
 C8051T6xx/3xx family overview
 C8051T6xx/3xx family differences from flash-based devices
 OTP development flow
 Other considerations
 Development tools
 Summary
2
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USB OTP Device Family
Introducing the C8051T62x/32x
 Reduce cost, simplify design and shorten development time




USB crystal-less operation capability
Best-in-class analog capabilities five times faster than any competitor
Accomplish more work in less time with a high performance processing core
OTP versions for very cost-sensitive applications
 Accelerate time-to-market
 Production-ready software drivers
 Step-by-step application notes and code
examples
 Easy-to-use development tools
 Pin and code compatible enabling an easy migration path
 OTP C8051T32x is compatible with Flash-based C8051F32x enabling a cost
reduction path
4
USB Design Challenges
 Typical USB microcontrollers lack high-precision analog capabilities
creating a more complex and expensive system solution
 Higher BOM cost: external components are required
 Significant hardware and software design effort
 Most applications require more than just USB connectivity
 Most MCUs are designed to enable only USB connectivity
 Multi-tasking operation can quickly saturate CPU performance
 Competitive limitations
 External analog components are required increasing BOM cost and complexity
 Expensive high-end or chip set solutions are implemented to overcome performance
bottleneck
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OTP and Flash Device Differences
C8051T62x/32x vs. C8051F34A
Code Memory Storage
 Flash memory used on C8051F34A family
 Byte-programmable EPROM code memory on the C8051T62x/32x
families
 When pre-fetch engine is enabled (default) timing is similar to flash devices
 Porting considerations
• Insure no firmware routines exist to erase code memory
• In application firmware can write to memory, but only once
 Add a 4.7 uF capacitor to enable programming the VPP pin to ground
• C8051T62x and C8051T32x devices
Feature
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C8051F34A
C8051T62x/32x
Code memory can be erased and reprogrammed
Yes
No
Programming voltage (VPP) required to program code memory
No
Yes
Code memory can be erased from firmware on the device
Yes
No
Code memory can be written from firmware on the device
Yes
Code memory can be read from firmware on the device
Yes
Special Function Registers (SFR) (1 of 2)
 Differences related to
functionality and features
 SFRs can exist in one family and
not another
 Reading and writing these registers
does not cause any problems if not
present
 Porting considerations
• None
 Example: P3 register is not found in
the C8051T622 and is on the F34A
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Special Function Registers (SFR) (2 of 2)
 Some registers have additional
bits defined
 Peripheral behavior remains
unchanged if the default settings are
used
 Porting considerations
• To maintain functionality verify that
default bit settings are used for
additional bits in common registers
 Example:
• REF0CN register adds REFBGS to
halve the ADC reference voltage
• Default setting maintains functionality
with the C8051F34A
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Analog Considerations
 ADC sample rate increase to 500 ksps
 SAR clock increased to 8.33 MHz
 Gain setting of 0.5x now available
 Single ended inputs only
 External conversion start timing
provides additional options
ADC Diagram
ADC CNVSTR Timing
10
Analog Considerations
 More voltage reference options
 Calibrated temperature sensor
 Porting considerations
 AMX0CN register should always be written as 11111b
 Default register settings for the reference selection maintain functionality
 Temperature sensors have different transfer functions and firmware should be adjusted
accordingly
VREF Diagram
11
Supply Voltage Considerations (1 of 2)
 Process technology change and second voltage regulator added
 VDD output now 3.45 V instead of 3.3 V
 Second regulator provides 1.8 V
• Additional registers to support the regulator functionality (REG01CN)
• Can be placed in a low power mode
 VIO pin added on some devices in case the port input/output voltages are
required to be different from the VDD that the device is operating
 VDD monitor threshold voltage changes
 Porting considerations
• None for firmware, but care must be observed for electrical connections
Feature
C8051F34A
C8051T63x/32x
Supply voltage range
2.7–3.6 V
1.8–3.6 V
3.3 V regulator for VDD
Yes
No
3.45 V regulator for VDD
No
Yes
1.8 V regulator for internal core voltage
No
Yes
5.8 V
*VDD + 3.6 V (5.8V max)
Maximum voltage on any I/O pin
*If supply voltage reduced to 0 V then voltage at the pin must be less than 3.6 V
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Supply Voltage Considerations (2 of 2)
 VIO considerations
 VIO ≤ VDD
 Not all packages have a VIO pin
 Reset can be pulled up to VDD
 VPP considerations
 When using in-application programming (IAP) a 4.7 uF capacitor is required on
the VPP pin
 It is not recommended to use the VPP pin as GPIO if IAP to be used
• If GPIO and IAP are required then the external circuit on the pin must not provide a
load when the programming is enabled
VBUS
1.0 µF
0.1 µF
VREGIN
1.0 µF
VDD
VIO
0.1 µF
VPP
4.7 µF
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Typical Connections
Low Power Modes and Clocking
 Suspend mode operation turns off the internal oscillator
 C8051F34A requires USB resume signaling or VBUS interrupt to exit suspend
 C8051T62x/32x devices exit suspend using
• Resume signaling or VBUS interrupt
• Port match
• Timer 3 if running from external oscillator or the low frequency internal oscillator
 Clocking options vary between devices
 Porting considerations
• CLKMUL register remains across all devices for compatibility even though the internal
oscillator is used to drive the USBCLK directly
Feature
14
C8051F34A
C8051T62x
Internal calibrated 24.5 MHz oscillator (divided by 1, 2, 4 or 8)
Yes
No
Internal calibrated 48 MHz oscillator (divided by 1,2,4 or 8)
No
Yes
Internal 80 kHz oscillator (divided by 1, 2, 4 or 8)
Yes
Yes
External CMOS clock (digital input)
Yes
Yes
External oscillator in RC or capacitor mode
Yes
Yes
External oscillator in crystal oscillator mode
Yes
Yes
Additional Features
 SMBus/I2C
 Optional hardware address
recognition and automatic ACK
• Reduces firmware overhead
 Port match
 Allows system events to be triggered
by a logic value change on a port pin
 Can generate interrupts
 Can wake the device from suspend
mode
 PCA
 Includes 9, 10 and 11 bit PWM
generation
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Developing USB OTP Applications
The C8051T62x/32x Development Kit
 Kit contents for C8051T620 and C8051T622
 C8051T62x motherboard
 C8051T62x emulation daughter board with C8051F34A installed
 Socket daughter board (one of the following):
• C8051T62x QFN 32-pin (C8051T620DK)
• C8051T622 QFN 24-pin (C8051T622DK)
 Twenty device samples (one of the following):
• C8051T620-GM (C8051T620DK)
• C8051T622-GM (C8051T622DK)
 C8051Txxx development kit quick-start guide
 Product information CD-ROM includes:
•
•
•
•
Silicon Labs Integrated Development Environment (IDE)
Evaluation version of 8051 development tools (macro assembler, linker, C compiler)
Source code examples and register definition files
Documentation
 AC-to-DC universal power adapter
 Two USB cables
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Required Software
 Required software
 Silicon Labs IDE or 3rd party IDE
 C compiler—code limited evaluation versions supplied with the kit
 Recommended software




Configuration wizard—Configuration Wizard 2
Virtual com port (VCP) drivers
ToolStick Terminal
uVision driver for Keil if using the uVision IDE
Software can be downloaded at
http://www.silabs.com/mcudownloads
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Using the Kits
Attaching a Daughter Card
 Development can start using the flash-based C8051F34A
 Plug the C8051T62x EDB emulation daughter board into the motherboard
sockets P1 and P2 (C8051T62x EDB has the C8051F34A device)
Using the C8051F34A for Development
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Making Mother Board Connections
 Verify jumper settings with the DK user’s guide
 Connect USB cable to the mother board P5
 Provides code download and debug capability
 Provides interface to targets UART peripheral if enabled using J11
 Connect the AC/DC power adapter to the barrel plug P3
AC/DC supply
connection
USB debug
connection
Default jumper
settings are
highlighted
21
Using the C8051F34A for Development
Verify Tool Flow
 Build a sample project
 Open T620_Blinky_C.wsp project using the Silicon Labs IDE
• Found in the C:\Silabs\MCU\Examples\C8051T620_1_T320_3 directory
 Build, connect, download and run the project
2
4
Connect
Run
5
Build
1
Stop
Download
3
Note we are using the
C8051F34A target board
22
Silicon Labs IDE
Blinking the LED
 When the application is running LED1 should be blinking
 Code can be modified and downloaded multiple times using the C8051F34A
Running the Test Application
23
Developing the Application
 Make modifications to the example code to provide the required
system functionality (recommended) or write the application from
scratch
 Using the flash-based C8051F34A many code iterations can be
done without having to burn the code into the OTP device
 Since OTP devices can only be programmed once they would have to be
discarded after each code test
Modify Code
Modify Code
Program
Program
Test
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Flash Code Flow
Test
OTP Code Flow
Porting the Application to the OTP Device
 Once the application code has been completed on the flash-based
MCU migrate the project to the OTP version
 Make necessary porting changes based on MCU differences
 USB clock recovery step size
Flash Code Flow
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Clock Recovery Port Example
OTP Code Flow
Using the Oscillator
 Internal oscillator is now 48 MHz instead of 12 MHz
 For backward compatibility the clock multiplier registers remain
although they provide no functionality
Code remains from the C8051F34A. It can
be removed when using the C8051T62x.
26
Applications with an ADC
 Voltage reference options can be optimized for dynamic range
 C8051T62x/32x is single ended and doesn’t have a mux for the negative
input
 SAR clock can remain the same or can be increased for faster sample rates
Flash Code Flow
OTP Code Flow
ADC Example
27
Measuring Temperature
 Temperature sensor measurements differ between the two families
 Transfer function of the temperature sensors is different
 OTP devices have temperature compensation at 0 ˚C using VDD
•Compensation value stored
in code memory
ADC uses VDD as VREF
Mux input set to temp sensor
•Firmware uses the new slope, offset and
compensation to determine temperature
OTP Code Flow
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Change the Daughter Card
 Once code porting has been completed
 Attach the C8051T620 SKT DB daughter card into the motherboard sockets P1
and P2
• C8051T62x QFN SKT DN has a socket for the specific device package
• Sample devices provided in the kit
Place one of the samples in
the socket and verify that the
pin 1 designations match
29
Attaching the C8051T62x Daughter Card
Build, Download and Run the Application
 Test the OTP application
 Build, connect, download and run the project
2
4
Connect
Run
5
Build
1
Stop
Download
3
Note we are using the
C8051T620 target board
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Silicon Labs IDE
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Development Tools
C8051T620DK Development Kit
 C8051T620DK Development Kit
 Enables real-time code development and
evaluation of the C8051T620 product family
 Includes:
•
•
•
•
•
•
•
•
•
Motherboard
Daughter and socket boards
Quick start guide
Integrated development environment (IDE)
USB debug adaptor
Wall power adaptor
USB cables
20 C8051T620-GM samples
Complete documentation
 The C8051T620DB32, C8051T320DB32
and C8051T321DB28 socket daughter cards
are sold separately
• Can be used in conjunction with the
C8051T620DK to program the T62x parts
• Each card is available for $25.00 USD (MSRP)
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F340
CP2201
C8051T620DK Development Kit
The C8051T620DK Development Kit is
available for $129.00 USD (MSRP)
C8051T622DK Development Kit
 C8051T622DK Development Kit
 Enables real-time code development and
evaluation of the C8051T622 product family
 Includes:
•
•
•
•
•
•
•
•
•
Motherboard
Daughter and socket boards
Quick start guide
Integrated development environment (IDE)
USB debug adaptor
Wall power adaptor
USB cables
20 C8051T622-GM samples
Complete documentation
 The C8051T326DB28 and C8051T327DB28
socket daughter cards are sold separately
• Can be used in conjunction with the
C8051T620DK to program the T62x parts
• Each card is available for $25.00 USD (MSRP)
33
F340
CP2201
C8051T622DK Development Kit
The C8051T622DK Development Kit is
available for $129.00 USD (MSRP)
Available Documentation and Software
 Product data sheets available (www.silabs.com/USB)
 Data shorts available (www.silabs.com/USB)
 Example code included on IDE installation (www.silabs.com/MCUdownloads)
 USBXpress drivers (www.silabs.com/USBXpress)
 Application Notes available (www.silabs.com/USB)


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AN169
AN200
AN220
AN249
AN368

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AN455
AN456
AN456
AN532
USBXpress programmer’s guide
USB boot loader with shared USBXpress library
USB driver customization
Human interface device tutorial
Difference between the C8051F34A and the C8051T62x and
C8051T32x device families
Porting code for C8051F320/1 devices to C8051T320/1 devices
Porting code for C8051F326/7 devices to C8051T326/7 devices
Porting code for C8051F326/7 to C8051T326/7 devices
HID library API specification
 Best-in-class product support and comprehensive software ecosystem
 Silicon Labs offers free vendor PID (www.silabs.com/products/mcu/Pages/request-PID.aspx)
 Pre-programming services
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Summary
Summary
 Silicon Labs USB solutions are designed to reduce cost, simplify design
and shorten development time




Best-in-class analog capabilities five times faster than any competitor
Accomplish more work in less time with a high performance processing core
USB crystal-less operation capability
OTP versions for cost sensitive applications
 22 new products supported by a comprehensive development ecosystem
 Production-ready software
 Step-by-step application notes and code examples
 Easy-to-learn development tools
 Pin and code compatible enabling an easy migration path
 C8051F38x is pin and code compatible with the C8051F34x
 OTP C8051T32x is compatible with flash-based C8051F32x enabling a cost reduction
path
36
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www.silabs.com/USB
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