Datasheet Download

Digital Sound Processors for FPD TVs
32bit Audio DSP
No.12083EAT03
BU9409FV
●General Description
It is a digital audio sound processor used for thin TV. Digital signal processor is Rohm original DSP only for TV
sound signal processing, and it’s cost performance is excellent. Digital inputs are two lines. Output is digital output
corresponding to 2.1ch or play of sub-voice L/R signal.
●Features
■DSP Part
Data width:
32bit (Data RAM)
Quickest machine cycle:40.7ns (512fs,fs=48kHz)
Multiplier:
32 x 24 → 56bit
Adder:
32 + 32 → 32bit
Data RAM:
256 x 32bit
Coefficient RAM:
128 x 24bit
Sampling frequency: fs=48kHz
Master clock:
512fs
（24.576MHz,fs=48kHz）
■Input output I/F
2 stereo digital signal input port : 16/20/24bit (I2S,left-align,right-align)
2 stereo digital signal output port : 16/20/24bit (I2S,left-align,right-align), S/PDIF output
■Sound signal processing function for TV
Prescaler, DC cut HPF, channel mixer, P2Volume(Perfect Pure Volume),BASS,MIDDLE,
TREBLE, pseudo stereo, surround, P2Bass, P2Treble, 7 band parametric equalizer,
master volume, L/R balance, postscaler, output clipper, subwoofer output processing
（P2Volume，P2Bass，P2Treble are Rohm original sound effect functions.）
●Applications
Flat Panel TVs (LCD, Plasma)
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© 2012 ROHM Co., Ltd. All rights reserved.
1/54
2012.03 - Rev.A
Technical Note
BU9409FV
●Absolute maximum rating（Ta=25°C）
Item
Power-supply voltage
Allowable dissipation
operating temperature range
Storage temperature range
*1
Symbol
VDD
Pd
Topr
Tstg
Rating
4.5
700 (*1)
-25～+85
-55～+125
Unit
V
mW
°C
°C
Symbol
VDD
Rating
3.0～3.6
Unit
V
7mW is decreased for 1°C when using it with Ta=25°C or more.
Operation can’t be guaranteed.
●Operating condition（Ta=-25～+85°C）
Item
Power-supply voltage
* 1 It isn’t Radiation-proof designed for the product.
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© 2012 ROHM Co., Ltd. All rights reserved.
2/54
2012.03 - Rev.A
Technical Note
BU9409FV
●Electrical Characteristics(Digital serial)
VDD=3.3V unless specified, Ta=25°C
Item
Rating value
Standard
Hysteresis
H Level voltage
Input voltage
L Level voltage
Input current
Pull-up resistor input L current
Symb
ol
VIH
VIL
II
IIL
2.5
-1
-150
-100
0.8
+1
-50
V
V
µA
µA
VIN=0～3.3V
VIN=0V
Adaptive
terminal
*1,2,3
*1,2,3
*1
*2
Pull-down resistor input H current
H Level voltage
Output voltage
L Level voltage
IIH
VOH
VOL
35
2.75
-
70
-
105
0.55
µA
V
V
VIN=3.3V
IO=-0.6mA
IO=0.6mA
*3
*4
*4
SDA terminal
Output voltage
VOL
-
-
0.4
V
IO=3mA
*5
L Level voltage
Min.
Max.
Unit
Terms
Adaptive terminal
*1
CMOS hysteresis input terminal
SCLI(8pin), SDAI(9pin), MODE(20pin)
*2
Pull-up resistor built-in CMOS hysteresis input terminal
LRCKI(2pin), SDATA1(3pin), SDATA2(4pin), MCLK(39pin), BCKI(40pin)
*3
Pull-down resistor built-in CMOS hysteresis input terminal
RESETX(5pin), MUTEX_SP(6pin), MUTEX_DAC(7pin), ADDR(21pin)
*4
CMOS output terminal
SPDIFO(22pin), SDAO(28pin), SCLO(29pin), MUTEX_DACO(30pin), MUTEX_SPO(31pin),
RESETXO(32pin), DATAO2(33pin), DATAO1(34pin), LRCKO(35pin), BCKO(36pin), SYSCKO(37pin)
*5
Open drain output terminal
SDAI(9pin)
Electric characteristic(Analogue serial)
VDD=3.3V Unless specified, Ta=25°C,RL=10kΩ, VC standard
Rating Value
Item
Symbol
Min
Standard
whole
Circuit current
IQ
15
Regulator part
Output voltage
VREG
1.3
1.5
PLL part
Lock frequency
FLK8
24.576
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© 2012 ROHM Co., Ltd. All rights reserved.
3/54
Max
Unit
30
mA
1.7
V
-
MHz
Object pin/Condition
VDD
IO=100mA
256fs(fs=48kHz) input
2012.03 - Rev.A
Technical Note
BU9409FV
BCKI
MCLK
VSS3
SYSCLKO
BCKO
LRCKO
SDATAO1
SDATAO2
RESETXO
MUTEX_SPO
MUTEX_DACO
SCLO
SDAO
N.C.
N.C.
N.C.
N.C.
N.C.
SPDIFO
ADDR
●Block diagram
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
CLK
DSP
SP
Conv.
TEST
PLLA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
LRCKI
SDATA1
SDATA2
RESETX
MUTEX_SP
MUTEX_DAC
SCLI
SDAI
VSS１
DVDDCORE
REG15
LDOPOFF
ANATEST
VDD
N.C.
N.C.
PLLFIL
LDO15
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© 2012 ROHM Co., Ltd. All rights reserved.
4/54
19
20
MODE
I2C
IF
N.C.
Control
IF
VSS２
I2S
IF
2012.03 - Rev.A
Technical Note
BU9409FV
●Pin Description(s)
-
No.
21
Name
ADDR
D
D
D
B
B
B
F
E
G
G
22
23
24
25
26
27
28
29
30
31
32
33
SPDIFO
N.C
N.C
N.C
N.C
N.C
SDAO
SCLO
MUTEX_DACO
MUTEX_SPO
RESETXO
SDATAO2
Type
Description of terminals
I2C Slave address selection B
terminal
C
S/PDIF Signal output
C
2 line serial data output（*1）
C
2 line serial clock output（*1）
C
DAC mute signal output(*1)
C
SP mute signal output(*1)
C
Reset signal output(*1)
C
I2S Audio data output 2
G
Filter connection terminal for G
PLL
Digital I/O GND
A
Test mode selection input
34
35
36
37
38
SDATAO1
LRCKO
BCKO
SYSCLKO
VSS3
I2S Audio data output 1
I2S Audio LR signal output 1
I2S Audio clock output 1
System clock output（*1）
Digital I/O GND
C
C
C
C
-
39
40
MCLK
BCKI
Master clock input
I2S Audio clock input
H
D
No.
1
Name
N.C
Description of terminals
(*2)
2
3
4
5
6
7
8
9
10
11
12
13
LRCKI
SDATA1
SDATA2
RESETX
MUTEX_SP
MUTEX_DAC
SCLI
SDAI
VSS1
DVDDCORE
REG15
LDOPOFF
14
15
16
17
18
ANATEST
VDD
N.C
N.C
PLLFIL
I2S Audio LR signal input
I2S Audio data input 1
I2S Audio data input 2
Reset status with “L”
DAC mute signal input(*1)
SP mute signal input(*1)
I2C Forwarding clock input
I2C Data input output
Digital I/O GND
Connect to REG15 terminal
Built-in regulator voltage output
Built-in regulator POFF signal
input
Analog test monitor terminal
Digital I/O power supply
19
20
VSS2
MODE
Type
N.C.：Non Connection
(*1)：signal terminal is used with D class amplifier IC (BD5446EFV etc.) for input I2S made by Rohm.
(*2) ：It connects with the lead frame of a package. Please use by OPEN or GND connection.
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© 2012 ROHM Co., Ltd. All rights reserved.
5/54
2012.03 - Rev.A
Technical Note
BU9409FV
●Terminal equal circuit figure
A
B
C
VDD
VDD
VDD
VSS
VSS
VSS
D
E
F
VDD
VSS
VSS
VSS
G
H
VDD
VSS
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© 2012 ROHM Co., Ltd. All rights reserved.
VDD
VSS
6/54
2012.03 - Rev.A
Technical Note
BU9409FV
1.Command interface
I2C bus method is used in command interface with host CPU on BU9409FV.
In BU9409FV, not only writing but read-out is possible except for some registers.
Besides the slave address in BU9409FV, one byte select address can be Specified, written and readout.
2
The format of I C bus slave mode is shown below.
S
MSB
LSB
Slave Address
A
MSB
Select Address
LSB
MSB
Data
A
LSB
A
P
S: Start condition
Slave Address:
Putting up the bit of read mode (H") or write mode (L") after slave address (7bit) set with ADDR,
the data of eight bits in total will be sent. (MSB first)
A: The acknowledge bit in each byte adds into the data when acknowledge is sent and received.
When data is correctly sent and received, "L" will be sent and received.
There was no acknowledge for "H".
Select Address: 1 byte select address is used in BU9409FV. (MSB first)
Data: Data-byte, data(MSB first)sent and received
P: Stop Condition
MSB
SDA
6
5
LSB
SCL
Start Condition
When SDA↓ , SCL=”H”
Stop Condition
When SDA↑ , SCL=”H”
1-1. Data writing
S
Slave Address
A
Select Address
A
Data
A
: From master to slave
ADDR=0
MSB
A6
A5
1
0
A4
0
A3
0
A2
0
A1
0
A0
0
LSB
R/W
0
ADDR=1
MSB
A6
A5
1
0
A4
0
A3
0
A2
0
A1
0
A0
1
LSB
R/W
0
A Select Address
20h
A
S Slave Address
(example)
80h
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© 2012 ROHM Co., Ltd. All rights reserved.
Data
: From slave to master
Setting of BU9409FV slave address
Terminal setting
Write-mode
Slave-address
ADDR
0
80h
1
82h
A Data
00h
00h
: From master to slave
7/54
P
A
Data
A
P
00h
: From slave to master
2012.03 - Rev.A
Technical Note
BU9409FV
Writing procedure
Step
Clock
Master
1
Slave(BU9409FV)
Note
Start Condition
2
7
Slave Address
3
1
R/W (0)
4
1
5
8
6
1
7
8
8
1
&h80 (&h82)
Acknowledge
Select Address
Writing object register
8 bit
Acknowledge
Data
Writing data
8 bit
Acknowledge
9
Stop Condition
- The select address add +1 by auto increment function when the data is transferred continuously.
Repeat of Step 7~8.
1-2. Data readout
First of all, the readout target address(ex.&h20h) is written in &hD0 address register at the time of readout.
In the following stream, data is read out after the slave address. Please do not return the acknowledge when ending the
reception.
S
Slave Address
（example）
S
A
Req_Addr
80h
D0h
Slave Address
（example）
A
A
Data 1
81h
A
P
20h
A
**h
： Master to slave，
Select Address
Data 2
A
A
： Slave to master，
Ā
Data N
**h
P
**h
A：With acknowledge，
Ā：without acknowledge
Readout Procedure
Step
Clock
1
Master
Slave(BU9409FV)
Start Condition
2
7
Slave Address
3
1
R/W (0)
4
1
5
8
6
1
7
8
8
1
9
1
Stop Condition
10
1
Start Condition
11
7
Slave Address
12
1
R/W (1)
&h80 (&h82)
Acknowledge
Address for I2C readout &hD0
Req_Addr
Acknowledge
Select Address
Readout object register
8 bit
Acknowledge
&h81 (&h82)
13
1
Acknowledge
14
8
Data
15
1
16
Note
Readout data
8 bit
Acknowledge
Stop Condition
○ The select address adds +1 by auto increment function when continuous data is transferred.
Repeat Step14~15.
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© 2012 ROHM Co., Ltd. All rights reserved.
8/54
2012.03 - Rev.A
Technical Note
BU9409FV
1-3. Control signal specification
○ Bus line, I/O stage electrical specification and timing.
SDAI
t
BUF
tF
tLOW
tHD;STA
tR
SCLI
t
HD;STA
P
tHIGH
t
HD;DAT
tSU;DAT
tSU;STA
S
tSU;STO
Sr
P
Fig.1-1: Timing chart
Table 1-1:
SDAI and SCLI bus-line characteristic (Unless specified, Ta=25 , Vcc=3.3V)
Parameter
1
2
3
4
5
Code
between
Max.
0
400
kHz
BUF
1.3
－
μs
HD;STA
0.6
－
μs
LOW
1.3
－
μs
HIGH
0.6
－
μs
SU;STA
0.6
－
μs
HD;DAT
1)
－
μs
－
ns
fSCL
"Stop"
condition
and
"Start"
t
condition
"Start" condition of hold-time (resending). After this period,
Unit
Min.
SCLI clock frequency
Bus-free-time
High-speed mode
t
the first clock-pulse is generated.
LOW status hold-time of SCLI clock
t
HIGH status hold-time of SCLI clock
t
Setup time of resending “Start” condition
t
7
Data-hold-time
t
8
Data-setup time
t
9
Rising time of SDAI and SCL signal
t
R
20+Cb
300
ns
Fall time of SDAI and SCL signal
t
F
20+Cb
300
ns
SU;STO
0.6
－
μs
Cb
－
400
pF
6
10
11
Setup time of "Stop" condition
12
Capacitive load of each bus-line
t
SU;DAT
0
500/250/15
0
The above-mentioned numerical values are all the values corresponding to VIH min and VIL max level.
1)
To exceed an undefined area on falling edged of SCLI, transmission device should internally offer the hold-time of
300ns or more for SDAI signal(VIH min of SCLI signal).
2)
Data-setup time changes with setup of MCLK. In MCLK=512fs, data setup time is 150ns.
In MCLK=256fs, data setup time is 250ns. In MCLK=128fs, data setup time is 500ns.
The above-mentioned characteristic is a theory value in IC design and it doesn't be guaranteed by shipment inspection.
When problem occurs by any chance, we talk in good faith and correspond.
Neither terminal SCLI nor terminal SDAI correspond to 5V tolerant. Please use it within absolute maximum rating 4.5V.
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© 2012 ROHM Co., Ltd. All rights reserved.
9/54
2012.03 - Rev.A
Technical Note
BU9409FV
2.Switching of data and clock
I/O system chart of BU9409FV audio data is shown below.
DSP CLK
(512fs)
SEL1
Digital
input1
Digital input1
SDATA1
S-P
conversi
on1
Digital
input2
Digital input2
SDATA2
S-P
conversi
on2
SEL2
DSP operation part
This part is performanced by hardware.
Main Bass
Treble
Func.
Main
P-EQ
EVR
Sub
Main
Sub
P-S
Convers
ion1
SDATAO1(Main)
D Class amp output
(Main SP)
P-S
Convers
ion2
SDATAO2(Sub)
D Class amp output
(Sub Woofer)
P-S
Convers
ion3
SEL3
plla_
div
SPDIFO
Optical output
PLLA
ADDR
MODE
RESET
I2C
Audio DSP
(BU9409FV)
MCLK
SYSCLKO
(256fs)
Control I/F
mclk_
div
・・・
BU9409FV has 2 digital stereo input and 3 digital stereo output with the same sampling rate.
Output from DSP operation part is converted into I2S mode digital output or S/PDIF mode digital serial output.
System clock uses master clock input from MCLK terminal, makes 512fs multiplying clock in PLL block. Moreover, 256fs
synchronous clock can be output from terminal SYSCLKO, and the clock is supplied to external DAC or D class SP
amplifier.
SPDIFO and output data selection of SDATAO1 and SDATAO2 should unify the DSP processing after (post) or processing
before (pre) with all outputs.
2-1. S-P conversion1 input data selection(SEL1)
Default = 0
Select Address
Value
Operating Description
&h03 [ 0 ]
0
Input data from SDATA1
1
Input data from SDATA2
2-2. S-P conversion2 input data selection(SEL1)
Default = 0
Select Address
Value
Operating Description
&h03 [ 4 ]
0
Input data from SDATA1
1
Input data from SDATA2
2-3. Output data selection(SEL2) to P-S conversion1 (SDATAO1 Terminal)
Default = 0
Select Address
Value
&h04 [ 1：0 ]
0
Main data output after DSP is processed.
1
Sub data output after DSP is processed.
2
Main data output before DSP is processed.
3
Sub data output before DSP is processed.
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© 2012 ROHM Co., Ltd. All rights reserved.
Operating Description
10/54
2012.03 - Rev.A
Technical Note
BU9409FV
2-4. Output data selection(SEL2) to P-S conversion2 (SDATAO2 Terminal)
Default = 0
Select Address
Value
Operating Description
&h04 [ 5：4 ]
0
Sub data output after DSP is processed.
1
Main data output after DSP is processed.
2
Sub data output before DSP is processed.
3
Main data output before DSP is processed.
2-5. SPDIFO Terminal output data selection（SEL2）
Default = 0
Select Address
Value
&h05 [ 1：0 ]
0
Main data output after DSP is processed.
Operating Description
1
Sub data output after DSP is processed.
2
Main data output before DSP is processed.
3
Sub data output before DSP is processed.
2-6. System clock selection（SEL3）
Select the DSP clock supplied to S-P conversion1、S-P conversion2、DSP、P-S conversion1、P-S conversion2、S/PDIF
output part.
Default = 0
Select Address
Value
&h08 [ 5：4 ]
0
Chose the input from a MCLK terminal as a clock.
1
Chose the PLL output as a clock.
2
3
Operating Description
Chose the input from a SDATA2terminal as a clock. (used for IC test).
After power on or reset released, system block selection uses clock(even if not 512fs is ok) input from terminal MCLK to
receive I2C command and initialize BU9409. Then set the dividing frequency ratio of PLL block (mclk_div, pll_div) that is
suitable for the clock frequency from terminal MCLK , when PLL_512fs clock from PLL is steady, set &h08 = 10h.
2-7. Dividing frequency ratio setting of PLL block which corresponding to input clock from terminal MCLK
Sampling rate of input clock
Setting of mclk_div
Setting of pll_div
PLL initialization
&hF3
&hF5
&hF6
512fs（24.576MHz、fs=48kHz）
10h
01h
23h
256fs（12.288MHz、fs=48kHz）
08h
01h
23h
128fs（6.144MHz、fs=48kHz）
04h
01h
23h
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© 2012 ROHM Co., Ltd. All rights reserved.
11/54
2012.03 - Rev.A
Technical Note
BU9409FV
3.
S-P Conversion 1, S-P Conversion 2
BU9409FV has two serial-parallel conversion circuits. （S-P conversion 1, S-P conversion 2）
S-P conversion 1 & 2 receives the audio data of three-wire serial input from terminal and converts it into parallel data.
They select the inputs from LRCKI (2pin), BCKI (40pin), SDATA1 (3pin), and SDATA2(4pin).
Input format has IIS method, left-justified method and right-justified method. Moreover, for bit clock frequency, 64fs or 48fs
can be selected, and when 48fs is selected, the input format becomes the fixed right-justification. In addition, 16bit, 20bit and
24bit inputs can be selected respectively.
Timing chart of each transmission method is shown in the diagram below.
IIS method
IIS方式
LRCKI
BCKI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
MSB
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1
LSB
S
DATAI
2
3
4
5
6
7
8
9
10
11
12
13
14
15
MSB
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
LSB
S
16bit
16bit
20bit
20bit
24bit
24bit
Left-justified method
左詰方式
LRCKI
BCKI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
MSB
DATAI
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
LSB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
MSB
S
15
16
LSB
S
16bit
16bit
20bit
20bit
24bit
24bit
Right-justified method
右詰方式
LRCKI
BCKI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
MSB
31
32
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
LSB
MSB
S
DATAI
LSB
S
16bit
16bit
20bit
20bit
24bit
24bit
48fs
LRCKO
BCKO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
MSB
DATAO
18
19
20
21
22
23
24
1
2
3
4
5
6
7
LSB
8
9
10
11
12
13
14
15
16
17
MSB
S
18
19
20
21
22
23
24
LSB
S
16bit
16bit
20bit
20bit
24bit
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© 2012 ROHM Co., Ltd. All rights reserved.
24bit
12/54
2012.03 - Rev.A
Technical Note
BU9409FV
3-1. Three-wire serial input’s bit clock frequency setting
Default = 0
Select Address
S-P conversion1, S-Pconversion2
Value
&h0B [ 4 ]
3-2.
Operational explanation
0
64fs method
1
48fs method
Three-wire serial input’s format setting
Default = 0
3-3.
Select Address
Value
S-P conversion1 &h0B [ 3：2 ]
0
IIS method
Operational explanation
S-P conversion2 &h0C [ 3：2 ]
1
left-justified method
2
right-justified method
Three-wire serial input’s data bit width setting
Default = 0
Select Address
Value
S-P conversion1 &h0B [ 1：0 ]
0
16 bit
S-P conversion2 &h0C [ 1：0 ]
1
20 bit
2
24 bit
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Operational explanation
13/54
2012.03 - Rev.A
Technical Note
BU9409FV
4.
Digital sound processing（DSP）
BU9409FV’s Digital Sound Processing（DSP） consists of special hardware most suitable to Thin TV.
BU9409FV uses this special DSP to perform the following processing.
2
Prescaler, DC Cut HPF, Channel Mixer, P Volume（Perfect Pure Volume）, BASS, MIDDLE, TREBLE,
2
2
Pseudo Stereo, Surround, P Bass, P Treble, 7 Band・Parametric Equalizer, Master Volume, L/R Balance,
Output Clipper、 Sub-woofer output Processing.
DSP Outline and Signal Flow
（DATA
Data width：
32 bit
Machine cycle：
40.7ns
Multiplier：
32×24 → 56 bit
Adder：
32＋32 → 32 bit
Data
RAM
RAM）
PostScaler,
Input
Coefficient
operation
Circuit
（512fs, fs=48kHz）
MUX
0
Data RAM：
256×32 bit
Coefficient RAM：
128×24 bit
Sampling frequency：
fs=48kHz
Master clock：
512fs （24.576MHz, fs=48kHz）
M
U
X
MUX
Coefficient
RAM
Decoder
circuit
ADD
Acc
Output
Digital signal from 16bit to 24bit is inputted to DSP,
and it is extended by +8bit（+42dB） as overflow margin on the upper side.
The clip process is performed in DSP when the process exceeding this range is performed.
Input1
Pre
scaler
HPF
Channel
mixer
P2Volume
BASS
MIDDLE
TREBLE
Scaler
1
Pseude
stereo
＆
surround
P2Bass
P2Treble
Channel
Channel
mixer
LPF
mixer
Scaler
2
Input2
7Band
P-EQ
EVR
＆
Blance
Post
scaler
＆
Clipper
Main output
3band
P-EQ
EVR
＆
Balance
Post
scaler
＆
Clipper
Sub output
Digital Audio Processing Signal Flow
4-1. Prescaler
When digital signal is inputted to audio DSP, if the level is full scale input and the process of surround or equalizer is
performed, then it overflows, therefore the input gain is adjusted by prescaler.
Adjustable range is +24dB to -103dB and can be set by the step of 0.5dB.
Prescaler does not incorporate the smooth transition function.
Default = 30h
Select Address
Operational explanation
command
00
01
&h20 [ 7：0 ]
…
30
31
32
0dB
-0.5dB
-1dB
…
…
14/54
…
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© 2012 ROHM Co., Ltd. All rights reserved.
gain
+24dB
+23.5dB
FE
FF
-103dB
-∞
2012.03 - Rev.A
Technical Note
BU9409FV
4-2. DC Cut HPF
The DC offset component of digital signal inputted to the audio DSP is cut by this HPF.
The cutoff frequency fc of HPF is 1Hz, and first-order filter is used.
Default = 0
Select Address
Value
Operational explanation
&h21 [ 0 ]
0
Not using the DC Cut HPF
1
Using the DC Cut HPF
4-3. Channel mixer
It performs the setting of mixing the sounds of left channel & right channel of digital signal inputted to the audio DSP.
Here the stereo signal is made to be monaural.
The data inputted to Lch of DSP is mixed.
Default = 0
Select Address
Value
&h22 [ 7：6 ]
0
Inputting the Lch data
Operational explanation
1
Inputting the data of （Lch + Rch） / 2
2
Inputting the data of （Lch + Rch） / 2
3
Inputting the Rch data
The data inputted to Rch of DSP is mixed.
Default = 0
Select Address
Value
&h22 [ 5：4 ]
0
Inputting the Rch data
1
Inputting the data of （Lch + Rch） / 2
2
Inputting the data of（Lch + Rch） / 2
3
Inputting the Lch data
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Operational explanation
15/54
2012.03 - Rev.A
Technical Note
BU9409FV
4-4. P2Volume （Perfect Pure Volume）
There are some scenes in which sound suddenly becomes large like plosive sound in TV Commercial or Movie.
2
P Volume function automatically controls the volume and adjusts the output level.
In addition, it also adjusts in such a way that a whispery sound can be heard easily.
2
P Volume function operates in the fields of (1), (2) & (3) divided according to input level.
P2V off
VO
(1) at the time of VＩinf(-∞)～VＩmin
2
Noise is prevented from being lifted by P Volume function.
K
(2) When input level is over VＩmin and output is below VOmax
(3)
VO = VI + α
α： Lifting the Whole output level by the offset value α
VOmax
(3) When output level ＶＯ exceeds VOmax
P2V_MAX
(2)
VO = K・VI + α
K：
Slope for suppressing of D range （P2V_K）
It is also possible to set an output level constant.
VOmin
α
(1)
VOinf
2
Selection of using the P Volume function.
VIinf
Default = 0
VImin
0dB
P2V_MIN
Select Address
&h33 [ 7 ]
Value
VI
Operational explanation
2
0
Not using the P Volume function
1
Using the P2Volume function
Setting of VＩmin
2
In order to cancel that noise etc. is lifted by P Volume, the P2V_MIN sets the minimum level at which (to the minimum) the
2
P Volume functions.
command
Default = 00h
Select Address
&h34 [ 4:0 ]
Operational explanation
command
00
01
02
03
04
05
06
07
gain
-∞
-30dB
-32dB
-34dB
-36dB
-38dB
-40dB
-42dB
command
08
09
0A
0B
0C
0D
0E
0F
gain
-44dB
-46dB
-48dB
-50dB
-52dB
-54dB
-56dB
-58dB
command
10
11
12
13
14
15
16
17
gain
-60dB
-62dB
-64dB
-66dB
-68dB
-70dB
-72dB
-74dB
コマンド値
18
19
1A
1B
1C
1D
1E
1F
ゲイン
-76dB
-78dB
-80dB
-82dB
-84dB
-86dB
-88dB
-90dB
Setting of VＯmax
P2V_MAX sets the output suppression level. It represents the output level VＯmax at the time of input level VI = 0dB in the
case of setting of P2V_K = “0h”（slope is 0）.
Default = 00h
Select Address
&h35 [ 4:0 ]
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Operational explanation
command
00
01
02
03
04
05
06
07
gain
0dB
-1dB
-2dB
-3dB
-4dB
-5dB
-6dB
-7dB
command
08
09
0A
0B
0C
0D
0E
0F
16/54
gain
-8dB
-9dB
-10dB
-11dB
-12dB
-13dB
-14dB
-15dB
command
10
11
12
13
14
15
16
17
gain
-16dB
-17dB
-18dB
-19dB
-20dB
-21dB
-22dB
-23dB
command
18
19
1A
1B
1C
1D
1E
1F
gain
-24dB
-25dB
-26dB
-27dB
-28dB
-29dB
-30dB
-
2012.03 - Rev.A
Technical Note
BU9409FV
Setting of K
P2V_K sets the slop of D range. It sets the P2V_MAX = “1Eh”（-30dB） and represents the output level VＯmax at the time of
input level VI = 0dB.
Default = 00h
Select Address
Operational explanation
&h36 [ 3:0 ]
command
0
1
2
3
4
5
6
7
gain
-30dB
-28dB
-26dB
-24dB
-22dB
-20dB
-18dB
-16dB
comman
8
9
A
B
C
D
E
F
gain
-14dB
-12dB
-10dB
-8dB
-6dB
-4dB
-2dB
0dB
Setting of α
P2V_OFS makes small voice easy to be heard because the whole output level is lifted.
Default = 00h
Select Address
&h37 [ 4:0 ]
Operational explanation
command
00
01
02
03
04
05
06
07
gain
0dB
+1dB
+2dB
+3dB
+4dB
+5dB
+6dB
+7dB
command
08
09
0A
0B
0C
0D
0E
0F
gain
+8dB
+9dB
+10dB
+11dB
+12dB
+13dB
+14dB
+15dB
command
10
11
12
13
14
15
16
17
gain
+16dB
+17dB
+18dB
+19dB
+20dB
+21dB
+22dB
+23dB
command
18
19
1A
1B
1C
1D
1E
1F
gain
+24dB
-
Setting 1 of transition time at the time of attack
2
A_RATE is the setting of transition time when the state of P Volume function is transited to (2)→(3).
Default = 0
Select Address
&h38 [ 6:4 ]
Operational explanation
command A_RATE time command A_RATE time
5ms
4
0
1ms
1
2ms
5
10ms
2
6
20ms
3ms
3
4ms
7
40ms
Setting 1 of transition time at the time of recovery
2
R_RATE is the setting of transition time when the state of P Volume function is transited to (3)→(2).
Default = 0h
Select Address
Operational explanation
command R_RATE time command R_RATE time
0
0.25s
8
3s
1
0.5s
9
4s
0.75s
5s
2
A
3
1s
B
6s
4
1.25s
C
7s
5
1.5s
D
8s
6
2s
E
9s
7
2.5s
F
10s
&h38 [ 3:0 ]
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17/54
2012.03 - Rev.A
Technical Note
BU9409FV
Explanation of A_RATE,R_RATE(field transition of (2)<->(3))
Time
T
VI
Input
Field (2)
Field (3)
Field (2)
VOmax
Output
Time
T
VO
Attack operation
A_RATE
The time from exceeding the
attack operation detection level
VＯmax till the attack operation's
transition to Field ( 3 ) is
completed
Recovery operation
R_RATE
The time from falling below the
recovery operation detection
level VＯmax till the recovery
operation's transition to Field
(2) is completed
Setting 1 of attack detection time
2
A_TIME is the setting of the initiation of P Volume function’s transition operation. If output level at the time of transiting to
2
(2)→(3) continues for more then A_TIME time in succession, then the state transition of P Volume is started.
Default = 0
Select Address
&h39 [ 6:4 ]
Operational explanation
command
0
1
2
3
A_TIME
0.5ms
1ms
1.5ms
2ms
command
4
5
6
7
A_TIME
3ms
4ms
5ms
6ms
Setting 1 of recovery detection time
2
R_TIME is the setting of the initiation of P Volume function’s transition operation. If output level at the time of transiting to
2
(3)→(2) continues for more then R_TIME time in succession, then the state transition of P Volume is started.
Default = 0
Select Address
&h39 [ 2:0 ]
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Operational explanation
command
0
1
2
3
18/54
R_TIME
50ms
100ms
150ms
200ms
command
4
5
6
7
R_TIME
300ms
400ms
500ms
600ms
2012.03 - Rev.A
Technical Note
BU9409FV
Explanation of A_RATE_Low,R_RATE_Low(field transition of (1)<->(2))
VImin
VI
Input
Tme T
Field (1)
Field (2)
Field (1)
VOmin
Output
VO
Time T
Recovery operation
R_RATE_Low
Attack operation
A_RATE_Low
The time from falling
below
the
recovery
operation detection level
V I m i n till the recovery
operation's transition to
Field (2) is completed
The time from exceeding
the
attack
operation
detection level V I min till the
attack operation's transition
to Field (1) is completed
Setting 2 of the transition time at the time of attack
2
A_RATE_LOW is the setting of transition time when the state of P Volume function is transited to (2)→(1).
Default = 0
Select Address
&h3A [ 6:4 ]
Operational explanation
Command
0
1
2
3
A_RATE_LOW Time
1ms
2ms
3ms
4ms
Command
4
5
6
7
A_RATE_LOW Time
5ms
10ms
20ms
40ms
Setting 2 of the transition time at the time of recovery
R_RATE_LOW is the setting of transition time when the state of P2Volume function is transited to (1)→(2).
Default = 0 (Caution) This setting value is not reflected in BU9409FV. The value of &h38 [3:0] is set up.
Select Address
&h3A [ 2:0 ]
Operational explanation
Command
0
1
2
3
R_RATE_LOW Time
1ms
2ms
3ms
4ms
Command
4
5
6
7
R_RATE_LOW Time
5ms
10ms
20ms
40ms
Setting 2 of attack・recovery detection time
AR_TIME_LOW is the setting of the initiation of P2Volume function’s transition operation. If output level at the time of
transiting to (1)<->(2) continues for more then AR_TIME time in succession, then the state transition of P2Volume is started.
Default = 0
Select Address
&h3B [ 6:4 ]
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Operational explanation
Command
0
1
2
3
19/54
AR_TIME_LOW
0.5ms
1ms
1.5ms
2ms
Command
4
5
6
7
AR_TIME_LOW
3ms
4ms
5ms
6ms
2012.03 - Rev.A
Technical Note
BU9409FV
○Pulse sound detection and High-speed recovery function（functioning only at the time of transition of (2)<->(3)）
2
2
P Volume function makes the P Volume also compatible with large pulse sounds (clapping of hands, fireworks & shooting
2
etc.) in addition to normal P Volume operation. When large pulse sound is inputted, attack operation (A_RATE) or recovery
operation (R_RATE) is performed at 4 or 8 times the speed of normal attack operation or recovery operation.
Selection of using the pulse sound detection function.
Default = 0
Select Address
Value
Operational explanation
&h3BC[ 7 ]
0
Not using of pulse sound detection function
1
Using of pulse sound detection function
Selection of operating times of Recovery Time (R_RATE) in the case of using the pulse sound detection function
Default = 0
Select Address
Value
&h3C [ 3 ]
0
1
Operational explanation
Operating at 4 times the speed corresponding to the setting time of
R_RATE
Operating at 8 times the speed corresponding to the setting time of
R_RATE
Selection of pulse sound detection time
Default = 0
Select Address
&h3C [ 6:4 ]
Operational explanation
Command
0
1
2
3
Detection time
100us
200us
400us
1ms
Command
4
5
6
7
Detection time
2ms
5ms
10ms
20ms
Setting of operating level of pulse sound detection function
Operation is started by the difference between the presently detected value and the last value as a standard.
Default = 0
Select Address
&h3C [ 2:0 ]
Operational explanation
Command
0
1
2
3
Detection level
Over
Over
Over
Over
1.002
0.709
0.502
0.355
Command
4
5
6
7
Detection level
Over
Over
Over
Over
0.251
0.178
0.126
0.089
Example） Present detection level A ： -10dB → 10^(-10/20) = 0.32
The last detection level B
： -30dB → 10^(-30/20) = 0.032
A – B ： 0.32 – 0.032 = 0.288 → Operating by the setting of command ”4” to ”7”.
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20/54
2012.03 - Rev.A
Technical Note
BU9409FV
4-5. BASS
BASS of TONE Control can use Peaking filter or Low-shelf filter.
The setting is converted, in the IC, into digital filter’s coefficients （b0, b1, b2, a1, a2）by selecting the F0，Q and Gain, and
transmitted to coefficient RAM. The switching shock noise at the time of alteration of setting can be prevented by the smooth
transition function.
○BASS Control
Selection of filter types
Default = 0
Select Address
Value
&h40 [ 7 ]
0
Peaking filter
Operational explanation
1
Low-shelf filter
Selection of smooth transition function
Default = 0
Select Address
Value
Operational explanation
&h40 [ 6 ]
0
Using BASS smooth transition function
1
Not BASS using smooth transition function
Selection of smooth transition time
Default = 0
Select Address
Value
Operational explanation
&h40 [ 5:4 ]
0
21.4ms
1
10.7ms
2
5.4ms
3
2.7ms
Setting of smooth transition start
In the case of using the smooth transition function, after being transmitted, by the &h40[0] command, to the coefficient RAM
for smooth transition, the alteration of BASS’s coefficients is completed by using this command.
Default = 0
Select Address
Value
Operational explanation
&h4C [ 0 ]
0
BASS smooth transition stop
1
BASS smooth transition start
What is necessary is the time of waiting, which is more than the time selected by the setting of Bass smooth transition time,
from the time the BASS smooth transition start （&h4C[0] = “1”） is executed until the following command is sent. Please
make sure to perform the Bass smooth transition stop（&h4C[0] = “0”） after the smooth transition is completed.
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21/54
2012.03 - Rev.A
Technical Note
BU9409FV
Setting of the Start of transmitting to coefficient RAM
In the case of using the smooth transition, it is transmitted to the coefficient RAM for smooth transition. In the case of not
using of the smooth transition, it is transmitted directly to the coefficient RAM.
Default = 0
Select Address
Value
Operational explanation
&h40 [ 0 ]
0
BASS coefficient transmission stop
1
BASS coefficient transmission start
selection of frequency（F0）
Default = 0Eh
Select Address
&h41 [ 5:0 ]
Operational explanation
Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency
20Hz
50Hz
125Hz
315Hz
800Hz
2kHz
5kHz
12.5kHz
00
08
10
18
20
28
30
38
01
22Hz
09
56Hz
11
140Hz
19
350Hz
21
900Hz
29
2.2kHz
31
5.6kHz
39
14kHz
63Hz
400Hz
2.5kHz
16kHz
25Hz
160Hz
1kHz
6.3kHz
02
0A
12
1A
22
2A
32
3A
03
28Hz
0B
70Hz
13
180Hz
1B
450Hz
23
1.1kHz
2B
2.8kHz
33
7kHz
3B
18kHz
32Hz
80Hz
200Hz
500Hz
1.25kHz
3.15kHz
8kHz
20kHz
04
0C
14
1C
24
2C
34
3C
05
35Hz
0D
90Hz
15
220Hz
1D
560Hz
25
1.4kHz
2D
3.5kHz
35
9kHz
3D
0E
100Hz
40Hz
250Hz
630Hz
1.6kHz
4kHz
10kHz
06
16
1E
26
2E
36
3E
07
45Hz
0F
110Hz
17
280Hz
1F
700Hz
27
1.8kHz
2F
4.5kHz
37
11kHz
3F
-
Selection of quality factor （Q）
Default = 4h
Select Address
Operational explanation
Command
0
1
2
3
4
5
6
7
&h42 [ 3:0 ]
Command
8
9
A
B
C
D
E
F
Quality factor
0.33
0.43
0.56
0.75
1.0
1.2
1.5
1.8
Quality factor
2.2
2.7
3.3
3.9
4.7
5.6
6.8
8.2
Selection of Gain
Default = 40h
Select Address
Operational explanation
Command
1C
&h43 [ 6:0 ]
Gain
-18dB
…
…
3E
3F
40
41
42
-1dB
-0.5dB
0dB
+0.5dB
+1dB
…
…
64
+18dB
If the coefficient of b0, b1, b2, a1, and a2 exceeds ±4, it may not operate normally.
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22/54
2012.03 - Rev.A
Technical Note
BU9409FV
4-6. MIDDLE
MIDDLE of TONE Control uses Peaking filter.
The setting is converted, in the IC, into digital filter’s coefficients （b0, b1, b2, a1, a2）by selecting the F，Q and Gain, and
transmitted to coefficient RAM. The switching shock noise at the time of alteration of setting can be prevented by the smooth
transition function.
○MIDDLE Control
Selection of smooth transition function
Default = 0
Select Address
Value
&h44 [ 6 ]
0
Using MIDDLE smooth transition function
Operational explanation
1
Not MIDDLE using smooth transition function
Selection of smooth transition time
Default = 0
Select Address
Value
Operational explanation
&h44 [ 5:4 ]
0
21.4ms
1
10.7ms
2
5.4ms
3
2.7ms
Setting of smooth transition start
In the case of using the smooth transition function, after being transmitted, by the &h44[0] command, to the coefficient RAM
for smooth transition, the alteration of MIDDLE’s coefficients is completed by using this command.
Default = 0
Select Address
Value
Operational explanation
&h4C [ 1 ]
0
MIDDLE smooth transition stop
1
MIDDLE smooth transition start
What is necessary is the time of waiting, which is more than the time selected by the setting of MIDDLE smooth transition
time, from the time the MIDDLE smooth transition start （&h4C[1] = “1”） is executed until the following command is sent.
Please make sure to perform the MIDDLE smooth transition stop（&h4C[1] = “0”） after the smooth transition is completed.
Setting of the Start of transmitting to coefficient RAM
In the case of using the smooth transition, it is transmitted to the coefficient RAM for smooth transition. In the case of not
using of the smooth transition, it is transmitted to the direct coefficient RAM.
Default = 0
Select Address
Value
&h44 [ 0 ]
0
MIDDLE coefficient transmission stop
1
MIDDLE coefficient transmission sart
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Operational explanation
23/54
2012.03 - Rev.A
Technical Note
BU9409FV
Selection of frequency（F0）
Default = 0Eh
Select Address
&h45 [ 5:0 ]
Operational explanation
Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency
20Hz
50Hz
125Hz
315Hz
800Hz
2kHz
5kHz
12.5kHz
00
08
10
18
20
28
30
38
01
22Hz
09
56Hz
11
140Hz
19
350Hz
21
900Hz
29
2.2kHz
31
5.6kHz
39
14kHz
63Hz
400Hz
2.5kHz
16kHz
25Hz
160Hz
1kHz
6.3kHz
02
0A
12
1A
22
2A
32
3A
03
28Hz
0B
70Hz
13
180Hz
1B
450Hz
23
1.1kHz
2B
2.8kHz
33
7kHz
3B
18kHz
32Hz
80Hz
200Hz
500Hz
1.25kHz
3.15kHz
8kHz
20kHz
04
0C
14
1C
24
2C
34
3C
05
35Hz
0D
90Hz
15
220Hz
1D
560Hz
25
1.4kHz
2D
3.5kHz
35
9kHz
3D
0E
100Hz
40Hz
250Hz
630Hz
1.6kHz
4kHz
10kHz
06
16
1E
26
2E
36
3E
07
45Hz
0F
110Hz
17
280Hz
1F
700Hz
27
1.8kHz
2F
4.5kHz
37
11kHz
3F
-
Selection of quality factor（Q）
Default = 4h
Select Address
&h46 [ 3:0 ]
Operational explanation
Command
0
1
2
3
4
5
6
7
Quality factor
0.33
0.43
0.56
0.75
1.0
1.2
1.5
1.8
Command
8
9
A
B
C
D
E
F
Quality factor
2.2
2.7
3.3
3.9
4.7
5.6
6.8
8.2
Selection of Gain
Default = 40h
Select Address
Operational explanation
&h47 [ 6:0 ]
Command
1C
Gain
-18dB
…
…
3E
3F
40
41
42
-1dB
-0.5dB
0dB
+0.5dB
+1dB
…
…
64
+18dB
If the coefficient of b0, b1, b2, a1, and a2 exceeds ±4, it may not operate normally.
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24/54
2012.03 - Rev.A
Technical Note
BU9409FV
4-7. TREBLE
TREBLE of TONE Control can use Peaking filter or High-shelf filter.
The setting is converted, in the IC, into digital filter’s coefficients （b0, b1, b2, a1, a2）by selecting the F0，Q and Gain, and
transmitted to coefficient RAM. The switching shock noise at the time of alteration of setting can be prevented by the smooth
transition function.
○TREBLE Control
Selection of filter types
Default = 0
Select Address
Value
&h48 [ 7 ]
0
Peaking filter
Operational explanation
1
High-shelf filter
Selection of smooth transition function
Default = 0
Select Address
Value
Operational explanation
&h48 [ 6 ]
0
Using smooth transition function
1
Not using smooth transition function
Selection of smooth transition time
Default = 0
Select Address
Value
Operational explanation
&h48 [ 5:4 ]
0
21.4ms
1
10.7ms
2
5.4ms
3
2.7ms
Setting of smooth transition start
In the case of using the smooth transition function, after being transmitted, by the &h48[0] command, to the coefficient RAM
for smooth transition, the alteration of TREBLE’s coefficients is completed by using this command.
Default = 0
Select Address
Value
Operational explanation
&h4C [ 2 ]
0
TREBLE smooth transition stop
1
TREBLE smooth transition start
What is necessary is the time of waiting, which is more than the time selected by the setting of TREBLE smooth
transition time, from the time the TREBLE smooth transition start（&h4C[2] = “1”）is executed until the following command is
sent. Please make sure to perform the TREBLE smooth transition stop（&h4C[2] = “0”） after the smooth transition is
completed.
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25/54
2012.03 - Rev.A
Technical Note
BU9409FV
Setting of the Start of transmitting to coefficient RAM
In the case of using the smooth transition, it is transmitted to the coefficient RAM for smooth transition. In the case of not
using of the smooth transition, it is transmitted to the direct coefficient RAM.
Default = 0
Select Address
Value
&h48 [ 0 ]
0
TREBLE coefficient transmission stop
Operational explanation
1
TREBLE coefficient transmission start
Selection of frequency（F0）
Default = 0Eh
Select
Operational explanation
Address
&h49 [ 5:0 ]
Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency
20Hz
50Hz
125Hz
315Hz
800Hz
2kHz
5kHz
12.5kHz
00
08
10
18
20
28
30
38
01
22Hz
09
56Hz
11
140Hz
19
350Hz
21
900Hz
29
2.2kHz
31
5.6kHz
39
14kHz
63Hz
400Hz
2.5kHz
16kHz
25Hz
160Hz
1kHz
6.3kHz
02
0A
12
1A
22
2A
32
3A
03
28Hz
0B
70Hz
13
180Hz
1B
450Hz
23
1.1kHz
2B
2.8kHz
33
7kHz
3B
18kHz
32Hz
80Hz
200Hz
500Hz
1.25kHz
3.15kHz
8kHz
20kHz
04
0C
14
1C
24
2C
34
3C
05
35Hz
0D
90Hz
15
220Hz
1D
560Hz
25
1.4kHz
2D
3.5kHz
35
9kHz
3D
0E
100Hz
40Hz
250Hz
630Hz
1.6kHz
4kHz
10kHz
06
16
1E
26
2E
36
3E
07
45Hz
0F
110Hz
17
280Hz
1F
700Hz
27
1.8kHz
2F
4.5kHz
37
11kHz
3F
-
Selection of quality factor（Q）
Default = 4h
Select Address
Operational explanation
Command
0
1
2
3
4
5
6
7
&h4A [ 3:0 ]
Quality factor
0.33
0.43
0.56
0.75
1.0
1.2
1.5
1.8
Command
8
9
A
B
C
D
E
F
Quality factor
2.2
2.7
3.3
3.9
4.7
5.6
6.8
8.2
Selection of Gain
Default = 40h
Select Address
Operational explanation
&h4B [ 6:0 ]
Command
1C
Gain
-18dB
…
…
3E
3F
40
41
42
-1dB
-0.5dB
0dB
+0.5dB
+1dB
…
…
64
+18dB
If the coefficient of b0, b1, b2, a1, and a2 exceeds ±4, it may not operate normally.
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© 2012 ROHM Co., Ltd. All rights reserved.
26/54
2012.03 - Rev.A
Technical Note
BU9409FV
4-8. Scaler 1
Scaler adjusts the gain in order to prevent the overflow in DSP.
Adjustable range is +24dB to -103dB and can be set by the step of 0.5dB.
Scaler 1 does not incorporate the smooth transition function.
Default = 30h
Select Address
Operational explanation
Command
00
01
&h24 [ 7：0 ]
Gain
+24dB
+23.5dB
…
…
30
31
32
0dB
-0.5dB
-1dB
…
…
FE
FF
-103dB
-∞
4-9. Pseudo stereo
The sense of stereo is reproduced by signal processing of monaural voice.
Selection of filter effects of pseudo stereo
Default = 0
Select Address
Value
Operational explanation
&h71 [ 1：0 ]
0
Not using of pseudo stereo
1
Gain is set as "high"
2
Gain is set as "low"
If combined with the Surround’s setting of ON（&h70[7] = 1）, it will become even wider.
Lch
Lch
Lch PHASE
SHIFTER
Rch PHASE
SHIFTER
EFFECT
GAIN
(High/Low/
OFF）
EFFECT
GAIN
(High/Low/
OFF）
Rch
Rch
4-10. Surround （Matrix Surround ３D）
It realizes the Surround with little feeling of fatigue even after wide seat spot and long-time watching & listening to. It
reproduces the feeling of broadening of the natural sounds in medium & high bands and realizes the sound field that do no
damage to the feeling of locating of the vocal.
If loop is used, then the number of stages of phase shifter can be increased in a pseudo way.
+
Lch
+ L-R
-
+
+
PHASE
SHIFTER
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© 2012 ROHM Co., Ltd. All rights reserved.
EFFECT
GAIN
LPF
+
Rch
27/54
Lch
+
Loop
Rch
2012.03 - Rev.A
Technical Note
BU9409FV
ON/OFF of Surround function
Default = 0
Select Address
Value
Operational explanation
&h70 [ 7 ]
0
Turning the Surround effect OFF
1
Turning the Surround effect ON
Setting of using the LOOP
Default = 0
Select Address
Value
&h70 [ 5 ]
0
Not using of LOOP
Operational explanation
1
Using of LOOP
Setting of Surround gain
Default = Fh
Select Address
&h70 [ 3：0 ]
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© 2012 ROHM Co., Ltd. All rights reserved.
Operational explanation
Command
Gain
Command
Gain
0
1
2
3
4
5
6
7
0dB
-1dB
-2dB
-3dB
-4dB
-5dB
-6dB
-7dB
8
9
A
B
C
D
E
F
-8dB
-9dB
-10dB
-11dB
-12dB
-13dB
-14dB
-15dB
28/54
2012.03 - Rev.A
Technical Note
BU9409FV
4-11. P2Bass （Perfect Pure Bass： Deep Bass Equalizer）
It is the deep bass equalizer making it possible that even thin-screen TV, by which the enclosure of speaker is restricted,
can reproduce the real sound close to powerful deep bass & original sound.
Solid & clear deep bass with little feeling of distortion is realized. Even boosting of bass does not interfere with vocal band,
therefore rich and natural deep band is realized.
Gain
Vocal
band
ボーカル帯域
P22Bass
gain
Bassゲイン
f
LPF Cutoff frequency
LPFカットオフ周波数
HPF
Cutoff frequency
HPFカットオフ周波数
2
ON/OFF of P Bass function
Default = 0
Select Address
&h73 [ 7 ]
Value
Operational explanation
2
0
Not using of P Bass function
1
Using of P2Bass function
2
Setting of P Bass smooth transition time
Default = 0
Select Address
Value
Operational explanation
&h73 [ 3：2 ]
0
21.4ms
1
10.7ms
2
5.4ms
3
2.7ms
2
P Bass smooth transition control
Default = 0
Select Address
&h77 [ 1：0 ]
Value
Operational explanation
2
0
P Bass smooth transition stop
1
Setting of the values into Coefficient RAM for P2Bass smooth transition
2
P2Bass smooth transition start
2
What is necessary is the time of waiting, which is more than the time selected by the setting of P Bass smooth transition
2
time, from the time the P Bass smooth transition start（&h77[1:0] = “2”） is executed until the following command is sent.
2
Please make sure to perform the P Bass smooth transition stop（&h77[1:0] = “0”） after the smooth transition is completed.
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29/54
2012.03 - Rev.A
Technical Note
BU9409FV
Setting of P2Bass deep bass gain
Default = 00h
Select Address
Operational explanation
Command
0
1
2
3
4
5
6
7
&h74 [ 7：4 ]
Gain
0dB
+1dB
+2dB
+3dB
+4dB
+5dB
+6dB
+7dB
Command
8
9
A
B
C
D
E
F
Gain
+8dB
+9dB
+10dB
+11dB
+12dB
+13dB
+14dB
+15dB
2
Setting of P Bass HPF cutoff frequency
Default = 0
Select Address
Value
Operational explanation
&h74 [ 3：2 ]
0
60Hz
1
80Hz
2
100Hz
3
120Hz
2
Setting of P Bass LPF cutoff frequency
Default = 0
Select Address
Value
&h74 [ 1：0 ]
0
120Hz
Operational explanation
1
160Hz
2
200Hz
3
240Hz
ON/OFF of pseudo bass function
It can contribute to bass emphasis effect caused by pseudo bass. And it can also be used independently.
Default = 0
Select Address
Value
Operational explanation
&h72 [ 7 ]
0
Not using of pseudo bass function
1
Using of pseudo bass function
Setting of pseudo bass gain
Default = 00h
Select Address
&h72 [ 6：4 ]
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© 2012 ROHM Co., Ltd. All rights reserved.
Operational explanation
Command
0
1
2
3
30/54
Gain
-4dB
-2dB
0dB
+2dB
Command
4
5
6
7
Gain
+4dB
+6dB
+8dB
+10dB
2012.03 - Rev.A
Technical Note
BU9409FV
4-12. P2Treble （Perfect Pure Treble：Medium・High-band equalizer）
It realizes good Clearness, sound stretch, and clear-cut manner.
It realizes such an effect that the sound is raised and can be heard when speaker is located on the underside of a device.
2
ON/OFF of P Treble function
Default = 0
Select Address
&h75 [ 7 ]
Value
Operational explanation
2
0
Not using of P Treble function
1
Using of P2Treble function
2
Setting of P Treble smooth transition time
Default = 0
Select Address
Value
&h75 [ 3：2 ]
0
21.4ms
Operational explanation
1
10.7ms
2
5.4ms
3
2.7ms
2
P Treble smooth transition control
Default = 0
Select Address
&h78 [ 1：0 ]
Value
Operational explanation
2
0
P Treble smooth transition stop
1
Setting of the values into Coefficient RAM for P2Treble smooth
transition
2
P2Treble smooth transitionＳtart
2
What is necessary is the time of waiting, which is more than the time selected by the setting of P Treble smooth transition
2
time, from the time the P Treble smooth transition start（&h78[1:0] = “2”） is executed until the following command is sent.
2
Please make sure to perform the P Treble smooth transition stop（&h78[1:0] = “0”） after the smooth transition is completed.
2
Setting of P Treble medium・high-band gain
Default = 0h
Select Address
&h76 [ 7：4 ]
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© 2012 ROHM Co., Ltd. All rights reserved.
Operational explanation
Command
0
1
2
3
4
5
6
7
31/54
Gain
0dB
+1dB
+2dB
+3dB
+4dB
+5dB
+6dB
+7dB
Command
8
9
A
B
C
D
E
F
Gain
+8dB
+9dB
+10dB
+11dB
+12dB
+13dB
+14dB
+15dB
2012.03 - Rev.A
Technical Note
BU9409FV
4-13.
Scaler 2
Scaler adjusts the gain in order to prevent the overflow in DSP.
Adjustable range is +24dB to -103dB and can be set by the step of 0.5dB.
Scaler 2 does not incorporate the smooth transition function.
Default = 30h
Select Address
Operational explanation
&h25 [ 7：0 ]
Command
00
01
Gain
+24dB
+23.5dB
…
…
30
31
32
0dB
-0.5dB
-1dB
…
…
FE
FF
-103dB
-∞
4-14. 7 band・parametric equalizer
7-band parametric equalizer can use Peaking filter, Low-shelf filter or high-shelf filter.
The setting is converted, in the IC, into digital filter’s coefficients （b0, b1, b2, a1, a2）by selecting the F，Q and Gain, and
transmitted to coefficient RAM. There is no smooth transition function.
Band1
Band2
Band3
Band4
Band5
Band6
Band7
Level
±18dB
(0.5dB step)
f
63
160
400
1k
2.5k
6.3k
16k
(Hz)
Selection of filter types
Default = 0
Select Address
Value
Operational explanation
bit[ 7:6 ]
0
Peaking filter
It sets to all band
1
Low-shelf filter
2
High-shelf filter
Setting of the Start of transmitting to coefficient RAM
It is transmitted to direct coefficient RAM.
Default = 0
Select Address
Value
bit [ 0 ]
0
Coefficient transmission stop
It sets to all band
1
Coefficient transmission start
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© 2012 ROHM Co., Ltd. All rights reserved.
Operational explanation
32/54
2012.03 - Rev.A
Technical Note
BU9409FV
Selection of frequency（F0）
Default = 0Eh
Select
Operational explanation
Address
bit [ 5:0 ]
It sets to all
band
Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency
20Hz
50Hz
125Hz
315Hz
800Hz
2kHz
5kHz
12.5kHz
00
08
10
18
20
28
30
38
01
22Hz
09
56Hz
11
140Hz
19
350Hz
21
900Hz
29
2.2kHz
31
5.6kHz
39
14kHz
63Hz
400Hz
2.5kHz
16kHz
25Hz
160Hz
1kHz
6.3kHz
02
0A
12
1A
22
2A
32
3A
03
28Hz
0B
70Hz
13
180Hz
1B
450Hz
23
1.1kHz
2B
2.8kHz
33
7kHz
3B
18kHz
32Hz
80Hz
200Hz
500Hz
1.25kHz
3.15kHz
8kHz
20kHz
04
0C
14
1C
24
2C
34
3C
05
35Hz
0D
90Hz
15
220Hz
1D
560Hz
25
1.4kHz
2D
3.5kHz
35
9kHz
3D
0E
100Hz
40Hz
250Hz
630Hz
1.6kHz
4kHz
10kHz
06
16
1E
26
2E
36
3E
07
45Hz
0F
110Hz
17
280Hz
1F
700Hz
27
1.8kHz
2F
4.5kHz
37
11kHz
3F
-
Selection of quality factor（Q）
Default = 4h
Select Address
Operational explanation
Command
0
1
2
3
4
5
6
7
bit [ 3:0 ]
It sets to every band
Quality factor
0.33
0.43
0.56
0.75
1.0
1.2
1.5
1.8
Command
8
9
A
B
C
D
E
F
Quality factor
2.2
2.7
3.3
3.9
4.7
5.6
6.8
8.2
Selection of Gain
Default = 40h
Select Address
Operational explanation
bit [ 6:0 ]
Command
1C
It sets to every band
Gain
-18dB
…
…
3E
3F
40
41
42
-1dB
-0.5dB
0dB
+0.5dB
+1dB
…
…
64
+18dB
If the coefficient of b0, b1, b2, a1, and a2 exceeds ±4, it may not operate normally.
The Select Address of each band is shown in the table below:
Band1
Band2
Band3
Band4
Band5
Band6
Band7
&h50h
&h54h
&h58h
&h5Ch
&h60h
&h64h
&h68h
F（frequency）selection bit [ 5:0 ]
&h51h
&h55h
&h59h
&h5Dh
&h61h
&h65h
&h69h
Q（Quality Factor） selection bit [ 3:0 ]
&h52h
&h56h
&h5Ah
&h5Eh
&h62h
&h66h
&h6Ah
Gain selection bit [ 6:0 ]
&h53h
&h57h
&h5Bh
&h5Fh
&h63h
&h67h
&h6Bh
Selection of filter type bit [ 7:6 ]
Setting
of
the
coefficient RAM
Start
of
transmitting
to
bit [ 0 ]
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33/54
2012.03 - Rev.A
Technical Note
BU9409FV
4-15. Main output EVR （Electronic volume）
Volume is from+24dB to -103dB, and can be selected by the step of 0.5dB.
At the time of switching of Volume, smooth transition is performed. The smooth transition time takes about 22ms in the case
of transiting from 0dB. (Fixed)
Setting of Volume
Default = FFh
Select Address
Operational explanation
Command
00
01
&h26 [ 7：0 ]
Gain
+24dB
+23.5dB
…
…
30
31
32
0dB
-0.5dB
-1dB
…
…
FE
FF
-103dB
-∞
4-16. Main output balance
Balance can be attenuated, by the step width of 1dB, from the Volume setting value. At the time of switching, smooth
transition is performed. At the time of switching of Balance, smooth transition is performed. The smooth transition time takes
about 22ms. (Fixed)
Setting of L/R Balance
Default = 80h
Select Address
Operational explanation
Command
00
01
&h27 [ 7：0 ]
Lch
0dB
0dB
Rch
-∞
-126dB
…
…
…
7E
7F
80
81
0dB
0dB
0dB
-1dB
-1dB
0dB
0dB
0dB
…
…
…
FE
FF
-126dB
-∞
0dB
0dB
4-17. Main output postscaler
It performs the level adjustment when the data calculated in the 32-bit-width DSP is outputted in the form of 24bitwidth.
Adjustable range is from +24dB to -103dB and can be set by the step of 0.5dB.
There is no smooth transition function in Postscaler.
Default = 30h
Select Address
Operational explanation
Command
00
01
&h28 [ 7：0 ]
…
30
31
32
0dB
-0.5dB
-1dB
…
…
34/54
…
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© 2012 ROHM Co., Ltd. All rights reserved.
Gain
+24dB
+23.5dB
FE
FF
-103dB
-∞
2012.03 - Rev.A
Technical Note
BU9409FV
4-18. Main output clipper
When measuring the rated output (practical maximum output), it is measured where the total distortion rate （THD+N） is
10%. Clipping with any output amplitude is possible by using of clipper function, for example, the rated output of 10W or 5W
can be obtained by using an amplifier with 15W output.
Clip Level
Please set the &h27[7] at “H” when
using of clipper function.
Default = 0
Select Address
Value
Operational explanation
&h29 [ 7 ]
0
Not using clipper function
1
Using clipper function
Clip level is set in the form of higher-order 8 bit&h2A[7:0] and lower-order 8 bit&h2B[7:0].
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5
0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0
clip_level[15:0]
0 0
1
~clip_level[15:0]
1 1
4
1
0
0
1
3
1
0
0
1
2
1
0
0
1
1
1
0
0
1
0
1
0
0
1
Maximum value
Minimum value
A positive clip level
A negative clip level
The
clip
leve
l becomes narrow if the setting value is reduced.
Negative clip level is set in such a way that it is the inversion data of positive clip level.
4-19. Selection of sub input data
Selection of Sub input (Sub woofer processing etc.).
The Sub woofer output interlocked with P2Bass’s gain setting is possible by inputting the data that after P2Bass processing.
In addition, in BU9409FV, the data can be inputted from SP conversion2.
Default = 0
Select Address
Value
&h2F [ 1:0 ]
0
Inputting of data that are after scaler 1
1
Inputting of data that are after P2Bass processing
2
Inputting of data from SP conversion2
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© 2012 ROHM Co., Ltd. All rights reserved.
Operational explanation
35/54
2012.03 - Rev.A
Technical Note
BU9409FV
4-20. Sub output channel mixer
Mixing setting of sound of the left channel and the right channel of the digital signal for sub output which is input into sound
DSP is done. The monaural conversion of the stereo signal is done here.
The data which is input into Lch of Sub output signal processing is mixed.
Default = 0
Select Address
Value
Operating explanation
&h22 [ 3：2 ]
0
Inputting the Lch data
1
Inputting the data of （Lch + Rch） / 2
2
Inputting the data of （Lch + Rch） / 2
3
Inputting the Rch data
The data which is input into Rch of Sub output signal processing is mixed.
Default = 0
4-21.
Select Address
Value
Operating explanation
&h22 [ 1：0 ]
0
Inputting the Rch data
1
Inputting the data of （Lch + Rch） / 2
2
Inputting the data of （Lch + Rch） / 2
3
Inputting the Lch data
LPF for sub woofer output
It is the crossover filter (LPF) for sub woofer output.
LPF function ON/OFF.
Default = 0
Select Address
Value
Operating explanation
&h7A [ 7 ]
0
LPF function is not used
1
LPF function is used
Setting of the cut off frequency (Fc) of LPF
Default = 0h
Select Address
&h7A [ 6：4 ]
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© 2012 ROHM Co., Ltd. All rights reserved.
Operating explanation
Command
0
1
2
3
36/54
Fc
60Hz
80Hz
100Hz
120Hz
Command
4
5
6
7
Fc
160Hz
200Hz
240Hz
280Hz
2012.03 - Rev.A
Technical Note
BU9409FV
4-22. Sub output 3 band Parametric Equalizer
The peaking filter or the low shelf filter or the high shelf filter can be used by the parametric equalizer of 3 bands. By the fact
that F, Q and Gain are selected, it converts the setting to the coefficient (b0, b1, b2, a1 and a2) of the digital filter inside IC,
and transfers it to the coefficient RAM. There is no smooth transition function.
Band1
Band2
Band3
Level
±18dB
(0.5dB step)
f
63
Selection of filter type
80
100
(Hz)
Default = 0
Select Address
Value
Operating explanation
bit[ 7:6 ]
0
Peaking filter
It sets to all band
1
Low shelf filter
2
High shelf filter
Transfer start setting to coefficient RAM.
It transfers directly to coefficient RAM.
Default = 0
Select Address
Value
Operating explanation
bit [ 0 ]
0
Coefficient transmission stop
It sets to all band
1
Coefficient transmission start
Selection of frequency (F0)
Default = 0Eh
Select
Operating explanation
Address
bit [ 5:0 ]
It sets to all
band
Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency
20Hz
50Hz
125Hz
315Hz
800Hz
2kHz
5kHz
12.5kHz
00
08
10
18
20
28
30
38
01
22Hz
09
56Hz
11
140Hz
19
350Hz
21
900Hz
29
2.2kHz
31
5.6kHz
39
14kHz
63Hz
400Hz
2.5kHz
16kHz
25Hz
160Hz
1kHz
6.3kHz
02
0A
12
1A
22
2A
32
3A
03
28Hz
0B
70Hz
13
180Hz
1B
450Hz
23
1.1kHz
2B
2.8kHz
33
7kHz
3B
18kHz
32Hz
80Hz
200Hz
500Hz
1.25kHz
3.15kHz
8kHz
20kHz
04
0C
14
1C
24
2C
34
3C
05
35Hz
0D
90Hz
15
220Hz
1D
560Hz
25
1.4kHz
2D
3.5kHz
35
9kHz
3D
0E
100Hz
40Hz
250Hz
630Hz
1.6kHz
4kHz
10kHz
06
16
1E
26
2E
36
3E
07
45Hz
0F
110Hz
17
280Hz
1F
700Hz
27
1.8kHz
2F
4.5kHz
37
11kHz
3F
-
Selection of quality factor (Q)
Default = 4h
Select Address
Operating explanation
Command
0
1
2
3
4
5
6
7
bit [ 3:0 ]
It sets to all band
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37/54
Quality factor
0.33
0.43
0.56
0.75
1.0
1.2
1.5
1.8
Command
8
9
A
B
C
D
E
F
Quality factor
2.2
2.7
3.3
3.9
4.7
5.6
6.8
8.2
2012.03 - Rev.A
Technical Note
BU9409FV
Selection of Gain
Default = 40h
Select Address
Operating explanation
bit [ 6:0 ]
Command
1C
…
…
It sets to all band
Gain
-18dB
3E
3F
40
41
42
-1dB
-0.5dB
0dB
+0.5dB
+1dB
…
…
64
+18dB
If the coefficient of b0, b1, b2, a1, and a2 exceeds ±4, it may not operate normally.
Select Address of every band is as in chart below
Band1
Band2
Band3
&h80h
&h84h
&h88h
F (frequency) selection bit [ 5:0 ]
&h81h
&h85h
&h89h
Q (quality factor) selection bit [ 3:0 ]
&h82h
&h86h
&h8Ah
Gain selection
&h83h
&h87h
&h8Bh
Selection of filter type bit [ 7:6 ]
Transfer start setting to coefficient RAM
bit [ 0 ]
bit [ 6:0 ]
4-23. Sub output EVR (electronic volume)
The volume for sub output can select with 0.5dB step from +24dB to -103dB.
When changing volume, smooth transition is done. Smooth transition duration is required approximately 22ms when it is
from 0dB. (Fixed)
Volume setting
Default = FFh
Select Address
Operating explanation
Command
00
01
&h2C [ 7：0 ]
…
30
31
32
0dB
-0.5dB
-1dB
…
…
38/54
…
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© 2012 ROHM Co., Ltd. All rights reserved.
Gain
+24dB
+23.5dB
FE
FF
-103dB
-∞
2012.03 - Rev.A
Technical Note
BU9409FV
4-24. Sub output balance
As for sub output balance, it is possible to be attenuated at 1dB step width from volume setting value. When changing,
smooth transition is done.
When changing balance, smooth transition is done. Smooth transition duration is required approximately 22ms. (Fixed)
L/R Balance setting
Default = 80h
Select Address
Operating explanation
Command
00
01
&h2D [ 7：0 ]
Lch
0dB
0dB
Rch
-∞
-126dB
…
…
…
7E
7F
80
81
0dB
0dB
0dB
-1dB
-1dB
0dB
0dB
0dB
…
…
…
FE
FF
-126dB
-∞
0dB
0dB
4-25. Sub output post scaler
The occasion when the data which is calculated with DSP of 32bit width is output at 24bit width, level adjustment is done.
The adjustment range can be set with 0.5dB step from +24dB to -103dB.
There is no smooth transition function in the sub output post scaler.
Default = 30h
Select Address
Operating explanation
Command
00
01
&h2E [ 7：0 ]
…
30
31
32
0dB
-0.5dB
-1dB
…
…
39/54
…
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© 2012 ROHM Co., Ltd. All rights reserved.
Gain
+24dB
+23.5dB
FE
FF
-103dB
-∞
2012.03 - Rev.A
Technical Note
BU9409FV
4-26. Sub output clipper
The case when rated output (practical maximum output) of the television is measured, total harmonic distortion + noise
(THD+N) measures at the place of 10%. It can obtain the rated output of 10W and 5W for example making use of the
amplifier of 15W output, because it is possible to clip with optional output amplitude by using the clipper function.
C lip L e v e l
Please designate &h30 [7] as” H when
function.
using
sub
output
clipper
Default = 0
Select Address
Value
Operating explanation
&h30 [ 7 ]
0
Clipper function is not used
1
Clipper function is used
As for clip level, it sets with superior 8 bits &h31 [7: 0] and subordinate 8 bits &h32 [7: 0].
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5
0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0
clip_level[15:0]
0 0
1
~clip_level[15:0]
1 1
4
1
0
0
1
3
1
0
0
1
2
1
0
0
1
1
1
0
0
1
0
1
0
0
1
Maximum value
Minimum value
A positive clip level
A negative clip level
When
settin
g value is made small, clip level becomes narrow.
As for negative clip level, the reversal data of positive clip level is set.
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40/54
2012.03 - Rev.A
Technical Note
BU9409FV
4-27. Direct setting five coefficient of b0, b1, b2, a1 and a2 of Bi-quad Filter
7 bands Parametric Equalizer of main output and of 3 bands Parametric Equalizer of sub output have used the secondary
IIR type digital filter (Bi-quad Filter).
It is possible to set five coefficient 24 bit of b0, b1, b2, a1 and a2 of Bi-quad Filter (-4～+4) directly from an external.
When this function is used, it can do the filter type and frequency setting, Q value (quality factor) setting and gain setting
other than Peaking, Low-Shelf and High-Shelf unrestrictedly.
(Note) five coefficient have the necessity to make below the ±4, there is no read-out function of setting value and an
automatic renewal function of coefficient RAM.
Register for the coefficient transfer of 24bit
Before transferring into coefficient RAM in a lumping, the data is housed in the register for coefficient transfer from the
micro-computer.
Default = 00h
Select Address
Operating explanation
&h8D [ 7:0]
bit[23:16] which transfers 24 bit coefficient
&h8E [ 7:0]
bit[15:8] which transfers 24 bit coefficient
&h8F [ 7:0]
bit[7:0] which transfers 24 bit coefficient
It starts to transmit the coefficient of 24bit into coefficient RAM
Default = 0
Select Address
Value
&h8C [ 7 ]
0
Coefficient transmission stop
Operating explanation
1
Coefficient transmission start
Coefficient number appointment of coefficient RAM
Default = 00h
Select Address
Operating explanation
&h8C [ 6:0]
Coefficient number appointment of coefficient RAM
Appointment of coefficient number other than 14H↔45H is prohibition
Main output　7Band Parametric EQ
Coefficient
number ：
Coefficient
number ：
Coefficient
number ：
Coefficient
number ：
Coefficient
number ：
Coefficient
number ：
14H.
19H.
1EH.
23H.
28H.
2DH.
b0
+
+
b0
-1
Z
-1
15H.
b1
+
+
Z-1
Z
Z
BAND1 (Main)
+
b0
-1
-1
1AH.
a1
18H
16H.
b2
17H
+
b1
+
Z-1 Z-1
1BH.
a2
b2
+
1CH
BAND2 (Main)
+
b0
-1
Z
-1
Z
1FH.
a1
1DH
+
b1
+
+
Z-1 Z-1
b2
Z
BAND3 (Main)
+
b0
-1
Z
24H.
a1
22H
20H.
a2
21H
+
b1
+
+
Z-1 Z-1
b2
Z
b0
-1
Z
29H.
b1
Z-1 Z-1
2AH.
a2
BAND4 (Main)
+
-1
a1
27H
25H.
a2
26H
-1
+
b2
+
+
2BH
Z
BAND5 (Main)
a2
+
32H.
+
b0
-1
-1
Z
2EH.
a1
2CH
Coefficient
number ：
b1
Z-1 Z-1
2FH.
b2
30H
+
+
Z
BAND6 (Main)
a2
+
Z
33H.
a1
31H
+
-1
b1
35H
+
+
Z-1 Z-1
34H.
b2
Coefficient
number ：
37H.
b0
Coefficient
number ：
+
Z-1
38H.
b1
3CH.
+
b0
3AH
+
Z-1
39H.
+
Z-1 Z-1
a1
3BH
b2
BAND1 (Sub)
a2
3DH.
b1
Coefficient
number ：
+
41H.
+
b0
3FH
+
+
Z-1 Z-1
3EH.
b2
BAND2 (Sub)
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© 2012 ROHM Co., Ltd. All rights reserved.
a2
+
Z-1 Z-1
42H.
a1
40H
+
b1
44H
+
+
Z-1 Z-1
Z-1
a1
45H
43H.
b2
Z-1
a2
BAND3 (Sub)
41/54
a1
36H
BAND7 (Main)
Sub output　3Band Parametric EQ
2012.03 - Rev.A
Z-1
a2
Z-1
Technical Note
BU9409FV
4-28. About the automatic renewal of five coefficients of b0, b1, b2, a1 and a2 of Bi-quad Filter
BASS, MIDDLE, TREBLE, main output 7 bands Parametric Equalizer and sub output 3 band Parametric Equalizer have
used coefficient RAM. As for this coefficient RAM, because direct access is not possible from the micro-computer, it cannot
refresh the register efficiently.
There is an automatic renewal function of coefficient RAM in this DSP, the automatic write-in renewal of coefficient RAM is
possible by using this function. However when 4-26 「the function of direct setting a coefficient RAM」 is utilized, it is not
possible to utilize automatic write-in renewal.
Selection of using the automatic write-in renewal function
Default = 0
Select Address
Value
Operating explanation
&h6D [ 0 ]
0
Automatic write-in renewal function is used
1
Automatic write-in renewal function is not used
The separate setting of Filter of automatic write-in renewal function
Default = 00h
Select Address
Filter
&h6E [ 0 ]
BASS
Operating explanation
0：Automatic renewal function OFF
1：Automatic renewal function ON
&h6E [ 1 ]
MIDDLE
0：Automatic renewal function OFF
1：Automatic renewal function ON
&h6E [ 2 ]
TREBLE
&h6E [ 4 ]
Sub BAND1
0：Automatic renewal function OFF
1：Automatic renewal function ON
0：Automatic renewal function OFF
1：Automatic renewal function ON
&h6E [ 5 ]
Sub BAND2
0：Automatic renewal function OFF
1：Automatic renewal function ON
&h6E [ 6 ]
Sub BAND3
0：Automatic renewal function OFF
1：Automatic renewal function ON
&h6F [ 0 ]
Main MAND1
0：Automatic renewal function OFF
1：Automatic renewal function ON
&h6F [ 1 ]
Main MAND2
0：Automatic renewal function OFF
1：Automatic renewal function ON
&h6F [ 2 ]
Main MAND3
0：Automatic renewal function OFF
1：Automatic renewal function ON
&h6F [ 3 ]
Main MAND4
0：Automatic renewal function OFF
1：Automatic renewal function ON
&h6F [ 4 ]
Main MAND5
&h6F [ 5 ]
Main MAND6
0：Automatic renewal function OFF
1：Automatic renewal function ON
0：Automatic renewal function OFF
1：Automatic renewal function ON
&h6F [ 6 ]
Main MAND7
0：Automatic renewal function OFF
1：Automatic renewal function ON
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42/54
2012.03 - Rev.A
Technical Note
BU9409FV
5. P-S conversion 1 ,P-S conversion 2
Two parallel serial conversion circuits are built in BU9409FV. (P-S conversion 1, P-S conversion 2)
P-S conversion 1 convert the Main output of DSP from SDATAO1, LRCKO, and BCKO (34,35,36pin) into three line serial
data and output the data.
P-S conversion 2 convert the sub output of DSP from SDATAO1, LRCKO, and BCKO (33,35,36pin) into three line serial data
and output the data.
Output format has the IIS mode, left-align mode, and right-align mode. 16 each bit, 20bit, and 24bit output can also be
selected. The figure below shows the timing chart of each transmission mode.
IIS mode
IIS方式
LRCKO
BCKO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
MSB
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1
LSB
S
DATAO
2
3
4
5
6
7
8
9
10
11
12
13
14
15
MSB
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
LSB
S
16bit
16bit
20bit
20bit
24bit
24bit
left-align mode
左詰方式
LRCKO
BCKO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
MSB
DATAO
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
LSB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
MSB
S
15
16
LSB
S
16bit
16bit
20bit
20bit
24bit
24bit
right-align mode
右詰方式
LRCKO
BCKO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
MSB
31
32
1
2
3
LSB
S
DATAO
4
5
6
7
8
9
10
11
12
13
14
15
16
MSB
LSB
S
16bit
16bit
20bit
20bit
24bit
24bit
5-1. Format setting of three line serial output
Default = 0
Select Address
Value
Operating Description
P-S conversion 1 &h0D [ 3：2 ]
0
IIS mode
P-S conversion 2 & h0E [ 3：2 ]
1
left-align mode
2
right-align mode
5-2. Setting data bit width of three line serial output
Default = 0
Select Address
Value
P-S conversion 1 &h0D [ 1：0 ]
0
16 bit
P-S conversion 2 & h0E [ 1：0 ]
1
20 bit
2
24 bit
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Operating Description
43/54
2012.03 - Rev.A
Technical Note
BU9409FV
6. Mute function by command
Mute function by command is provided in BU9409FV.
It's possible to mute DSP's main and sub digital output by setting to &hFD [ 4 ] = 1h and MUTEX_DAC terminal and a
MUTEX_SP terminal both to L.
Setting the transition time of smooth mute
Mute the Main and Sub output of DSP.
Select the transition time of entering from 0dB to mute state.
Smooth transition time when releasing mute is about 22ms(fixed) .
Default = 0
7.
Select Address
Value
&h10 [ 1：0 ]
0
Don’t use mute function.
Operating Description
1
10.8ms
2
5.4ms
3
2.7ms
Clock halt function of DSP part
Clock halt function of DSP part with terminal MUTEX_DAC and MUTEX_SP is provided in BU9409FV.
Clock halt function’s setting
Default = 0
Select Address
Value
&hA9 [ 7 ]
0
Don’t use the clock halt function
Operating Description
1
Use the clock halt function
When setting on using the clock halt function, then set the MUTEX_DAC and MUTEX_SP terminal on L ,the clock of DSP
part will be halted. If clock is halted, command can’t be sent and received in a part of the block. If &hA9 [ 7 ] is input from
MCLK into clock, command can be sent and received even on the clock halt condition.
When MUTEX_DAC or MUTEX_SP terminal is on H, the clock halt will be released.
Power consumption decreases in the clock halt condition.
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44/54
2012.03 - Rev.A
Technical Note
BU9409FV
8. Command sent after releasing reset
Please send the following command after releasing reset including power supply on.
0. Power supply turning on
↓
○ Please input the clock from the outside. When the clock is not input, reset can't normally be done.
↓
1. Reset release (RESETB="H")
↓
2. &hA0[7:0] = C2h ：Set PLLA.
↓
3. &hF3[5:0] = 10h ：Set the dividing frequency ratio of MCLK. Please do as follows to set a value by fs of
MCLK.
（MCLK:512fs=10h、256fs=08h、128fs=04h）
↓
4. &hF5[3:0] = 1h：Set the dividing frequency ratio of PLL.
↓
5. &hF6[5:0] = 23h：Set the phase match of PLL.
↓
6. &hF1[4] = 0 ：Turn on the analog input.
↓
7. &h08[5:4] = 1h ：Select the system clock.
↓
8. &hA7[7:0] = F4h：Synchronous detection condition setting 1 for PLLA is initialized.
↓
9. &hA8[7:0] = 33h：Synchronous detection condition setting 2 for PLLA is initialized.
↓
10. &hA9[3:0] = 3h：Synchronous detection condition setting 3 for PLLA is initialized.
↓
11. &hA9[5:4] = 2h or 1h or 0h ：Set MCLK.
(Set in “2h”While MCLK is 512fs, set in “1h”While MCLK is 256fs, set in “0h”While MCLK is 128fs.)
↓
○ It is about 20ms weight until PLL is steady.
↓
10. &h01[5:4] = 0h ：Turn off the RAM Clear.
↓
11. Other register setting
&h26[7:0] = **h ：Release the mute of the Main output volume（30h=0dB）.
&h2C[7:0] = **h ：Release the mute of the Sub output volume（30h=0dB）.
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45/54
2012.03 - Rev.A
Technical Note
BU9409FV
9. About frequency setting such as tone control and parametric equalizer
Because the sampling rate converter is not built into BU9409FV, the calculation clock of DSP is changed according to the
input sampling rate of I2S.
Because sampling rate describes the frequency on the assumption of 48kHz in this function specification, conversion is
needed in case of sampling frequency of 44.1kHz and 32kHz.
Please refer to the table below for F0 setting of tone control (Bass, Middle, Treble) and parametric equalizer.
F0 (fs=48kHz)
Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency
20Hz
50Hz
125Hz
315Hz
800Hz
2kHz
5kHz
12.5kHz
00
08
10
18
20
28
30
38
01
22Hz
09
56Hz
11
140Hz
19
350Hz
21
900Hz
29
2.2kHz
31
5.6kHz
39
14kHz
02
0A
12
1A
22
2A
32
3A
25Hz
160Hz
1kHz
6.3kHz
63Hz
400Hz
2.5kHz
16kHz
03
28Hz
0B
70Hz
13
180Hz
1B
450Hz
23
1.1kHz
2B
2.8kHz
33
7kHz
3B
18kHz
04
0C
14
1C
24
2C
34
3C
32Hz
80Hz
200Hz
500Hz
1.25kHz
3.15kHz
8kHz
20kHz
05
35Hz
0D
90Hz
15
220Hz
1D
560Hz
25
1.4kHz
2D
3.5kHz
35
9kHz
3D
40Hz
250Hz
630Hz
1.6kHz
4kHz
10kHz
06
16
1E
26
2E
36
3E
0E
100Hz
07
45Hz
0F
110Hz
17
280Hz
1F
700Hz
27
1.8kHz
2F
4.5kHz
37
11kHz
3F
-
F0 (fs=44.1kHz)
Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency
00
01
02
03
04
05
06
07
18Hz
20Hz
23Hz
26Hz
29Hz
32Hz
37Hz
41Hz
08
09
0A
0B
0C
0D
0E
0F
46Hz
51Hz
58Hz
64Hz
74Hz
83Hz
92Hz
101Hz
10
11
12
13
14
15
16
17
115Hz
129Hz
147Hz
165Hz
184Hz
202Hz
230Hz
257Hz
18
19
1A
1B
1C
1D
1E
1F
289Hz
322Hz
368Hz
413Hz
459Hz
515Hz
579Hz
643Hz
20
21
22
23
24
25
26
27
735Hz
827Hz
919Hz
1.01kHz
1.15kHz
1.29kHz
1.47kHz
1.65kHz
28
29
2A
2B
2C
2D
2E
2F
1.84kHz
2.02kHz
2.3kHz
2.57kHz
2.89kHz
3.22kHz
3.68kHz
4.13kHz
30
31
32
33
34
35
36
37
4.59kHz
5.15kHz
5.79kHz
6.43kHz
7.35kHz
8.27kHz
9.19kHz
10.1kHz
38
39
3A
3B
3C
3D
3E
3F
11.5kHz
12.9kHz
14.7kHz
16.5kHz
18.4kHz
-
F0 (fs=32kHz)
Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency Command Frequency
00
01
02
03
04
05
06
07
13Hz
15Hz
17Hz
19Hz
21Hz
23Hz
27Hz
30Hz
08
09
0A
0B
0C
0D
0E
0F
33Hz
37Hz
42Hz
47Hz
53Hz
60Hz
67Hz
73Hz
10
11
12
13
14
15
16
17
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83Hz
93Hz
107Hz
120Hz
133Hz
147Hz
167Hz
187Hz
18
19
1A
1B
1C
1D
1E
1F
210Hz
233Hz
267Hz
300Hz
333Hz
373Hz
420Hz
467Hz
46/54
20
21
22
23
24
25
26
27
533Hz
600Hz
667Hz
733Hz
833Hz
933Hz
1.07kHz
1.2kHz
28
29
2A
2B
2C
2D
2E
2F
1.33kHz
1.47kHz
1.67kHz
1.87kHz
2.1kHz
2.33kHz
2.67kHz
3kHz
30
31
32
33
34
35
36
37
3.33kHz
3.73kHz
4.2kHz
4.67kHz
5.33kHz
6kHz
6.67kHz
7.33kHz
38
39
3A
3B
3C
3D
3E
3F
8.33kHz
9.33kHz
10.7kHz
12kHz
13.3kHz
-
2012.03 - Rev.A
Technical Note
BU9409FV
10. About a setup of a clock, and the input of a command
The input of MCLK is decided by combination of three kinds of sampling rates (fs=32kHz, 44.1kHz, 48kHz), and three kinds
of magnifications (128 times, 256 times, 512 times).
Sampling rate(fs)
MCLK clock
32kHz
44.1kHz
48kHz
128fs
4.096MHz
5.6448MHz
6.144MHz
256fs
8.192MHz
11.2896MHz
12.288MHz
512fs
16.384MHz
22.5792MHz
24.576MHz
In order that PLL may multiple the dividing output of MCLK, the dividing ratio of MCLK is not concerned with a sampling rate
like explanation in Chapter 8, but is decided by the magnification of MCLK.
MCLK clock
&hF3[5:0]
128fs
04h
256fs
08h
512fs
10h
Therefore, as for the case of the input of 4.096MHz-6.144NHz, and a 256fs setup, in the input frequency of MCLK, in a 128fs
setup, a 16.384MHz - 24.576MHz input serves as a range which can be operated in a 8.192MHz - 12.288MHz input and a
512fs setup.
&hF3[5:0]
MCLK
DIV
PLLA
PLL_DIV
DSP
S
E
L
1
I2C
CONTROL LOGIC
AUDIO IF
&h08[5:4]
ERROR_DET
S
E
L
2
BU9409FV
Clock line
SYSCLKO
The clock system figure of BU9409FV is as mentioned above.
(1) In the case of &h08 [5:4] =1, the block of an above figure light blue operates with a PLL clock.
(2) In the case of &h08 [5:4] =0, the block of an above figure light blue operates by MCLK.
Be careful of the following points at the time of a command input.
In (1), a part of blocks containing DSP are operating with the clock of PLL.
Therefore, even if MCLK is the range which is 4.096MHz - 24.576MHz, when a setup of PLL and the setup of &hF3 are not
performed correctly, a command may not be received other than command &h08 of a system control system, &hA0-&hA9,
&hB0-&hBA, &hD0, &hF0 - &hFA.
In (2), the whole operates with the clock of MCLK.
If MCLK is the range which is 4.096MHz - 24.576MHz, all blocks will receive an I2C command.
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47/54
2012.03 - Rev.A
Technical Note
BU9409FV
11. About the change of a sampling rate
11-1.
When a sampling rate change can predict beforehand
When the change of a sampling rate can predict beforehand, please switch a sampling rate in the following
procedures.
1．The mute of the DAC is carried out (MUTEX_SP and MUTEX_DAC are set to L and it is a mute about BD5446.).
↓
2. EVR is set as -infinity.
↓
3. Set prescaler as -infinity.
↓
4. A RAM clearance is carried out by setting it as &h01= C0h.
↓
5. &h08[5:4] = by setting it as 0, the whole clock is switched to MCLK.
↓
6. Switch a sampling rate.
↓
7. Switch to a PLL clock after stabilizing the input of MCLK by setting it as more 20 msec WAIT and &h08 [5:4] =1h,
since it is PLL stability.
↓
8. A RAM clearance is canceled by setting it as &h01 = 0.
↓
9. Since the coefficient is cleared, please set up DSP.
↓
10. Please cancel a DAC mute.
11-2.
When a sampling rate change cannot predict beforehand
Please do the following work, when the change of a sampling rate cannot predict beforehand, and having switched is
detected.
1．The mute of the DAC is carried out (MUTEX_SP and MUTEX_DAC are set to L and it is a mute about BD5446.).
↓
○When the input of MCLK has stopped, please do not input a command until MCLK is inputted again.
Please perform the following setup, after MCLK is inputted on the frequency of specification within the limits.
↓
２． It is set as &h08[5:4] = 0 and the whole clock is switched to MCLK.
↓
３．Switch to a PLL clock after stabilizing the input of MCLK by setting it as more 20 msec WAIT and &h08 [5:4] =1h,
since it is PLL stability.
↓
４．A RAM clearance is carried out by setting it as &h01= C0h.
↓
５．EVR is set as -infinity.
↓
６．Prescaler is set as -infinity.
↓
７．A RAM clearance is canceled by setting it as &h01 = 0.
↓
８．Since the coefficient is cleared, please set up DSP.
↓
９．Please cancel a DAC mute.
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48/54
2012.03 - Rev.A
Technical Note
BU9409FV
11-3.
When the frequency more than a stop or the specification range does not enter
[ MCLK ] at the time of a sampling rate change
When switching a sampling rate, the clock of the frequency more than the specification range does not go into MCLK, but
when input data is 0, it can return with the following procedures.
1. Carry out the mute of the DAC (MUTEX_SP and MUTEX_DAC are set to L and it is a mute about BD5446.)
↓
○When the input of MCLK has stopped, please do not input a command until MCLK is inputted again.
Please perform the following setup, after MCLK is inputted on the frequency of specification within the limits.
↓
2. It is 20ms or more WAIT because of PLL stability.
↓
○When the section where MCLK stopped or the relation with I2S input had collapsed in the midst of the midst of soft
transition and transmission of a coefficient exists, the coefficient may not be able to be transmitted well. When soft
transition and a coefficient are transmitting, please perform a setup from 11-2 4.
Please perform the following setup, when you are not the midst of soft transition or transmission of a coefficient.
↓
3. Please cancel a DAC mute.
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49/54
2012.03 - Rev.A
Technical Note
BU9409FV
12. When the clock which exceeded the specification range from MCLK is inputted
When the frequency beyond fs=48kHz is inputted from
Frequency
MCLK in the state where it was set as &h08 [5:4] =1, since
PLL follows inputted MCLK, as shown in the right figure,
when it exceeds Time Ter, it will exceed the frequency in
The frequency limit
that DSP can
operate
which DSP can operate.
In this case, an allophone may carry out irrespective of the
existence of data.
PLL output frequency
When you change into such a state, please carry out the
mute of the DAC immediately, apply reset (RESETB=L), and
do the work after reset release of Chapter 8.
48kHz
MCLK
inputted
frequency
The time of Ter serves as about 70 usec.
Time
Ter
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50/54
2012.03 - Rev.A
Technical Note
BU9409FV
13. Audio Interface Signal Specification
○Electric specification and timing of MCK, BCK, LRCK, and SDATA1 and SDATA2
1/ｆM CLK
M CLK
1/fLR CK
LR CK
tBCK
BC K
tBCKH
tBC KL
Fig 1-2 Clock timing
LRC K
tBLR DG
tLBRD G
BC K
tHD;SD
tSU;SD
SDATA1,SDATA 2
Fig 1-3 Audio interface timing
Parameter
1
2
3
4
Max.
Unit
Frequency
fSCLK
4.096
24.576
MHz
dSCLK
40
60
%
Frequency
fLRCK
32
48
kHz
DUTY
dLRCK
40
60
%
Cycle
tBCK
325
－
ns
H width
tBCKH
130
－
ns
L width
tBCKL
130
－
ns
It is time to the edge of LRCK from a BCK rising edge.*1
tBLRDG
20
－
ns
LRCK
BCK
7
8
Min.
DUTY
MCK
5
6
Sign
9
It is time to a BCK rising edge from the edge of LRCK.*1
tLBRDG
20
-
ns
10
Setup time of SDATA
tSU;SD
20
-
ns
11
Hold time of SDATA
tHD;SD
20
－
ns
*1 This standard value has specified that the edge of LRCK and the rising edge of BCK do not overlap.
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51/54
2012.03 - Rev.A
Technical Note
BU9409FV
14. Notes at the Time of Reset
Since the state of IC is not decided, please make it into RESETX=L at the time of a power supply injection, and surely apply
reset.
Reset of BU9409FV is performing noise removal by MCLK.
Therefore, in order to apply reset, a MCLK clock pulse is required of the state of RESETX=L more than 10 times.
The power-on reset after a power supply injection, and when you usually apply reset at the time of operation, please be sure
to carry out in the state where the clock is inputted, from MCLK.
15. Read-out of Soft Transition Flag
It is set to &hF4[0] =H when BASS, MIDDLE, TREBLE or P2Bass, and P2Treble are soft transiting.
It is possible to check whether soft transition is completed by reading &hF4 [0]
Soft transition will be completed if the read-out result of &hF4 [0] is L.
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52/54
2012.03 - Rev.A
Technical Note
BU9409FV
●Cautions
(1) ABSOLUTE MAXIMUM RATINGS
Permanent device damage may occur and break mode (open or short) can not be specified if power supply,
operating temperature, and those of ABSOLUTE MAXIMUM RATINGS are exceeded. If such a special condition is
expected, components for safety such as fuse must be used.
(2)Regarding of SCLI and SDAI terminals
SCLI and the SDAI terminal do not support 5 V-tolerant. Please use it within absolute maximum rating (4.5V).
(3) Power Supply
Power and Ground line must be designed as low impedance in the PCB. Print patterns if digital power supply and
analog power supply must be separated even if these have same voltage level. Print patterns for ground must be
designed as same as power supply. These considerations avoid analog circuits from the digital circuit noise. All pair
of power supply and ground must have their own de-coupling capacitor. Those capacitor should be checked about
their specification, etc. (nominal electrolytic capacitor degrades its capacity at low temperature) and choose the
constant of an electrolytic capacitor.
(4) Functionality in the strong electro-magnetic field
Malfunction may occur if in the strong electro-magnetic field.
(5) Input terminals
All LSI contain parasitic components. Some are junctions which normally reverse bias. When these junctions forward
bias, currents flows on unwanted path, malfunction or device damage may occur. To prevent this, all input terminal
voltage must be between ground and power supply, or in the range of guaranteed value in the Electrical
characteristics. And no voltage should be supplied to all input terminal when power is not supplied.
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53/54
2012.03 - Rev.A
Technical Note
BU9409FV
●Ordering Information
B
U
9
4
0
9
Part Number
F
V
E2
Package
FV: SSO-B40
Packaging and forming specification
E2: Embossed tape and reel
●Physical Dimension Tape and Reel Information
SSOP-B40
<Tape and Reel information>
13.6 ± 0.2
(MAX 13.95 include BURR)
0.5 ± 0.2
1
2000pcs
Direction
of feed
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
)
20
0.15 ± 0.1
0.1
1.8 ± 0.1
Embossed carrier tape
Quantity
21
5.4 ± 0.2
7.8 ± 0.3
40
Tape
0.1
S
0.65
0.22 ± 0.1
0.08
M
1pin
(Unit : mm)
Reel
Direction of feed
∗ Order quantity needs to be multiple of the minimum quantity.
●Marking Diagram(s)(TOP VIEW)
BU9409F
Lot No.
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2012.03 - Rev.A
Datasheet
Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
, transport
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the
ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice - GE
© 2014 ROHM Co., Ltd. All rights reserved.
Rev.002
Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
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When disposing Products please dispose them properly using an authorized industry waste company.
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please consult with ROHM representative in case of export.
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1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
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2.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the information contained in this document.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice - GE
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Rev.002
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
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Rev.001