SCH5617C Desktop System Controller Hub with Advanced, 8051µC-Based Auto Fan Control Product Features • ACPI 2.0 Compliant • High Performance 8051 - 2.5X average instruction execution speed improvement over the entire instruction set; i.e., typical 4-clock instruction cycle in highperformance 8051 vs. 12-clock instruction cycle in standard 8051. - Faster clock speed: 32 MHz vs. 16 MHz in standard 8051. - Dual Data Pointers - More Interrupts: Power-Fail, External Interrupt 2, External Interrupt 3, etc. - A set of External Memory/Mapped Control Registers provide the 8051 core with the ability to directly control many functional blocks of the SCH5617C. - 384 Bytes of RAM as part of the 8051 core - 4k Bytes Data RAM (869 bytes may be used to patch ROM code) - Twelve Interrupt Sources - Watch Dog Timer (WDT) • Operating Temperature Range of 0oC to +70oC • PECI Interface - Supports PECI REQUEST# and PECI AVAILABLE signaling • Temperature Monitor - Monitoring of up to Two Remote Thermal Diodes - Supports temperature readings from -63oC to +192oC – Supports monitoring of discrete diodes (3904 type diodes) – Supports monitoring substrate diodes (45nm & 65nm processor diodes) - 1/8th degree temperature resolution - Internal Ambient Temperature Measurement - Limit Comparison of all Monitored Values • PROCHOT_IN# Pin - Mapped into Temperature monitoring interrupt generation logic - May be used to adjust fan control limits - May be configured to force fans on full • PROCHOT_OUT Pin • Auto-Fan Control with ProcHot Features - PWM (Pulse width Modulation) Outputs (3) – Legacy PWM control dc fan outputs • High Frequency PWM Options (15kHz up to 30kHz) • 2 second delayed start-up for PWM outputs 2014 Microchip Technology Inc. • Fan Tachometer or Lock Rotor Inputs (3) - Programmable linear automatic fan control based on temperature - Acoustic enhancement mode - ProcHot pins modulate Tmin - Fan PWM duty cycle is a function in linear mode of multiple temperatures and ProcHot signals - PWM Ramp Rate Closed Loop Control • Internal Ring Oscillator for VTR Powered Logic • Low Battery Warning • LED Control • SMBus Isolation Logic • Programmable Wake-up Event Interface • PC2001 Compliant • General Purpose Input/Output Pins (30 Host controlled, 16 8051 controlled) • 21 Dedicated Scratchpad registers • ISA Plug-and-Play Compatible Register Set • System Management Interrupt • GLUE Logic - IDE Reset/Buffered PCI Reset Outputs - Power OK Signal Generation - Power Sequencing - Power Supply Turn On Circuitry - Resume Reset Signal Generation - Hard Drive Front Panel LED • 2.88MB Super I/O Floppy Disk Controller - Licensed CMOS 765B Floppy Disk Controller - Software and Register Compatible with Microchip's Proprietary 82077AA Compatible Core - Supports Two Floppy Drives - Configurable Open Drain/Push-Pull Output Drivers - Supports Vertical Recording Format - 16-Byte Data FIFO - 100% IBM® Compatibility - Detects All Overrun and Underrun Conditions - Sophisticated Power Control Circuitry (PCC) Including Multiple Powerdown Modes for Reduced Power Consumption - DMA Enable Logic - Data Rate and Drive Control Registers - 480 Addresses, Up to Eight IRQs, and Four DMA Options - Enhanced Digital Data Separator – 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 Kbps Data Rates – Programmable Pre compensation Modes DS00001789A-page 1 SCH5617C • Keyboard Controller - 8042 Software Compatible - 8 Bit Microcomputer - 2k Bytes of Program ROM - 256 Bytes of Data RAM - Four Open Drain Outputs Dedicated for Keyboard/Mouse Interface - Asynchronous Access to Two Data Registers and One Status Register - Supports Interrupt and Polling Access - 8 Bit Counter Timer - Port 92 Support - Fast Gate A20 and KRESET Outputs • Serial Ports - Two Full Function Serial Ports - High Speed NS16C550A Compatible UARTs with Send/Receive 16-Byte FIFOs - Programmable Baud Rate Generator – Supports all standard baud rates up to 115k bps – Supports non-standard baud rates of 230k and 460k bps • • • • • • - Modem Control Circuitry - 480 Address and 15 IRQ Options Infrared Port - Multi protocol Infrared Interface - IrDA 1.0 Compliant - SHARP ASK IR - 480 Addresses, Up to 15 IRQ Multi-Mode™ Parallel Port with ChiProtect™ - Standard Mode IBM PC/XT®, PC/AT®, and PS/2™ Compatible Bi-directional Parallel Port - Enhanced Parallel Port (EPP) Compatible EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant) - IEEE 1284 Compliant Enhanced Capabilities Port (ECP) - ChiProtect Circuitry for Protection - 960 Address, Up to 15 IRQ and Four DMA Options LPC Interface - Multiplexed Command, Address and Data Bus - Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems - PME Interface Power Good Output 3.3 Volt I/O 128-Pin QFP RoHS Compliant Package Description The SCH5617C is a 3.3V PC 2001 compliant Super I/ O controller with an LPC interface. All legacy drivers used for Super I/O components are supported making this interface transparent to the supporting software. The LPC bus also supports power management, such as wake-up and sleep modes. temperature sensor or retrieving temperatures from external processors that implement the PECI Interface. This includes support for the PECI REQUEST# and PECI AVAILABLE signals that are used to assure correct operation of PECI when processors enter the C3/ C4 sleep states. This device offers programmable automatic fan control support based on one or more of these measured temperatures. There are three pulse width modulation (PWM) outputs with high frequency support as well as three fan tachometer inputs. In addition, there is support for a PROCHOT_IN# pin that may be used to generate an interrupt, adjust the programmed temperature limits in the auto fan control logic, or force the PWM outputs on full. There is also a separate PROCHOT_OUT output pin. The GLUE Logic includes various power management logic including generation of RSMRST# and Power OK signal generation. There are also four LEDs to indicate power status and hard drive activity. Also included is SMBus Isolation logic, which can be used to isolate SMBus signals during power down modes. The part provides 46 General Purpose I/O control pins, which offer flexibility to the system designer. There are 21 Scratchpad read/write runtime registers for custom use. The SCH5617C incorporates the following Super I/O components: a parallel port that is compatible with IBM PC/AT architecture, as well as the IEEE 1284 EPP and ECP; two serial ports that are 16C550A UART compatible; a keyboard/mouse controller that uses an 8042 micro controller; two floppy controllers, which use Microchip's true CMOS 765B core; one infrared port that is IrDA 1.0 compliant. The true CMOS 765B core provides 100% compatibility with IBM PC/XT and PC/ AT architectures and is software and register compatible with Microchip's proprietary 82077AA core. The part also provides a low battery warning circuit. The SCH5617C is ACPI 1.0b/2.0 compatible and supports multiple low power-down modes. It incorporates sophisticated power control circuitry (PCC), which includes keyboard and mouse wake-up events. The SCH5617C supports the ISA Plug-and-Play Standard register set (Version 1.0a). The I/O Address, DMA Channel and hardware IRQ of each logical device in the SCH5617C may be reprogrammed through the internal configuration registers. There are up to 480 (960 for Standard Mode Parallel Port) I/O address location options, a Serialized IRQ interface, and four DMA channels. The SCH5617C provides temperature monitoring with auto fan control. The temperature monitor is capable of monitoring two external diodes, one internal ambient DS00001789A-page 2 2014 Microchip Technology Inc. SCH5617C TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at [email protected]. We welcome your feedback. Most Current Data Sheet To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at: http://www.microchip.com You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page. The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000). Errata An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the revision of silicon and revision of document to which it applies. To determine if an errata sheet exists for a particular device, please check with one of the following: • Microchip’s Worldwide Web site; http://www.microchip.com • Your local Microchip sales office (see last page) When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are using. Customer Notification System Register on our web site at www.microchip.com to receive the most current information on all of our products. 2014 Microchip Technology Inc. DS00001789A-page 3 SCH5617C BLOCK DIAGRAM FIGURE 1: SCH5617C BLOCK DIAGRAM IDE_RSTDRV#*, PCI_RST_SYS#* PCI_RST_SLOTS#*, PS_ON#* PWR_GOOD_3V*, PWRGD_PS, RSMRST#* 14.318 MHz SER_IRQ PCI_CLK LAD[3:0] LFRAME# LDRQ# PCI_RESET# LPCPD# IO_PME#* IO_SMI#* GP10*, GP11*, GP15*, GP21*, GP22*, GP23*, GP25*, GP26*, GP31*, GP33*, GP35*, GP36*, GP37*, GP40*, GP41*, GP42*, GP52*, GP53*, GP55*, GP57*, GO60*, GP61*, GP75*, GP76*, GP77*, GP80*, GP81*, GP82, GP83*, GP84*, GP8051_[12:1]*, GP8051_[17:14]* CLOCK GEN LEDs Glue Logic SERIAL IRQ LPC Bus Interface Power Mgmt Internal Bus (Data, Address, and Control lines) SCH5617C (128 QFP) Multi-Mode Parallel Port with ChiProtectTM PD[7:0] BUSY,SLCT,PE ERROR#, ACK# STROBE#, INIT# SLCTIN# ALF# High-Speed 16550A UART PORT 1 TXD1*,RXD1* CTS1#*, RTS1#* DSR1#*, DTR1#* DCD1#*, RI1#* High-Speed 16550A UART PORT 2 TXD2*,RXD2* CTS2#*, RTS2#* DSR2#*, DTR2#* DCD2#*, RI2#* General Purpose I/O 8051 TACH1 TACH2 TACH3 HVSS Remote1+ Remote1Remote2+ Remote2HVTR PWM1 PWM2 PWM3 PROCHOT_IN# PROCHOT_OUT SECONDARY_HD#* PRIMARY_HD#* SCSI#* HD_LED#* LED2* LED3* LED1* ROM Auto Fan Control Analog Interface Analog Block WDATA WCLOCK DIGITAL DATA SEPARATOR WITH WRITE PRECOMPENSATION PROPRIETARY 82077 COMPATIBLE VERTICAL FLOPPY DISK CONTROLLER CORE RCLOCK SMBus Isolation Circuits SCLK*, SDAT* SCLK_1*, SDAT_1* Keyboard/Mouse 8042 controller KCLK, MCLK KDAT, MDAT, KBDRST#, A20M P12*,P16*,P17* RDATA PECI VREF PECI IO PECI AVAILABLE PECI REQUEST# DS00001789A-page 4 PECI Interface MRT0#, MRT1#*, TRK0#, INDEX#,WRTPRT#,WGATE#, HDSEL#,DRVDEN0*, DIR#, STEP#, DSKCHG#,DS0#, DS1#* RDATA#, WDATA# Note 1: This diagram does not show power and ground connections. Note 2: Functions with "*" are located on multifunctional pins. This diagram is designed to show the various functions available on the chip (not pin layout). 2014 Microchip Technology Inc. SCH5617C PACKAGE OUTLINE 128-PIN QFP, 14MM X 20MM X 2.7MM BODY (3.9MM FOOTPRINT) Note: For the most current package drawings, see the Microchip Packaging Specification at http://www.microchip.com/packaging FIGURE 2: 2014 Microchip Technology Inc. DS00001789A-page 5 SCH5617C APPENDIX A: TABLE A-1: PRODUCT BRIEF REVISION HISTORY REVISION HISTORY Revision DS00001789A (07-08-14) DS00001789A-page 6 Section/Figure/Entry Correction Replaces previous SMSC version Rev. 0.7 (12-09-08) 2014 Microchip Technology Inc. SCH5617C THE MICROCHIP WEB SITE Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information: • Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s guides and hardware support documents, latest software releases and archived software • General Technical Support – Frequently Asked Questions (FAQ), technical support requests, online discussion groups, Microchip consultant program member listing • Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives CUSTOMER CHANGE NOTIFICATION SERVICE Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip web site at www.microchip.com. Under “Support”, click on “Customer Change Notification” and follow the registration instructions. CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • • • • Distributor or Representative Local Sales Office Field Application Engineer (FAE) Technical Support Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://www.microchip.com/support 2014 Microchip Technology Inc. DS00001789A-page 7 SCH5617C PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO.(1) - Device Device: Package: Tape and Reel Option: XXX(2) Package [X](3) - Tape and Reel Option Example: SCH5617C-NS = 128-pin QFP SCH5617C (1) 128-pin QFP (2) RoHS Compliant package NS = Blank TR = Tray packaging = Tape and Reel (3) DS00001789A-page 8 Note 1: These products meet the halogen maximum concentration values per IEC61249-2-21. Note 2: All package options are RoHS compliant. For RoHS compliance and environmental information, please visit http://www.microchip.com/pagehandler/en-us/aboutus/ ehs.html . Note 3: Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option. 2014 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, FlashFlex, flexPWR, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck, MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. The Embedded Control Solutions Company and mTouch are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, KleerNet, KleerNet logo, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, RightTouch logo, REAL ICE, SQI, Serial Quad I/O, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2014, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. ISBN: 9781632763389 QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 == 2014 Microchip Technology Inc. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. 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