Si5348A Datasheet Addendum Device Configuration Summary for Si5348A-B-GM Page 1 of 2 7-Output Stratum 3/3E SETS, G.8262 EEC Option 1 and 2, IEEE 1588 Network Synchronizer Overview ======== Part: Design ID: Created By: Timestamp: Si5348 5348BP2 ClockBuilder Pro v1.7 [2015-03-26] 2015-03-26 09:25:11 GMT-05:00 Device Grade ============ Device Grade --------Si5348A* Si5348B Output Clock Frequency Range ------------------100 Hz to 710.4 MHz 100 Hz to 350 MHz Typical Jitter -------------< 150 fs " * Device Grade Design ====== Host Interface: I/O Power Supply: VDD (Core) SPI Mode: 4-Wire I2C Address Range: 108d to 111d / 0x6C to 0x6F (selected via A0/A1 pins) XA/XB: 48 MHz (XTAL - Crystal) Inputs: IN0: IN1: IN2: IN3: IN4: Unused Unused Unused Unused Unused Outputs: OUT0: OUT1: OUT2: OUT3: OUT4: OUT5: OUT6: Unused Unused Unused Unused Unused Unused Unused Frequency Plan ============== No plan This datasheet addendum is provided as supplemental information to the Si5348A datasheet, located at www.silabs.com/timing. You can search for and download any datasheet addendum for Si534x/8x part numbers. Go to http://www.silabs.com/custom-timing for more information. Silicon Laboratories 400 West Cesar Chavez Austin, TX 78701 Phone (512) 416-8500 Copyright 2015 Silicon Laboratories Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Si5348A Datasheet Addendum Device Configuration Summary for Si5348A-B-GM Page 2 of 2 www.silabs.com Copyright 2015 Silicon Laboratories Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.