dm00034029

AN3432
Application note
How to choose a bypass diode for a silicon panel junction box
Introduction
Today, the main technologies used in solar panel are polycrystalline and mono crystalline
silicon solar cells. When one solar cell of the panel is shaded while the others are
illuminated, a hot spot could appear and leads to the shaded cell destruction. The bypass
diode is an efficient solution to eliminate the “hot spot” and maintain the current delivery. The
Schottky diode is a cost effective candidate. Its VRRM, VF/IR trade off need to fit the panel
and junction box characteristics.
This document gives a method to select the most appropriate diode versus the panel
characteristics.
September 2011
Doc ID 019041 Rev 1
1/24
www.st.com
Contents
AN3432
Contents
1
Photocurrent production basics of silicon solar cells . . . . . . . . . . . . . 3
1.1
The photovoltaic effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2
The solar cell model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3
Main parameters of solar cells . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.4
2
3
1.3.1
Short circuit current (Isc) and open circuit voltage (Voc) . . . . . . . . . . . . . . 4
1.3.2
Voc and Isc variations with ambient temperature . . . . . . . . . . . . . . . . . . . 5
Hot spot phenomenon . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Bypass diode inside the junction box . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1
Bypass function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2
Junction box . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
VRRM is the first rating criterion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3.1
Maximum number of solar cells to bridge with bypass . . . . . . . . . . . . . . 9
2.3.2
VRRM of bypass diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Application constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1
3.2
Constraints linked with the junction box characteristics . . . . . . . . . . . . . . 11
3.1.1
Power losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1.2
Thermal runaway risk . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Constraints linked with reliability test . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.2.1
Thermal test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.2.2
200 cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4
Optimized bypass diode for a given solar panel or junction box . . . . 20
5
Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2/24
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AN3432
Photocurrent production basics of silicon solar cells
1
Photocurrent production basics of silicon solar cells
1.1
The photovoltaic effect
To generate a current through a semi conductor, some energy is required to extract the
electron from the valence band to the conduction band. This energy is greater than material
band gap energy (Egap).
Thus in case of silicon solar cell, if the photon energy (sunlight carrier) E = hν is higher than
the silicon band gap energy Egap =1.12eV, the electrons migrate through a PN junction.
Figure 1.
Current generation through a semiconductor
E(eV)
Conduction
band
Ec
Egap = Ec-Ev
EV
1.2
é
Forbidden
area
E = hν > Egap
Valence
band
The solar cell model
Silicon solar cell creates a photocurrent called IL that is proportional to illumination and
independent of output cell voltage. However, when this voltage increases, a part of this
current is dissipated in p-n junction. This is why the equivalent model, shown in Figure 2,
consists in a current generator (photocurrent), a diode (intrinsic p-n junction), two
resistances Rp (parallel resistance: models the noise current between top and bottom of the
solar cell) and Rs (series resistance: simulates the materials and contact losses).
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Photocurrent production basics of silicon solar cells
Figure 2.
AN3432
Silicon solar cell equivalent diagram
Solar cell equivalent diagram
I(V)
Id
IRp
IL
Vd
Rs
Rp
V
RLoad
I L = I d + I Rp + I (V )
The circuit model shown on Figure 2 gives the solar cell current (I(V)) versus the solar cell
output voltage (V)
Equation 1
⎡ q(V + I(V)·Rs )⎤ ) (V + I(V)·Rs )
I(V) = IL − I0 (exp ⎢
⎥ −1 −
KT
Rp
⎦
⎣
Where:
I0 is the reverse bias saturation current, depending on cell die and junction characteristics
K is the Boltzmann constant: 1.38.10-23
q is the electron charge 1.602.10-19 C
T is the temperature in K
1.3
Main parameters of solar cells
1.3.1
Short circuit current (Isc) and open circuit voltage (Voc)
The solar cells or panel are usually characterized by their short circuit current (Isc) and their
open circuit voltage (Voc).
The short circuit current (Isc) is the current generated by the solar cell or panel when output
voltage of the cell or panel is set to 0 V.
Equation 2
q
·I ·R )
(
IL = Isc + Isc · Rs + Io · (exp KT sc s - 1)
Rp
RS/RP and RS being negligible, the short circuit current is close to the photocurrent IL
generated by the cell and is the maximum possible current generated by the cell for a fixed
illumination.
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AN3432
Photocurrent production basics of silicon solar cells
Equation 3
Isc ~ IL
The open circuit voltage (Voc) is the voltage corresponding to the output current of solar cell
or panel set to 0. The photocurrent is equal to the current lost in the intrinsic element of the
cell, and Voc is equal to the intrinsic diode forward voltage (Vd).
Equation 4
q
( KT · Voc)
-
IL = Io · (exp
V
1) - Roc
p
Equation 5
Voc = Vd
In the following, for easier the reading, Voc is the open circuit voltage of the panel and Voc_u
the open circuit voltage of the solar cell. The relation between them is given in Equation 6.
Equation 6
nb
Voc =
Σ Voc_u_i
i=1
where nb is the number of cells contained in one panel.
1.3.2
Voc and Isc variations with ambient temperature
The open circuit voltage is mainly linked with the parasitic diode forward voltage then it is
temperature dependent with a negative temperature coefficient (αVoc). Then the maximum
value for Voc is the value at minimum junction temperature specified in the panel data sheet.
Strongly linked with the photocurrent, the short circuit current increases slightly with the
temperature (αIsc>0).
Figure 3.
Temperature effect on Isc and Voc parameters
I(V)
ISC(T2)
ISC(T1)
αIsc ~ + 0.05% / °C
T2 > T1
αVoc ~ -0.4% / °C
VOC(T2) VOC(T1)
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Photocurrent production basics of silicon solar cells
AN3432
Considering the example of a 190 W solar panel. In standard test conditions (STC)
@Tamb = 25 °C, Voc = 33 V, Isc = 7.89 A:
αIsc = 0.05%/°C; αVoc = -0.4%/°C at an operating temperature range of -40 °C, 85 °C.
Voc(-40 °C) = 33 +
33 · -0.4
100
· (-40 -25)
Voc(-40 °C) = Vocmax = 41.6 V
That is, the Voc deviation is 26% versus Voc (STC)
Isc(85 °C) = 7.89 +
7.89 · 0.05 ·(85 - 25)
100
Isc(85 °C) = Iscmax = 8.13 A
Then, Isc max is 3% higher than Isc (STC)
1.4
Hot spot phenomenon
The hot spot phenomenon happens when one cell of the panel is shaded while the others
are illuminated, and when this shaded cell is not able to exhaust its generated power
dissipation.
The shaded cell behaves as a diode polarized in reverse and generates reverse power Ps.
The other cells generate a current that flows through the shaded cell and the load Rload.
Any solar cell has its own critical power dissipation Pc that must not be exceeded and
depends on its cooling and material structures, its area, its maximum operating temperature
and ambient temperature. A shaded cell may be destroyed when its reverse dissipation
exceeds Pc. This is the hot spot.
The manufacturers usually define a breakdown voltage Vc. Its value depends on the solar
cell technology (poly-silicon or mono-silicon) and the manufacturing process.
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AN3432
Photocurrent production basics of silicon solar cells
Figure 4.
Hot spot phenomenon
I(V)
-Vs
V G - V s = R Load · I (V )
Ps = V s · I ( V )
Vcell
R Load
Pc = V c · I (V )
VG
Shadowed cell
characteristics
(n-1) illuminated
cell characteristics
Current (A)
1000W/m²
Hot spot
I(V)
-Vc
0 Voc_u
-Vs
VG
(n-1) V oc_u
Voltage (V)
There is no risk of hot spot while:
Equation 7
Ps < Pc
To eliminate the hot spot phenomenon, a dedicated circuit should bypass the partially
shaded module and eventually it should maintain the operation of the other PV modules
creating a path for their current.
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Bypass diode inside the junction box
AN3432
2
Bypass diode inside the junction box
2.1
Bypass function
The bypass diode principle is to use a diode in reverse paralleling with several solar cells
(see Figure 5). The bypass diode is blocked when all cells are illuminated, and conducts
when one or several cells are shadowed.
Figure 5.
Bypass diode working phases
V cell
V cell
V cell
Vs
V cell
Vbypass = - n·Vcell
V cell
n= number of cells
per bypass diode
2.2
V cell
V cell
Bypass OFF
Bypass ON
Vbypass = VF
VF = Vs - (n -1)· Vcell
Junction box
Bypass diodes are rarely mounted directly on the solar panel. They are soldered in a so
called junction box that is placed at the rear of the solar panel. Most of the time, it contains
three diodes in series as explained in paragraph 2.3.1. The junction box design has a
significant impact on the thermal diode performance. When qualified without solar module,
the junction box has to meet DIN V VDE V 0126-5:2008 standard requirements. When
qualified with its solar module, the standard is EN61215.
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AN3432
Bypass diode inside the junction box
Figure 6.
Solar system diagram
Solar panel
Junction box
Inverter
Ideally, a bypass diode should have a forward voltage (VF) and a leakage current (IR) as low
as possible. However, these are conflicting objectives. Special care needs to be taken to
eliminate any risk of thermal runaway.
The junction box manufacturers use Schottky diode for its low forward voltage. The choice of
maximum reverse voltage is made versus the number and voltage of the solar cells in
series. Then the trade off “conduction voltage VF/reverse current IR” is selected according to
the total power losses ratings.
2.3
VRRM is the first rating criterion
The maximum repetitive reverse voltage (VRRM) of the bypass diode is directly linked with
the number of cells bridged by the bypass diode.
2.3.1
Maximum number of solar cells to bridge with bypass
The maximum number of cells to bridge is defined by the breakdown voltage (Vc). The
literature gives breakdown voltage (Vc) range for the poly-silicon cells from 12 V to 20 V. For
mono-silicon cells the breakdown voltage extends up to 30 V.
For an efficient operation, there are two conditions to fulfill:
●
Bypass diode has to conduct when one cell is shadowed.
●
The shadowed cell voltage Vs must stay under its breakdown voltage (Vc). It is defined
by the cell manufacturer and is the minimum value of the manufacturing distribution.
The maximum number of solar cells (n max) to bridge is calculated using both these
conditions:
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Bypass diode inside the junction box
AN3432
Equation 8
Vbypass = Vs − (n − 1) • Voc _ u
With
Vs < Vc
Voc _ u ≈ 0.5 V
Vbypass = VF
VF < Vc − (nmax − 1) • 0.5
nmax <
Vc − VF
0 .5
Figure 7.
+1
Maximum numbers of solar cells to bridge with bypass diode
0.5V
Vs
0.5V
Vbypass =VF
0.5V
Considering poly-silicon solar cells with a breakdown voltage Vc of 12 V and a bypass diode
forward voltage VF of 0.5 V, the maximum number nmax of solar cells bridged by the bypass
diode is 24. This is the common setting used by module manufacturers.
2.3.2
VRRM of bypass diode
Knowing the number of bypass diodes nd and the Voc of the panel, the maximum repetitive
reverse voltage (VRRM) of the bypass diode can be calculated. In the worst case, the bypass
diode reverse voltage is equal to the open circuit voltage (Voc_max) of the solar panel divided
by the number of bypass diodes nd. Voc_max is the open circuit voltage at the minimum
ambient temperature with the maximum irradiance.
Equation 9
Vocmax = Voc(Tjmin) · (1 + dt%)
V max
VRRM > oc
nd
where dt% = average voltage dispersion, which depends on the panel manufacturer.
Most of the time, the junction box manufacturer is different from the solar panel
manufacturer. Then the junction box is not dedicated to one panel, but it could be used with
any solar panel power range up to 400 W.
For a 400 W panel with a total Voc of 85 V in STC, its highest voltage is Voc (-40°C) = 107 V
(see Section 1.3.2). If the deviation tolerance dt% is 20% (average dispersion estimate
given in the literature) and 3 bypass diodes are used in the junction box, the reverse voltage
of each bypass diode is 43 V, then V = 45 V is selected.
This is probably the reason why the diode with a VRRM = 45 V is the most widely used in the
junction boxes.
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AN3432
Application constraints
3
Application constraints
3.1
Constraints linked with the junction box characteristics
The forward voltage induces conduction losses (Pcond) and leakage current induces reverse
losses (Prev). The best trade off needs to take into account:
3.1.1
●
Solar panel efficiency impact
●
Thermal runaway risk (directly linked with power losses)
●
Compatibility with flash test
●
Thermal test (linked with forward voltage)
●
Thermal cycling test
Power losses
Diode conduction losses
When the diode is conducting in DC mode, its forward voltage causes power losses called
Pcond. These losses represent the most part of the total power losses and decrease when
the junction temperature increases. The application note AN604 describes the way to
calculate them:
Equation 10
Pcond (Tj ) = VF (IF,Tj )·IF
IF = IPM − IS
Considering a solar panel built with 48 cells in series, divided in two sets of 24 cells
protected by one bypass diode each. If one cell of the first set is shadowed while the other
47 cells are fully illuminated, the bypass diode of the shadowed set is conducting, and the
bypass diode of the second set is in reverse bias. The second set generates a current Ipm
while the first set sinks the reverse current Is of the shaded cell. Then the conduction losses
are:
Equation 11
Pcondmax (Tj ) = VF (Ipm − Is , Tj )·(Ipm − Is )
The maximum loss calculations are made with the current through the bypass diode equal
to the maximum photocurrent ISC.
Equation 12
Pcond (Tj ) ≤ VF (Isc , Tj )·(Isc )
Figure 8 shows the maximum conduction losses for two different types of diodes:
●
STPS20L45 (low forward voltage)
●
STPS2045 (lower leakage current and higher forward voltage than STPS2045)
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Application constraints
Figure 8.
AN3432
STPS20L45C and STPS2045C conduction losses versus junction
temperature
Pcond (W)
10
I sc = 8 A
9
8
7
STPS2045C
6
5
4
STPS20L45C
3
2
1
Tj (°C)
0
-40
-20
0
20
40
60
80
100
120
140
160
180
200
For a first consideration the lower is the forward voltage the higher is the efficiency. However,
for a Schottky diode, a lower forward voltage causes a higher leakage current. This is its
main technological trade off.
Diode reverse losses
When the diode is reversed bias, all the cells bridged by the diode generate photocurrent.
Most of the time, in bypass application, the leakage current induces reverse losses. They
increase with the junction temperature and can be calculated using Equation 13.
Equation 13
Prev (Tj ) = VR ·IR (VR ,125°C)·ec( Tj−125°C)
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AN3432
Application constraints
Figure 9.
10
STPS20L45C and STPS2045C reverse losses versus junction
temperature
Prev (W)
9
VR = 25 V
STPS2045C
STPS20L45C
8
7
6
5
4
3
2
1
Tj (°C)
0
-40
-20
0
20
40
60
80
100
120
140
160
180
200
The reverse losses curves, shown in Figure 9, are calculated in the following application
conditions:
Ppanel = 400 W at Tamb = 85 °C, 3 bypass diodes, VOC(STC) = 85 V
To calculate the maximum reverse voltage VRRM, use the method described in
Section 2.3.2.
VR = 25 V, Tj = Tamb
Prev_2045(85 °C) = 0.014 W
Prev_20L45(85 °C) = 0.13 W
In application conditions, the solar module efficiency lost due to bypass diodes is around
0.05% for STPS20L45 and 0.004% for STPS2045.
The diode with the lower forward voltage (STPS20L45C) has the drawback of a higher
leakage current. The consequence is not visible on power module efficiency due to the low
level contribution of the bypass diode reverse losses.
However, it impacts the diode choice since the leakage current is directly linked with thermal
runaway risk. To avoid this phenomenon the choice of a diode with higher forward voltage is
mandatory as described in Section 3.1.2.
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Application constraints
3.1.2
AN3432
Thermal runaway risk
The thermal runaway results in the loss of temperature control, due to the inability to
exhaust the power losses generated by the diode operation.
In the bypass diode application, the most critical case is when the diode conducts and
suddenly turns off. At this specific time t0 the following rule is applied to eliminate thermal
runaway risk:
Equation 14
Pcond ([email protected]) > Prev ([email protected] )
The junction temperature depends on the junction box thermal resistance between ambient
temperature (Ta) and diode case temperature (Tc) and the thermal resistance between the
diode junction and the diode case, given in the diode datasheet as the Rth(j-c) parameter.
The power losses and these parameters are linked by the thermal law.
Equation 15
PThermal(Tj) =
(Tj - Ta)
Rth(j-c) + Rth(c-a)
and
Pcond ([email protected]) = PThermal([email protected] )
The conduction losses are given by:
Equation 16
Pcond (Tj ) = VF (Isc , Tj )·Isc
A graphical interpretation is presented in Figure 10 with STPS20L45C diode, the current is 8
A, the ambient temperature is 60 °C, Rth(c-a) = 3 °C/W, Rth(j-c) = 1.3 °C/W. The green curve is
the heat power that the junction can dissipate. The blue curve is the conduction losses
generated by the diode. The curves cross point gives the junction temperature at the
specific time t0. In this condition, the junction temperature [email protected] = 70 °C is shown in
Figure 10.
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AN3432
Application constraints
Figure 10. TJ @ t0 in case of STPS20L45C (Tamb = 60 °C, Rth(j-a) = 4.3 °C/W)
P (W)
10
9
P Thermal ( Tj )
8
7
6
5
Pcond ( Tj )
4
3
2
1
Tj (°C)
0
- 40
- 20
0
20
40
60
80
100
120
140
160
180
200
T [email protected] 0 =70 °C
By adding the reverse losses curve on the chart, Equation 14 is respected.
Figure 11. Thermal runaway risk for STPS20L45C (Tamb = 60 °C, Rth(j-a) = 4.3 °C/W)
P(W)
10
Pthermal(T j)
9
Prev(Tj )
8
No thermal runaway risk
Prev(Tj @t 0 )< Pcond (Tj @t 0 )
7
6
5
4
Pcond( Tj)
3
2
1
Tj (°C)
0
-40
-20
0
20
40
60
80
100
120
140
160
180
200
[email protected] =70 °C
As shown in Figure 11, there is no risk of thermal runaway since the operation of the diode
moves from the blue curve to the red curve then slips to thermal equilibrium close to the
ambient temperature (60 °C)
In another example, if the junction box presents a Rth(c-a) = 30 °C/W, with an ambient
temperature around 85 °C, there is a risk of thermal runaway as shown in Figure 12.
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Application constraints
AN3432
Figure 12. Thermal runaway risk for STPS20L45C (Tamb = 85 °C, Rth(j-a) = 31.3 °C/W)
10
P(W)
Prev( Tj )
9
8
Thermal runaway
Prev(T j @t 0 )>Pcond (Tj @t 0 )
7
6
5
4
Pcond(T j )
3
2
Pthermal ( Tj )
1
Tj (°C)
0
-40
-20
0
20
40
60
80
100
120
140
160
180
200
[email protected] 0 =152 °C
As shown on Figure 12, the junction temperature is 152°C in conduction. At turn-off this
temperature would generate initial losses of 9.5 W making the equilibrium point impossible
since both temperature and leakage will increase in a thermal runaway manner due to the
poor cooling.
To solve this problem, there are two options:
Reduce the thermal resistance Rth(c-a) of the junction box (modify geometry, change
compound…)
Select a diode with much less leakage current as STPS2045C, as shown in Figure 13, even
if the junction temperature at turn off is higher than STPS20L45 due to its higher forward
voltage drop and power losses. Therefore, there is no thermal runaway risk anymore.
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AN3432
Application constraints
Figure 13. Thermal runaway risk for STPS2045C (Tamb = 85 °C, Rth(j-a) = 31.3 °C/W)
P(W)
10
Prev( Tj )
9
8
No thermal runaway risk
Prev([email protected] 0 )< P cond ([email protected] 0)
7
6
Pcond ( Tj )
5
4
3
2
Pthermal ( Tj )
1
Tj (°C)
0
-40
-20
0
20
40
60
80
100
120
140
160
180
200
[email protected] 0 =164 °C
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Application constraints
AN3432
3.2
Constraints linked with reliability test
3.2.1
Thermal test
This test is defined in EN61215 and in DIN V VDE V 0126-5:2008 in two steps as described
in Figure 14.
Figure 14. Thermal test synopsis
Incoming measurements
Measure VF,IR,VR at
25 °C on by pass
diode
Test junction box
@75 °C 1 hour,
Id = Isc
Step 1
Tj >Tj max
Tj <Tj max
Failed ! The
junction box is
not qualified
Start
step 2
Isc
Test junction box @75 °C
1hour, Id=1.25 x Isc
Tj >Tj max
Step 2
Failed ! The junction
box is not qualified
1.25 x Isc
Tj <Tj max
Diode still functions as a diode
compared with incoming
measurements
SUCCESS! JUNCTION BOX
MEETS THE REQUIREMENTS
Diode does
no function or
visual defect
Failed! The
junction box is
not qualified
Using Equation 17 and Equation 18 it is possible to evaluate if the requirements of EN61215
can be met.
Equation 17
Pcond (Tj ) = VF (1.25 · Isc , Tj )·Isc ·1.25
To meet the test requirements (Tj < Tjmax) the following conditions apply:
Pcond(Tj) < Pthermal (Tj)
(T max - 75 °C)
Pcond ( Tjmax) = j R
th(j-a)
then the maximum forward voltage is
Equation 18
VF max(1.25 · Isc ,Tjmax) <
18/24
(Tjmax - 75 °C) · 1
Rth(j-a)
1.25 · Isc
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AN3432
200 cycles
This test is requested for the crystalline silicon terrestrial photovoltaic modules design
qualification. It is described in the standard EN61215 paragraph 10.11.
The bypass diode is polarized in reverse when the module temperature is above 25 °C.
Figure 15 illustrates the test conditions.
Figure 15. 200 cycles test conditions
VR
Ipeak
Temperature
of module °C
3.2.2
Application constraints
Maximum cycle time
Minimum
time 10 min.
100 °C/h max.
+85
+25
Minimum
time 10 min.
-40
Time h
1
2
3
4
5
6
As the diode is in reverse, the junction temperature is very close to the ambient temperature
due to low reverse losses. So there is no risk to exceed maximum junction temperature. The
critical parameter in this test is the value of voltage when Tamb = 25 °C. Actually, the reverse
voltage of a diode decreases with the temperature and then the diode VRRM (25 °C) is the
higher value and needs to meet the following requirement:
VRRM(25 °C) > VR(25 °C)
For an ST Schottky diode, the VRRM is guaranteed at 25 °C.
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Optimized bypass diode for a given solar panel or junction box
4
AN3432
Optimized bypass diode for a given solar panel or
junction box
This section describes a method to choose the optimized bypass diode through an
application example with a 400 W photovoltaic panel. Its short circuit current (Isc) is 6.4 A
and a its total open circuit voltage (Voc) is 85.3 V in STC conditions. This solar panel needs
3 bypass diodes placed in a junction box having Rth(j-a) = 30 °C/W.
Step 1: Determine VRRM minimum value
The highest open circuit voltage value for the solar panel (Voc) is for the -40 °C ambient
temperature, that is Voc (-40 °C) = 107 V, with a deviation tolerance of 20% applied. Then
the maximum reverse voltage applied to each bypass diode is 43 V.
So the VRRM minimum value is 43 V @ -40 °C. In the product range the nearest VRRM value
is 45 V.
Step 2: Diode characteristics versus application constraints
The bypass diode must be compatible with the thermal test. In general its maximum junction
temperature is 175 °C.
Then the thermal losses can be calculated as:
PThermal(175 °C) = (175 °C - 75 °C)
30
PThermal(175 °C) = 3.33 W
The junction box is able to dissipate 3.33 W when the junction temperature of the diode is
175 °C.
To meet the test requirements (Tj < Tjmax) the following condition applies:
Pcond(Tjmax) < Pthermal (Tjmax)
With this condition the maximum forward voltage at Tjmax and 1.25 · Isc can be calculated
using Equation 18:
VF max(1.25 · Isc ,175 °C) <
(175 - 75) ·
1
30
1.25 · 6.4
VF max(8 A,175 °C) < 0.417 V
The STPS3045CG is compliant with the thermal test requirements since its
VFmax (8 A, 175 °C) = 0.31 V
The forward voltage (VF) of a Schottky diode is temperature dependent. VF decreases
linearly with temperature and can be calculated using the following:
VF max(8 A,175 °C) = αVF (175 - 125 °C) + VF (8 A,125 °C )
(8 A,125 °C) - VF max(8 A,125 °C)
125 -25
α VF = -1.8 mV/°C
with α VF = VF max
Then:
VFmax (8 A, 175 °C) = -0.09 + 0.4 = 0.310 V:
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Optimized bypass diode for a given solar panel or junction box
Step 3: Eliminate the risk of thermal runaway
As explained in the previous section, the most critical step is the thermal runaway risk that
occurs at the diode switching off. In the worst case, the diode will conduct a current very
close to Isc = 6.4 A and will switch off with a reverse bias voltage equal to
Voc (85 °C)/ 3 = 64.83 / 3 = 21.61 V.
The power conduction losses calculation gives:
Pcond (Tj ) = VF (Isc , Tj )·Isc
With:
VF (Isc , Tj ) = VT 0 (Tj ) + Rd (Tj ) • Isc
VT 0 (Tj ) = 0.51 − 2.3 × 10 − 3 • (Tj − 25)
Rd (Tj ) = 0.2 + 1× 10 − 4 • (Tj − 25)
The power reverse losses are given by the following equation:
Prev (Tj ) = 1.51 • 10 −1 • e0.06( Tj−125 )
Then we apply the thermal law in order to find the junction temperature at switching time.
PThermal(Tj) =
(Tj - 85 °C)
30
Thermal law and power conduction losses curves cross gives the junction temperature at
switching time in Figure 16.
Figure 16. STPS3045C thermal runaway risk analysis
P(W)
10
9
8
No thermal runaway risk
Prev(T [email protected] 0 )< Pcond (Tj @t 0 )
7
6
5
4
3
2
Pthermal( Tj )
1
Tj (°C)
0
-40
-20
0
20
40
60
80
100
120
140
160
180
200
[email protected] 0 =164 °C
The junction temperature at switching off is 164 °C. At this junction temperature, the reverse
losses are below the conduction losses. In conclusion, there is no risk of thermal runaway
with STPS3045CGC.
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Conclusion
5
AN3432
Conclusion
This application note provides the means to select the best bypass diode device based on
junction box or PV module specifications. This diode selection will depend on its technology
trade off - forward drop voltage versus reverse current. ST offers a broad range of Schottky
diode from 10 to 60 A and 20 V to 45 V ratings. Their low leakage current is a distinctive
performance that has allowed more than 50 million pieces to be assembled successfully in
2011. Future trends should allow the extension of their maximum temperature to 200 °C
while covering the increased maximum current up to 15 A for the stringent junction box
thermal test.
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6
Revision history
Revision history
Table 1.
Document revision history
Date
Revision
06-Sep-2011
1
Changes
Initial release.
Doc ID 019041 Rev 1
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AN3432
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