AN1452

AN1452
Using the MCP19035 Synchronous Buck Converter Design Tool
Author:
This application note familiarizes the designer with
Microchip's MCP19035 Synchronous Buck Converter
Design Tool. Microchip Technology Inc. provides this
design tool to minimize design effort and to help the
designer estimate the static (i.e., the efficiency) and
dynamic (load step response) performance, and the
behavior of the step-down voltage regulator
implemented with the MCP19035 controller.
Sergiu Oprea
Microchip Technology Inc.
INTRODUCTION
The MCP19035 is a high-performance, highly
integrated, synchronous buck controller IC, packaged
in a space-saving, 10-pin 3x3mm DFN package.
Integrated features include high- and low-side
MOSFET drivers, fixed-frequency voltage-mode
control, internal oscillator, reference voltage generator,
overcurrent protection circuit for both the high- and
low-side switches, Power Good indicator and
overtemperature protection. The development of a
complete, high-performance synchronous buck
converter requires a minimum number of external
components. Some design effort is still necessary to
calculate all the external component’s (inductor,
MOSFETs, capacitors, compensation network) values
and parameters.
BACKGROUND
The Synchronous Buck Converter
The synchronous buck converter is an improved
version of the classic, non-synchronous buck (stepdown) converter. This topology improves the low
efficiency of the classic buck converter at high currents
and low-output voltages. Figures 1 and 2 illustrate the
power trains for the classic buck, and synchronous
buck converter.
L
Q
+
-
VIN
FIGURE 1:
COUT
D
RL
Classic Buck Converter Power Train.
L
Q1
Q2
VIN
FIGURE 2:
+
D
-
COUT
RL
Synchronous Buck Converter Power Train.
 2012 Microchip Technology Inc.
DS01452A-page 1
AN1452
The freewheeling diode of the classic buck converter is
replaced with a MOS transistor in the synchronous
buck converter. This greatly reduces the conduction
losses when the converter operates at high-currents
with low-output voltages.
Since the synchronous buck converter is developed to
deliver high output currents, it will mainly operate in the
Continuous Current Mode (CCM). This application note
assumes that the synchronous buck converter only
operates in the CCM mode.
The design process for a synchronous buck voltage
regulator is split into two phases. In the first phase, the
electrical parameters of the power train components
(inductor, MOSFETs and capacitors) are calculated
based on the target application needs provided by the
power supply designer. Further, this design tool can
estimate the power components’ losses based on the
parameters provided by the designer.
In the second phase, the design tool analyzes the AC
(small signal) frequency response of the system and
proposes a set of component values for the compensation network. The designer has the option to adjust the
value of these components, if the frequency response
of the compensated system does not meet the design
targets.
The MCP19035 synchronous buck controller
implements the voltage-mode PWM control. For this
kind of control strategy, a Type-III Compensation
system is recommended.
Based on these input parameters, the Design Tool
calculates the system parameters and the power train
component values (inductor, input and output
capacitors values).
C3
C2
R4
C1
R3
COMP
EA
VIN
+
R1
R2
VREF
FIGURE 3:
Network.
Type-III Compensation
Appendix A: “List of the Design Tool Formulas”
lists the equations used by this design tool.
“Fundamentals of Power Electronics” [1] provides all
the theoretical background for the synchronous buck
converter operation.
THE MCP19035 SYNCHRONOUS
BUCK CONVERTER DESIGN TOOL
Design Tool Input
In the first tab of the Design Tool, the designer provides
the system input parameters, including the input and
output voltages, maximum output current, switching
frequency, input voltage ripple and the reference
voltage. Also, the step load parameters must be
provided here. An example of the input parameters are
summarized in Figure 4.
Input Parameters for Design
Parameter
Designator
Input Voltage
Output Voltage
Output Current
Switching Frequency
Input Voltage Ripple
Reference Voltage
VIN
VOUT
IOUT
Fs
VRIN
VREF
14
1.8
10
600000
0.2
0.6
V
V
A
Hz
V
V
Step Load Parameters
IOH
IOL
Output Voltage Overshoot
IOH
IOL
7.5
2.5
0.1
A
A
V
FIGURE 4:
DS01452A-page 2
Units
Notes
5V ≤ VIN ≤ 30V
Fs = 300 kHz or 600 kHz
Input Parameters Table.
 2012 Microchip Technology Inc.
AN1452
The second tab of the Design Tool summarizes the
system parameters. The Power Train Components
table contains two color-marked columns:
completes these fields with the available standard
component values
To minimize error and ensure the best possible
representation of the system's performance, all further
calculations are done based on the user-input standard
values of the power train components.
• Suggested Values (green highlight) – shows the
values calculated by the Design Tool
• Standard Values (yellow highlight) – the designer
Power Train Components Values (calculated)
Component
Suggested Values
Standard Values (**)
Units
Inductor Value
COUT(*)
CIN
CBOOT
0.87
135.1
10
0.276
1
200
20
0.33
μH
μF
μF
μF
* COUT is calculated based on standard value for inductor and not for suggested value
** Must be filled by the designer
FIGURE 5:
The Power Train Components Values Table.
The Design Tool calculates the RMS currents for the
inductor, high- and low-side MOSFETs, and both input
and output capacitors. Using these RMS currents the
designer determines the power train component’s
parameters (MOSFETs, inductor and capacitors)
following the recommendations from the MCP19035
data sheet. Components’ parameters are then
manually entered into the Power Train Components
Parameter table (Figure 6). Based on these
parameters, the Design Tool estimates the losses and
the expected efficiency of the converter (Figure 7).
The total conduction time for the body diode will vary
between 20 ns (set by the internal logic of the
MCP19035) and a maximum value that depends on the
MOSFET’s type for the MCP19035 version with
adaptive Dead Time option. The total conduction time
for the body diode cannot be accurately determined
from the beginning of the design. The designer can
initially use the 40 ns value. For the fixed Dead Time
option of MCP19035, optimized to drive Microchip's
MOSFETs, this value is fixed to 12 ns.
The DC resistance of the inductor and the equivalent
series resistance (ESR) of the capacitors are also
available in each component data sheet.
The RDSON, total gate charge and reverse recovery
charge of the body diode parameters are available in
the MOSFET’s data sheet. Refer to the MCP19035
Data Sheet for further details on MOSFETs’ selection.
Power Train Components Parameters
Component Parameter
Designator
Units
High side MOSFET
RDS(ON)HS
QGATEHS
6
13.8
m
RDS(ON)
Total gate charge
Total Conduction Time for the Body Diode
Reverse Recovery Charge of the Body Diode
RDS(ON)LS
QGATELS
tBD
QRR
2.5
31
12
35
m
Inductor DC Resistance
CIN ESR
COUT ESR
LDCR
2
10
5
m
m
m
RDS(ON)
Total gate charge
nC
Low side MOSFET
FIGURE 6:
nC
ns
nC
Power Train Components Parameters Table.
 2012 Microchip Technology Inc.
DS01452A-page 3
AN1452
The Design Tool estimates the losses and the final
efficiency of the converter (see the table in Figure 7).
The designer can modify several parameters of the
power train components in an effort to optimize the
efficiency of the converter. The estimated efficiency will
depend on the accuracy of the parameters. Some
difference between the predicted value and the
measured value should be expected. Certain types of
losses (for example, hysteresis losses of the inductor)
are not calculated by the Design Tool. Refer to the
inductor data sheet for details regarding these types of
losses.
Estimated System Losses
High side MOSFET losses
Conduction losses
Switching losses
Total losses
Low Side MOSFET losses
Conduction losses
Body diode conduction losses
Body diode reverse recovery losses
Total losses
Controller losses
Inductor conduction losses
COUT losses
CIN losses
Total losses
Estimated Efficiency at Full Load
FIGURE 7:
W
W
W
0.2
0.0504
0.147
0.3974
W
W
W
W
0.4
0.2
0.015
0.05
2.3016
88.7
W
W
W
W
W
%
Losses and Expected Efficiency Table.
Loop Compensation
The next step in the design is to stabilize the control
loop. On the third tab, the Design Tool calculates the
values of the compensation network components
according with the design procedure described in the
MCP19035 data sheet. The designer can also analyze
the stability and the dynamic performance of the
converter using the Frequency Domain Analysis tab in
the Design Tool.
Bode Plots
The Bode plots method is an important engineering tool
that can be used for frequency domain analysis of the
closed loop systems. Stability and dynamic
performance of closed-loop systems can also be
estimated using these plots. A Bode plot is the graph
representing the magnitude and/or phase of a transfer
function, or other complex-domain quantity versus
frequency. The magnitude, expressed in decibels, and
the phase, expressed in degrees, are plotted on a
logarithmic frequency scale.
DS01452A-page 4
0.08
1.1592
1.2392
If H(s) is the transfer function of a linear, time-invariant
system, the magnitude and phase are shown in the
following equations:
EQUATION 1:
GAIN
G  dB  = 20  log H  s 
EQUATION 2:
PHASE
Im  H  s  
Phase  H  s   = atan ----------------------Re  H  s  
The gain and phase can now be plotted on a
logarithmic frequency scale. These are the Bode plots
of the given transfer function.
Similarly, if the converter closed-loop transfer function
is known, the Bode plots can be used to analyze the
stability and dynamic performance of the system.
The Design Tool uses the Average Model of the buck
converter developed in “Fundamentals of Power
Electronics”[1]. The frequency response of the
compensated system is obtained by multiplying the
frequency response of the power train with the
frequency response of the compensator (see
Equation 3).
 2012 Microchip Technology Inc.
AN1452
+
VIN
-
PWM
Modulator
HM(S)
GAIN (dB)
Power Train
H P(S)
Compensator
HC(S)
90
70
50
30
10
-10
-30
-50
-70
-90
1
FIGURE 8:
The Synchronous Buck
Regulator System.
EQUATION 3:
The designer can now estimate the stability and
dynamic performance of the system by inspecting the
Bode plots.
The Design Tool plots the Bode plots for power train,
compensation circuit and compensated converter.
10
PHASE (Degrees)
GAIN (dB)
Bode Plots of the Power Train
20
0
-20
-40
-60
-80
-100
-120
-140
-160
-180
-200
1000
100000
FREQUENCY (Hz)
FIGURE 9:
Train.
Bode Plots of the Power
1
100
10000
100
80
60
40
20
0
-20
-40
-60
-80
-100
1000000
PHASE (Degrees)
GAIN (dB)
Gain
Phase
The first parameter of interest is the system’s crossover
frequency. The crossover frequency is the point where
the gain of the system becomes 0 dB. A higher
crossover frequency means a better dynamic
performance of the system (better transient response).
However, due to the stability criteria, this crossover
frequency cannot be set infinitely high.
Phase margin is the second parameter of interest, and
directly related to the stability of the closed loop
system. In a closed loop system that uses negative
feedback, the phase margin is defined as the difference
between the phase at the crossover frequency and 0°.
The third parameter is the gain margin. This parameter
is also related to the system stability and will indicate
how far the system is from the instability point (0 dB).
The gain margin is defined as the amount of gain that
must be added to the system gain to reach the 0 dB
point, calculated at the point where the phase
reaches 0°.
The Design Tool automates the calculation of these
three parameters and plots the results. The designer
can use these parameters to evaluate the stability of
the closed loop system.
Bode Plots of the Compensator
80
70
60
50
40
30
20
10
0
-10
-20
10000
FIGURE 11:
Bode Plots of the
Compensated System.
HS  s  = HP  s   HM  s   HC  s 
Gain
Phase
100
FREQUENCY (Hz)
FREQUENCY RESPONSE
OF THE COMPENSATED
SYSTEM
60
50
40
30
20
10
0
-10
-20
-30
-40
-50
-60
180
160
140
120
100
80
60
40
20
0
-20
-40
-60
-80
1000000
Gain
Phase
PHASE (Degrees)
Bode Plots of the Compensated System
VOUT
y
Fcrossover
Phase Margin
Gain Margin
FIGURE 12:
Parameters.
63000
62 1
62.1
22.9
Hz
Degrees
dB
Closed Loop System
FREQUENCY (Hz)
FIGURE 10:
Bode Plots of the
Compensation Circuit.
 2012 Microchip Technology Inc.
DS01452A-page 5
AN1452
1
GAIN (dB)
FIGURE 13:
90
75
60
45
30
15
0
-15
-30
-45
-60
-75
-90
Gain
Phase
1
FIGURE 14:
Noise, Compensation And Stability in
Practical Systems
PHASE (Degrees)
Gain
Phase
180
160
140
Phase
120
Margin
100
80
60
40
20
0
-20
-40
-60
-80
FCrossover
100
10000
1000000
FREQUENCY (Hz)
Phase Margin.
180
160
140
120
Gain
100
Margin
80
60
40
20
0
-20
-40
-60
-80
FCrossover
100
10000
1000000
FREQUENCY (Hz)
PHASE (Degrees)
GAIN (dB)
90
75
60
45
30
15
0
-15
-30
-45
-60
-75
-90
Gain Margin.
Stability Criterion
The designer can estimate if the closed loop system is
stable by verifying if the phase and gain margin fulfills
the Nyquist stability criterion. The criterion states that a
closed loop system is asymptotically stable if:
• Phase margin is greater than 0°
• Gain margin is greater than 0 dB
However, for a real system where noise and high-order
effects are present, these limits must be modified
according to the following rules:
• Phase margin must be greater than 45°
• Gain margin must be greater than 6 dB
The larger the values, the better stability. At the same
time, the system becomes slower, with poor dynamic
response to an external perturbation. A system with
lower phase and gain margins offer a faster transient
response, but is more sensitive to noise and can
become unstable.
DS01452A-page 6
The Design Tool uses an ideal, linearized model that is
not able to include and analyze all phenomena present
within a real-world, step-down PWM converter
application. Some effects, such as the delays
introduced by the PWM modulator, Error Amplifier
bandwidth and switching elements (MOSFETs), can
produce additional phase lag, decreasing the phase
margin of the compensated system. A safe way to
avoid these effects is to design the regulator with a
phase margin greater than 50° using the Design Tool.
The power train passive components (inductor, input
and output filter capacitors) may have large tolerances.
The values are also affected by the operating
conditions: inductor’s inductance varies with the
current, and the capacitance of the ceramic capacitors
varies with the operating voltage. It is highly
recommended to check the stability of the system for all
limits of components tolerances. In general, the
inductance of the inductor drops when the current
increases. This variation also depends on the magnetic
material that is used for the core. The capacitance of
the ceramic capacitor decreases if the voltage across
the terminals increases. All the variation curves are
provided in the component’s data sheet and must be
verified by the designer.
As previously mentioned, setting the crossover
frequency high results in faster transient response. If
the crossover frequency is too high, the system control
loop can become sensitive to noise even if it is still
stable (i.e., the phase margin exceeds 45°). The noise
that passes through the loop will adversely affect the
PWM modulator, producing a jitter on the high and lowside driver's signals and impact the output voltage
ripple.
Figure 15 captures this noisy behavior. The low and
high-side driver's signals have jitter, and the output
voltage ripple is higher than in normal operation. This
behavior can also occur at high input voltages because
the gain of the PWM modulator increases with the input
voltage. The designer must reduce the crossover
frequency of this system to avoid this behavior at high
input voltages. Notice that this noisy behavior may also
occur when the system runs near the Critical
Conduction Mode, where the current in the inductor
reaches zero. In this case, the power train becomes a
first-order system (versus a second-order system,
typical for voltage-mode control PWM buck regulators)
resulting in an overly-aggressive gain profile of the
Type-III compensator, which introduces noisy behavior.
In practice, however, this instability will not affect the
performance of the system, and can be safely ignored.
 2012 Microchip Technology Inc.
AN1452
The designer must verify that the converter is stable
over the entire input voltage range. Figure 16 shows an
unstable system. A sinusoidal oscillation is
superimposed over the output voltage. This sinusoidal
oscillation has a frequency equal to the system
crossover frequency. The amplitude of this sinusoidal
oscillation will vary with the input voltage and output
current. This kind of instability is always related to the
compensation loop, and is mostly produced by low
phase and gain margins.
FIGURE 15:
The Noisy System.
FIGURE 16:
The Unstable System.
Design Summary
with a typical application schematic. The frequency
analyses results and the estimated, full-load efficiency
are also plotted.
The fourth tab of the Design Tool provides the design
summary. This page lists all the values for the power
train and compensation network components, together
+VIN
CIN
ON
MCP19035
OFF
SHDN
BOOT
VIN
HDRV
CBOOT
PWRGD
C2
PHASE
COMP
LDRV
FB
+VCC
Q1
Q2
+VOUT
COUT
CVCC
C3
L
CIN
COUT
CBOOT
1
20
200
0.33
µH
µF
µF
µF
R1
R2
R3
R4
C1
C2
C3
20
10
0.75
8.2
0.68
3.9
0.033
k:
k:
k:
k:
nF
nF
nF
R4
FCROSSOVER
Phase Margin
Gain Margin
R1
63000
62.1
22.9
Hz
Degrees
dB
R3
R2
C1
Estimated Efficiency at Full Load
FIGURE 17:
88.7
%
The Design Summary.
 2012 Microchip Technology Inc.
DS01452A-page 7
AN1452
STEP-BY-STEP DESIGN EXAMPLE
For the input voltage, enter the maximum value. This
will ensure that the current ripple in the inductor will be
maintained at 30% of the maximum output current at
high-input voltages.
This section presents a practical design example using
the MCP19035 Synchronous Buck Converter Design
Tool.
Due to the space constraints of the final application, the
converter must be compact, while maintaining high
efficiency. The load that must be powered from this
converter will produce a step load between 2.5A and
7.5A. The maximum output voltage overshoot during
step load must be lower than 100 mV.
The project implies the design of a step-down,
synchronous buck converter using the MCP19035. The
system has the following input parameters:
TABLE 1:
CONVERTER PARAMETERS
Parameter
Input Voltage Range
Output Voltage
Value
Unit
8 – 14
V
1.8
V
Maximum Output Current
10
A
Input Voltage Ripple
0.2
V
IOH (Step Load High Value)
7.5
A
IOL (Step Load Low Value)
2.5
A
Output Voltage Overshoot
0.1
V
TABLE 2:
For this application, the designer may choose the
600 kHz switching frequency version with optimized
dead time. The higher switching frequency will help
minimize the power train component’s size, while the
optimized dead time option will increase the system’s
efficiency.
Step 1: Introducing the Parameters
Start the MCP19035 Synchronous Buck Converter
Design Tool. All the input parameters of the converter
are introduced in the table on the first tab of the Design
Tool.
INPUT PARAMETERS FOR DESIGN
Value(1)
Unit
VIN
14
V
Output Voltage
VOUT
1.8
V
Output Current
IOUT
10
A
Parameter
Input Voltage
Designator
Switching Frequency
Fs
600000
Hz
Input Voltage Ripple
VRIN
0.2
V
Reference Voltage
VREF
0.6
V
Step Load High
IOH
7.5
A
Step Load Low
IOL
2.5
A
0.1
V
Notes
5V = VIN = 30V
Fs = 300 kHz or 600 kHz
Step Load Parameters
Output Voltage Overshoot
Note 1:
The values in this column must be filled in by the designer.
DS01452A-page 8
 2012 Microchip Technology Inc.
AN1452
Step 2: Calculate the Values
The second page of the Design Tool shows the
calculated values for various system parameters, such
as RMS currents for low- and high-side MOSFETs, the
inductor and the input and output filtering capacitors
(Table 3).
Fill in the standard values of the power train according
to the recommendations provided by MCP19035’s data
sheet. For example, the Design Tool calculates an
inductor value of 0.87 µH and, based on the
recommendations, the next standard value is 1 µH. For
the capacitor, it is generally advisable to choose a
higher value, because ceramic capacitors have large
tolerances and exhibit a negative capacitance variation
with voltage across the terminals.
TABLE 3:
POWER TRAIN COMPONENTS
VALUES (CALCULATED)
Since this application requires high efficiency, Microchip's MCP87050 and MCP87022 MOSFETs will be
used. The requested parameters are available in the
components’ data sheet. These MOSFETs are suitable
for use with the optimized dead time version of the
MCP19035. In this case, the "Total Conduction Time for
the Body Diode" parameter is fixed, and equals 12 ns.
The DC resistance of the inductor and ESRs of the
input and output capacitors are entered in the same
table. All these parameters will affect the performance
of the converter and the designer must carefully select
them, in concordance with the MCP19035 data sheet’s
recommendations.
TABLE 4:
POWER TRAIN COMPONENTS
PARAMETERS
Parameter
High side MOSFET
RDS(ON)HS
6
m
QGATEHS
13.8
nC
RDS(ON)LS
2.5
m
QGATELS
31
nC
tBD
12
ns
Reverse Recovery
Charge of the Body
Diode
QRR
35
nC
Inductor DC Resistance
LDCR
2
m
CIN ESR
10
m
COUT ESR
5
m
Suggested
Value
Standard
Value(2)
Unit
Inductor Value
0.87
1
µH
Low side MOSFET
COUT(1)
135.1
200
µF
RDS(ON)
10
20
µF
Total gate charge
0.276
0.33
µF
Total Conduction Time
for the Body Diode
Component
CIN
CBOOT
Note 1:
2:
To calculate the value of the bootstrap capacitor
(CBOOT), the high-side MOSFET’s parameters must be
introduced in the Power Train Components Parameters
table (Table 4).
Choose the MOSFETs, inductor and filtering capacitor’s parameters, based on the RMS currents calculated by the Design Tool and following the
recommendations from the MCP19035 data sheet.
These parameters must be entered in Table 4 (Power
Train Components Parameters table).
 2012 Microchip Technology Inc.
RDS(ON)
Total gate charge
COUT is calculated based on the standard
value for inductor and not for suggested
value.
The values in this column must be filled in
by the designer
Designator Value(1) Unit
Note 1:
The values in this column must be filled in
by the designer.
Based on the parameters of the power train
components, the Design Tool will estimate the system
losses and the efficiency at full load. Note that the
losses are affected by the input voltage; the worst case
is at maximum input voltage, 14V in this case.
DS01452A-page 9
AN1452
TABLE 5:
ESTIMATED SYSTEM LOSSES
Parameter
Value
Compensation Network
Components (1)
Conduction losses
0.08
W
Switching losses
1.1592
W
Total losses
1.2392
W
Low-Side MOSFET losses
Conduction losses
0.2
W
Body diode conduction losses
0.0504
W
Body diode reverse recovery
losses
0.147
W
Total losses
0.3974
W
0.4
W
Controller losses
Inductor conduction losses
0.2
W
COUT losses
0.015
W
CIN losses
0.05
W
Total losses
2.3016
W
88.7
%
Estimated Efficiency at Full Load
Step 3: Frequency Domain Analysis
The next step of the design is the frequency domain
analysis. This analysis can be performed on the third
tab of the Design Tool. The Design Tool calculates the
values of the compensation network components
according to the procedures described in the
MCP19035 data sheet (Table 6).
COMPENSATION NETWORK
CALCULATED VALUES
Calculated Values
for the Compensation Network (1)
Units
20
k
R2
10
k
R3
0.75
k
R4
7.62
k
C1
0.71
nF
C2
3.71
nF
C3
0.035
nF
R1
Note 1:
COMPENSATION NETWORK
COMPONENTS
Unit
High-Side MOSFET losses
TABLE 6:
TABLE 7:
Units
R1
20
k
R3
0.75
k
R4
8.2
k
C1
0.68
nF
C2
3.9
nF
C3
3.30E-02
nF
Note 1:
These values must be filled in by the
designer.
Based on these values, the Design Tool will plot the
Bode plots and calculate the crossover frequency,
phase and gain margin of the compensated system.
Adjust the values of the compensation network
components to modify the frequency response of the
system. Note that the frequency response of the
system is affected by the value of the input voltage. It is
advisable to perform the frequency analyses for the
entire range of the input voltage. The worst case occurs
again at high input voltages because the PWM
modulator gain increases with the input voltage.
TABLE 8:
SYSTEM PARAMETERS
Parameter
Value
Unit
63000
Hz
Phase Margin
62.1
Degrees
Gain Margin
22.9
dB
FCrossover
Step 4: Design Summary
The last tab of the Design Tool shows the summary of
the design and the typical application schematic for the
synchronous buck regulator, based on the MCP19035
device. The designer can generate the final schematic
for the step down regulator with these component’s
values.
The values with yellow background must
be filled in by the designer. The ones with
green background are calculated by the
tool.
Enter the calculated values in the Compensation
Network Components table (Table 7).
DS01452A-page 10
 2012 Microchip Technology Inc.
AN1452
+VIN
CIN
ON
MCP19035
OFF
SHDN
BOOT
VIN
HDRV
CBOOT
PWRGD
PHASE
COMP
LDRV
FB
+VCC
Q1
Q2
C2
+VOUT
COUT
CVCC
C3
L
CIN
COUT
CBOOT
1
20
200
0.33
µH
µF
µF
µF
R1
R2
R3
R4
C1
C2
C3
20
10
0.75
8.2
0.68
3.9
0.033
k:
k:
k:
k:
nF
nF
nF
R4
FCROSSOVER
Phase Margin
Gain Margin
R1
C1
63000
62.1
22.9
Hz
Degrees
dB
R3
R2
Estimated Efficiency at Full Load
FIGURE 18:
88.7
%
The Design Summary.
REFERENCES
1.
Erikson, Robert W. and Maksimovic, Dragan –
"Fundamentals of Power Electronics (Second
Edition)", ©2001, Springer Science and
Business Media, Inc.
 2012 Microchip Technology Inc.
DS01452A-page 11
AN1452
APPENDIX A:
LIST OF THE DESIGN TOOL FORMULAS
Parameter Name
Equation
Inductor Value (H)(for 30% current ripple)
VOUT
1
1
L =  VINMAX – V OUT   -------------------  --------  -----------------------------------V INMAX f SW 0.3  I OUTMAX
Inductor Peak Current (A)
(for 30% current ripple)
0.3  I OUTMAX
I LPEAK = I OUTMAX + -----------------------------------2
Inductor RMS Current (A)
I LRMS =
Minimum Capacitance for Input Capacitor (F)
I OUT  D   1 – D 
CINMIN = ---------------------------------------------------------------------------------------f SW   V Ripple –  D  I OUT  ESR  
RMS Current in the Input Capacitor (A)
IRMS  C
Output Voltage Ripple (V)
Output Capacitor Minimum Value (F)
2
2 I Ripple
I OUT + ---------------3
IN 
I Ripple
VOUT  I OUT
=  I OUT + ----------------  D – -------------------------------
12 
VIN
1
VRipple = I Ripple   ESR + --------------------------------------
8  COUT  f SW
L  I OH2– IOL2
C OUT = ----------------------------------2
2
V f – V OUT
RMS Value for High-side Current (A)
I RMS High-Side =
I Ripple2
D   I OUT2 + ---------------- 
12 
Conduction Losses for High-side MOSFET (W)
PCOND High-Side = I RMS High-Side2 R DS  on HS  max 
Switching Losses for High-side MOSFET (W)
V IN  I OUT
P SW High_Side =  ---------------------------   ts  HL  + ts  LH    fSW


2
Total Power Losses for High-side MOSFET (W)
P Loss High-Side = PCOND High-Side + P SW High-Side
RMS Current for Low-side MOSFET (W)
I RMS Low-Side =
Conduction Losses for Low-side MOSFET (W)
Body Diode Conduction Losses (W)
Body Diode Reverse Recovery Losses (W)
DS01452A-page 12
I Ripple2
 1 – D    I OUT2 + ---------------- 
12 
P COND Low-Side = I RMS Low-Side 2 R DS  on LS  max 
PLoss
BD
= I OUT  V F  t BD  f SW
Q RR  V IN  f SW
P RR = ---------------------------------------2
 2012 Microchip Technology Inc.
AN1452
APPENDIX A:
LIST OF THE DESIGN TOOL FORMULAS (CONTINUED)
Parameter Name
Total Power Losses for Low-side MOSFET (W)
Controller Losses (W)
(considering that the internal circuitry losses
are 0.005W)
Inductor Losses (W)
Output Capacitor Losses (W)
(for 30% current ripple)
Equation
P Loss = P COND
Low – Side
+ PLoss
BD
+ P RR
P Loss = VIN   0.005 + F S   Q Gate,low + Q Gate,high  
2
P Loss = DCRL  I L
RMS
0.3  IOUT
PLoss = ESR COUT  -------------------------3
Input Capacitor losses (W)
V OUT  I OUT 2
PLoss = ESR CIN   I RMS High – --------------------------------


V IN
Bootstrap Capacitor (F)
Q G  Total 
C BOOT = ------------------------ VDROOP
Resonant Frequency of the LC Circuit (Hz)
PWM Modulator Gain
Quality Factor
Angular Corner Frequency
Transfer Function of the Power Train
Transfer Function of the Type III Compensation
Network
Feedback resistor divider ()
 2012 Microchip Technology Inc.
1
f LC = ----------------------------------------2   L  C OUT
V IN
A MOD = 20  log --------------------- = 20  log V IN
 V RAMP
V OUT
C OUT
Q = -------------  -------------I OUT
L
1
L  COUT
 0 = ---------------------------1
G VG  s  = G 0  ------------------------------------------2s
s
1 + ----------- +  ------
Q  0   0
1  
1
 s + ------------------  s + -------------------------------------

 R 1 + R3   C 1
R 4  C 2 
R1 + R 3
G  s  = – A 0  -------------------------------  -----------------------------------------------------------------------------------------------C2 + C3
R 1  R 3  C1
1
s   s + -------------------------------   s + -------------------

R 4  C 2  C 3 
R 3  C 1
V REF  R 1
0.6  R 1
R 2 = --------------------------------- = --------------------------V OUT – VREF
VOUT – 0.6
DS01452A-page 13
AN1452
APPENDIX A:
LIST OF THE DESIGN TOOL FORMULAS (CONTINUED)
Parameter Name
Equation
Capacitor C1 (F)
L  COUT
C 1 = ---------------------------R1
Resistor R4 ()
fCO
1
R 4 = --------  --------  R1
f LC V IN
Capacitor C2 (F)
2  L  C OUT
C 2 = ------------------------------------R4
Capacitor C3 (F)
Resistor R3 ()
Input Power (W)
1
C 3 = --------------------------------2   R 4  fSW
1
R 3 = -----------------------------  C 1  f SW
U OUT  I OUTmax
PIN = -----------------------------------------Eff
Total converter losses (W)
P Loss = P IN – P OUT
Maximum RDS(on) ()
DS01452A-page 14
PLoss High – Side
R DS  on  = ---------------------------------------  0.4
I RMS High – Side2
 2012 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
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•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
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Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
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ISBN: 978-1-62076-661-3
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DS01452A-page 15
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