EVB71101 Description DownloadLink 4724

EVB71101
315/433MHz Receiver
Evaluation Board Description
Features
ˆ
ˆ
ˆ
ˆ
ˆ
Single-conversion superhet architecture for low external component count
FSK demodulation with phase-coincidence demodulator
Low current consumption in active mode and very low standby current
Switchable LNA gain for improved dynamic range
RSSI allows signal strength indication and ASK detection
Ordering Information
Part No.
EVB71101-433-FSK-C
EVB71101-433-ASK-C
EVB71101-315-FSK-C
EVB71101-315-ASK-C
* EVB71101-XXX-YYY-C with XXX = Reception frequency (315MHz or 433.92MHz) and YYY = Modulation (FSK or ASK).
** The evaluation board is supplied with a SMA connector.
Application Examples
ˆ
ˆ
ˆ
ˆ
ˆ
ˆ
ˆ
‰
ˆ
Evaluation Board
General digital data transmission
Tire Pressure Monitoring Systems (TPMS)
Remote Keyless Entry (RKE)
Wireless access control
Alarm and security systems
Garage door openers
Remote Controls
Home and building automation
Low-power telemetry systems
General Description
The TH71101 FSK/ASK single-conversion superheterodyne receiver IC is designed for applications in the
European 433 MHz industrial-scientific-medical (ISM) band, according to the EN 300 220
telecommunications standard. It can also be used for any other system with carrier frequencies ranging from
300 MHz to 450 MHz (e.g. for applications to FCC part 15 and ARIB STD-T67).
39012 71101 01
Rev. 012
Page 1 of 14
EVB Description
April/08
EVB71101
315/433MHz Receiver
Evaluation Board Description
Document Content
1
Theory of Operation ...................................................................................................3
1.1
General ............................................................................................................................. 3
1.2
EVB Technical Data Overview ......................................................................................... 3
1.3
Block Diagram .................................................................................................................. 4
1.4
Mode Configurations ........................................................................................................ 4
1.5
LNA GAIN Control ............................................................................................................ 4
1.6
Frequency Planning.......................................................................................................... 4
1.6.1
1.6.2
2
Selected Frequency Plans........................................................................................................... 5
Maximum Frequency Coverage................................................................................................... 5
Application Circuits ...................................................................................................6
2.1
2.1.1
2.1.2
2.1.3
2.2
2.2.1
2.2.2
2.2.3
FSK Application Circuit ..................................................................................................... 6
Circuit Diagram for FSK Reception.............................................................................................. 6
Board Component Values for FSK .............................................................................................. 7
Component Arrangement Top Side for FSK Reception .............................................................. 8
ASK Application Circuit..................................................................................................... 9
Circuit Diagram for ASK Reception ............................................................................................. 9
Board Component Values for ASK ............................................................................................ 10
Component Arrangement Top Side for ASK Reception ............................................................ 11
3
Evaluation Board Layouts .......................................................................................12
4
Package Description ................................................................................................13
4.1
5
Soldering Information ..................................................................................................... 13
Disclaimer .................................................................................................................14
39012 71101 01
Rev. 012
Page 2 of 14
EVB Description
April/08
EVB71101
315/433MHz Receiver
Evaluation Board Description
1
Theory of Operation
1.1
General
With the TH71101 receiver chip, various circuit configurations can be arranged in order to meet a number of
different customer requirements. For FSK reception the IF tank used in the phase coincidence demodulator
can be constituted by an external ceramic discriminator. In ASK configuration, the RSSI signal is fed to an
ASK detector, which is constituted by the operational amplifier.
A double-conversion variant, called TH71102, is also available. This receiver IC allows a higher degree of
image rejection, achieved in conjunction with an RF front-end filter. Both RXICs have the same die. At the
TH71102, the second mixer (MIX2) is used to down-convert the first IF (IF1) to the second IF (IF2). At the
TH71101, MIX2 operates as an amplifier.
Efficient RF front-end filtering is realized by using a SAW, ceramic or helix filter in front of the LNA and by
adding an LC filter at the LNA output.
The TH71101 receiver IC consists of the following building blocks:
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
1.2
PLL synthesizer (PLL SYNTH) for generation of the local oscillator signal LO parts of the PLL SYNTH
are: the high-frequency VCO1, the feedback divider DIV_16, a phase-frequency detector (PFD) with
charge pump (CP) and a crystal-based reference oscillator (RO)
Low-noise amplifier (LNA) for high-sensitivity RF signal reception
First mixer (MIX1) for down-conversion of the RF signal to the IF
IF pre amplifier which is a mixer cell (MIX2) that operates as an amplifier
IF amplifier (IFA) to amplify and limit the IF signal and for RSSI generation
Phase coincidence demodulator (DEMOD) with third mixer (MIX3) to demodulate the IF signal
Operational amplifier (OA) for data slicing, filtering and ASK detection
Bias circuitry for bandgap biasing and circuit shutdown
EVB Technical Data Overview
ˆ Input frequency range: 300 MHz to 450 MHz
ˆ Power supply range: 2.3 V to 5.5 V @ ASK
2.7 V to 5.5 V @ FSK
ˆ Temperature range: -40 °C to +85 °C
ˆ Standby current: 50 nA
ˆ Operating current: 6.5 mA @ low gain mode
8.2 mA @ high gain mode
ˆ Sensitivity: -110 dBm @ ASK 1)
-104 dBm @ FSK 2)
ˆ Range of IF: 400 kHz to 22 MHz
ˆ Maximum input level: -10 dBm @ ASK
0 dBm @ FSK
ˆ Image rejection: > 45 dB (e.g. with 433.92 MHz
SAW front-end filter and at 10.7 MHz IF)
ˆ Spurious emission: < -70 dBm
ˆ Input frequency acceptance range: up to ±100 kHz
ˆ RSSI range: 70 dB
ˆ FSK deviation range: ±2.5 kHz to ±80 kHz
1) at 4 kbps NRZ, BER = 3⋅10-3, 180 kHz IF filter BW, incl. 3 dB SAW front-end-filter loss
2) at 4 kbps NRZ, BER = 3⋅10-3, ± 20 kHz FSK deviation, 180 kHz IF filter BW, incl. 3 dB SAW front-endfilter loss
For more detailed information, please refer to the latest TH71101 data sheet revision
39012 71101 01
Rev. 012
Page 3 of 14
EVB Description
April/08
EVB71101
315/433MHz Receiver
Evaluation Board Description
IN_LNA
31
21
14
15
16
MIX1
IF
LNA
MIX2
IN_DEM
13
OUT_IFA
12
RSSI
11
FBC1
10
IN_IFA
9
VEE_IF
8
OUT_MIX2
7
VCC_MIX
6
IF1N
5
IF1P
4
VEE_MIX
3
IN_MIX1
2
OUT_LNA
1
GAIN_LNA
Block Diagram
VEE_LNAC
1.3
OUTP
MIX3
IF
23
IFA
OUTN
24
LO
OAP
OA
20
OAN
19
PFD
OUT_OA
RO
27
28
22
17
VCC_BIAS
25
ENRX
26 RO
VCC_PLL
29 LF
VEE_RO
30
18
BIAS
CP
VEE_LNA
32
VCC_LNA
VCO1
VEE_BIAS
DIV_16
Fig. 1: TH71101 block diagram
1.4
Mode Configurations
ENRX
Mode
Description
0
RX standby
RX disabled
1
RX active
RX enable
Note: ENRX are pulled down internally
1.5
LNA GAIN Control
VGAIN_LNA
Mode
Description
< 0.8 V
HIGH GAIN
LNA set to high gain
> 1.4 V
LOW GAIN
LNA set to low gain
Note: hysteresis between gain modes to ensure stability
1.6
Frequency Planning
Frequency planning is straightforward for single-conversion applications because there is only one IF that
can be chosen, and then the only possible choice is low-side or high-side injection of the LO signal (which is
now the one and only LO signal in the receiver).
The receiver’s single-conversion architecture requires careful frequency planning. Besides the desired RF
input signal, there are a number of spurious signals that may cause an undesired response at the output.
Among them is the image of the RF signal that must be suppressed by the RF front-end filter.
39012 71101 01
Rev. 012
Page 4 of 14
EVB Description
April/08
EVB71101
315/433MHz Receiver
Evaluation Board Description
By using the internal PLL synthesizer of the TH71101 with the fixed feedback divider ratio of N = 16
(DIV_16), two types of down-conversion are possible: low-side injection of LO and high-side injection of LO.
The following table summarizes some equations that are useful to calculate the crystal reference frequency
(REF) and the LO frequency, for a given RF and IF.
1.6.1
Injection type
low
high
REF
(RF – IF)/16
(RF + IF)/16
LO
16 • REF
16 • REF
IF
RF – LO
LO – RF
RF image
RF – 2IF
RF + 2IF
Selected Frequency Plans
The following table depicts crystal, LO and image signals considering the examples of 315 MHz and
433.92 MHz RF reception at IF = 10.7 MHz.
Signal type
RF = 315 MHz
RF = 315 MHz
RF = 433.92 MHz
RF = 433.92 MHz
Injection type
low
high
low
high
REF / MHz
19.01875
20.35625
26.45125
27.78875
LO / MHz
304.3
325.7
423.22
444.62
RF image / MHz
293.6
336.4
412.52
455.32
The selection of the reference crystal frequency is based on some assumptions. As for example: the image
frequency should not be in a radio band where strong interfering signals might occur (because they could
represent parasitic receiving signals), the LO signal should be in the range of 300 MHz to 450 MHz (because
this is the optimum frequency range of the VCO1). Furthermore the IF should be as high as possible to
achieve highest RF image rejection. The columns in bold depict the selected frequency plans to receive at
315 MHz and 433.92 MHz, respectively.
1.6.2
Maximum Frequency Coverage
Parameter
fmin
fmax
Injection type
high
low
RF / MHz
289.3
460.7
REF / MHz
18.75
28.125
LO / MHz
300
450
IF/ MHz
10.7
10.7
39012 71101 01
Rev. 012
Page 5 of 14
EVB Description
April/08
EVB71101
315/433MHz Receiver
Evaluation Board Description
2
Application Circuits
2.1
FSK Application Circuit
RSSI
GND
OUT_OA
GND
Circuit Diagram for FSK Reception
OUTP
GND
2.1.1
1 2
1 2
1 2
FSK output
C16
C15
C17
R4
R5
XTAL
CB3
VCC
VCC 17
OAN 19
OAP 20
VEE 22
TH71101
29 LF
GAIN_LNA
OUT_LNA
IN_MIX1
VEE
IF1P
IF1N
VCC
CB1
R2
C10
VEE 10
1
2
3
4
5
6
7
8
32 VCC
C11
FBC1 12
IN_IFA 11
31 IN_LNA
CB4
C9
VEE
L2
VCC
FBC2 13
30 VEE
50
L1
6
1
SAWFIL
3
4
C3
C12
VCC 14
28 ENRX
R1
IN_LNA
16
27 VCC
CB2
CERDIS
OUT_IFA 15
26 RO
1 2 3
VCC
ENRX
GND
25 VEE
C_RO
OUT_OA 18
VCC
RSSI 21
24
1 2
GND
RO
OUTP 23
C1
OUT_MIX2 9
CERFIL
C7
RL2
RL1
CB5
VCC
C6
CB8
2 1
CB6
L3
GND
VCC
CB7
Circuit Features
•
•
Tolerates input frequency variations
Well-suited for NRZ, Manchester and similar codes
39012 71101 01
Rev. 012
Page 6 of 14
EVB Description
April/08
EVB71101
315/433MHz Receiver
Evaluation Board Description
2.1.2
Board Component Values for FSK
Part
Size
Value
@ 315 MHz
Value
@ 433.92 MHz
C1
0805
27 pF
27 pF
±5%
crystal series capacitor
C3
0603
1 nF
1 nF
±10%
loop filter capacitor
C6
0603
6.8 pF
4.7 pF
±5%
LNA output tank capacitor
C7
0603
2.7 pF
2.2 pF
±5%
MIX1 input matching capacitor
C9
0603
33 nF
33 nF
±10%
IFA feedback capacitor
C10
0603
1 nF
1 nF
±10%
IFA feedback capacitor
C11
0603
1 nF
1 nF
±10%
IFA feedback capacitor
C12
0805
10 pF
10 pF
±5%
DEMOD phase-shift capacitor
Tolerance
Description
C15
0805
100 pF
100 pF
±5%
demodulator output low-pass capacitor,
this value for data rates < 20 kbps NRZ,
for higher data rates decrease the value
C16
0805
1.5 nF
1.5 nF
±10%
RSSI output low-pass capacitor
C17
0805
10 nF
10 nF
±10%
data slicer capacitor,
this value for data rates > 0.8 kbps NRZ,
for lower data rates increase the value
CB1 to CB5
CB7 to CB8
0603
330 pF
330 pF
±10%
de-coupling capacitor
CB6
0805
33 nF
33 nF
±10%
de-coupling capacitor
C_RO
0603
330 pF
330 pF
±5%
optional capacitor,
to couple external RO signal
R1
0603
10 kΩ
10 kΩ
±5%
loop filter resistor
R2
0603
330 Ω
330 Ω
±5%
optional CERFIL output matching resistor
R4
0805
330 kΩ
330 kΩ
±5%
data slicer resistor
R5
0805
220 kΩ
220 kΩ
±5%
loading resistor
RL1
0805
470 Ω
470 Ω
±5%
MIX1 bias resistor
RL2
0805
470 Ω
470 Ω
±5%
MIX1 bias resistor
L1
0603
0Ω
68 nH
±5%
L2
0603
33 nH
82 nH
±5%
SAW filter matching inductor
from Würth-Elektronik (WE-KI series),
or equivalent part
L3
0603
22 nH
15 nH
±5%
XTAL
SMD
6x3.5
HC49
SMD
SAWFIL
SMD
3x3
20.35625 MHz
@ RF = 315 MHz
26.45125 MHz
@ RF = 433.92 MHz
±25ppm cal.
±30ppm temp.
SAFCC433MBL0X00
(f0 = 433.92 MHz)
B3dB = 840 kHz
SAFDC315MSM0T00
(f0 = 315.00 MHz)
CERFIL
SMD
3.45x3.1
SFECF10M7HA00
CERDIS
SMD
4.5x2
CDSCB10M7GA135
39012 71101 01
Rev. 012
LNA output tank inductor from Würth-Elektronik (WE-KI series), or equivalent part
fundamental-mode crystal from
Telcona/Horizon (HEX22 series)
or equivalent part
fundamental-mode crystal, Cload = 10 pF
to 15 pF, C0, max = 7 pF, R1, max = 50 Ωl
low-loss SAW filter from Murata,
or equivalent part
B3dB = 5MHz
B3dB = 180 kHz
ceramic filter from Murata,
or equivalent part
ceramic discriminator from Murata,
or equivalent part
Page 7 of 14
EVB Description
April/08
EVB71101
315/433MHz Receiver
Evaluation Board Description
2.1.3
Component Arrangement Top Side for FSK Reception
1
OUT_OA
RSSI
OUTP
Melexis
OUTN
Board size is 42.7mm x 37.5mm
1
C16
C15
1
R5
1
0Ω
17
16
L2
32
1
C12
C11
R2
C9
CB2
TH71101
L1
0Ω
CB4
24
25
C3
R1
RF_input
CB3
C1
C-RO
CERDIS
C17
1
ENRX RO
R4
XTAL
C10
8
9
CB1
39012 71101 01
Rev. 012
Page 8 of 14
VCC
1
CB6
RL2
CB8
EVB711XX_4
RL1
L3
C6
IN_LNA
CB7
CB5
C7
EVB Description
April/08
EVB71101
315/433MHz Receiver
Evaluation Board Description
Circuit Diagram for ASK Reception
OUT_OA
GND
2.2.1
ASK Application Circuit
RSSI
GND
2.2
1 2
1 2
ASK output
C16
R4
C17
CB3
VCC
XTAL
CB2
28 ENRX
C3
VCC 17
OAN 19
OAP 20
VEE 22
TH71101
29 LF
OUT_LNA
IN_MIX1
VEE
IF1P
IF1N
VCC
CB1
R2
C10
VEE 10
GAIN_LNA
31 IN_LNA
C11
FBC1 12
IN_IFA 11
1
2
3
4
5
6
7
8
32 VCC
CB4
C9
VEE
L2
VCC
FBC2 13
30 VEE
50
L1
6
1
SAWFIL
3
4
VCC 14
27 VCC
R1
IN_LNA
16
OUT_IFA 15
26 RO
1 2 3
VCC
ENRX
GND
25 VEE
C_RO
OUT_OA 18
VCC
RSSI 21
24
1 2
GND
RO
OUTP 23
C1
OUT_MIX2 9
CERFIL
C7
RL2
RL1
CB5
VCC
39012 71101 01
Rev. 012
CB8
Page 9 of 14
C6
2 1
CB6
L3
GND
VCC
CB7
EVB Description
April/08
EVB71101
315/433MHz Receiver
Evaluation Board Description
2.2.2
Board Component Values for ASK
Part
Size
Value
@ 315 MHz
Value
@ 433.92 MHz
C1
0805
27 pF
27 pF
±5%
crystal series capacitor
C3
0603
1 nF
1 nF
±10%
loop filter capacitor
C6
0603
6.8 pF
4.7 pF
±5%
LNA output tank capacitor
C7
0603
2.7 pF
2.2 pF
±5%
MIX1 input matching capacitor
C9
0603
33 nF
33 nF
±10%
IFA feedback capacitor
C10
0603
1 nF
1 nF
±10%
IFA feedback capacitor
C11
0603
1 nF
1 nF
±10%
IFA feedback capacitor
C16
0805
1.5 nF
1.5 nF
±10%
RSSI output low-pass capacitor,
this value for data rates < 10 kbps NRZ,
for higher data rates decrease the value
C17
0805
10 nF
10 nF
±10%
data slicer capacitor,
this value for data rates > 0.8 kbps NRZ,
for lower data rates increase the value
CB1 to CB5
CB7 to CB8
0603
330 pF
330 pF
±10%
de-coupling capacitor
CB6
0805
33 nF
33 nF
±10%
de-coupling capacitor
C_RO
0603
330 pF
330 pF
±5%
optional capacitor,
to couple external RO signal
Tolerance
Description
R1
0603
10 kΩ
10 kΩ
±5%
loop filter resistor
R2
0603
330 Ω
330 Ω
±5%
optional CERFIL output matching resistor
R4
0805
330 kΩ
330 kΩ
±5%
data slicer resistor
RL1
0805
470 Ω
470 Ω
±5%
MIX1 bias resistor
RL2
0805
470 Ω
470 Ω
±5%
MIX1 bias resistor
L1
0603
0Ω
68 nH
±5%
L2
0603
33 nH
82 nH
±5%
SAW filter matching inductor
from Würth-Elektronik (WE-KI series),
or equivalent part
L3
0603
22 nH
15 nH
±5%
SMD
6x3.5
XTAL
HC49
SMD
SAWFIL
CERFIL
SMD
3x3
SMD
3.45x3.1
39012 71101 01
Rev. 012
20.35625 MHz
@ RF = 315 MHz
26.45125 MHz
@ RF = 433.92 MHz
±25ppm cal.
±30ppm temp.
SAFCC433MBL0X00
(f0 = 433.92 MHz)
B3dB = 840 kHz
SAFDC315MSM0T00
(f0 = 315.00 MHz)
SFECF10M7HA00
LNA output tank inductor from Würth-Elektronik (WE-KI series), or equivalent part
fundamental-mode crystal from
Telcona/Horizon (HEX22 series)
or equivalent part
fundamental-mode crystal, Cload = 10 pF
to 15 pF, C0, max = 7 pF, R1, max = 50 Ωl
low-loss SAW filters from Murata
or equivalent part
B3dB = 5MHz
B3dB = 180 kHz
Page 10 of 14
ceramic filter from Murata,
or equivalent part
EVB Description
April/08
EVB71101
315/433MHz Receiver
Evaluation Board Description
2.2.3
Component Arrangement Top Side for ASK Reception
OUT_OA
RSSI
OUTP
1
C16
1
1
XTAL
C17
17
16
TH71101
L1
L2
32
1
R2
C9
CB2
C11
CB4
24
25
C3
R1
RF_input
CB3
C1
C-RO
0Ω
1
ENRX RO
R4
Melexis
OUTN
Board size is 42.7mm x 37.5mm
C10
8
9
CB1
39012 71101 01
Rev. 012
Page 11 of 14
VCC
1
CB6
RL2
CB8
EVB711XX_4
RL1
L3
C6
IN_LNA
CB7
CB5
C7
EVB Description
April/08
EVB71101
315/433MHz Receiver
Evaluation Board Description
3
Evaluation Board Layouts
VCC
Board layout data in Gerber format is available, board size is 37.5mm x 42.7mm.
OUT_OA
RSSI
OUTP
EVB711XX_4
IN_LNA
ENRX RO
Melexis
OUTN
39012 71101 01
Rev. 012
Melexis
PCB top view
PCB bottom view
Page 12 of 14
EVB Description
April/08
EVB71101
315/433MHz Receiver
Evaluation Board Description
4
Package Description
The device TH71101 is RoHS compliant.
D
D1
A
24
17
16
25
b
E
e
E1
32
9
1
8
A2
A1
12° +1°
0.25
(0.0098)
c
12° +1°
L
.10 (.004)
Fig. 2: LQFP32 (Low profile Quad Flat Package)
All Dimension in mm, coplanaríty < 0.1mm
E1, D1
E, D
A
A1
A2
e
b
c
L
α
7.00
9.00
1.40
1.60
0.05
0.15
1.35
1.45
0.8
0.30
0.45
0.09
0.20
0.45
0.75
0°
7°
0.053
0.057
0.031
0.012
0.018
0.0035
0.0079
0.018
0.030
0°
7°
min
max
All Dimension in inch, coplanaríty < 0.004”
min
max
4.1
0.276
0.354
0.055
0.063
0.002
0.006
Soldering Information
•
39012 71101 01
Rev. 012
The device TH71101 is qualified for MSL3 with soldering peak temperature 260 deg C
according to JEDEC J-STD-2.
Page 13 of 14
EVB Description
April/08
EVB71101
315/433MHz Receiver
Evaluation Board Description
5
Disclaimer
1) The information included in this documentation is subject to Melexis intellectual and other property
rights. Reproduction of information is permissible only if the information will not be altered and is accompanied by all associated conditions, limitations and notices.
2) Any use of the documentation without the prior written consent of Melexis other than the one set forth in
clause 1 is an unfair and deceptive business practice. Melexis is not responsible or liable for such altered documentation.
3) The information furnished by Melexis in this documentation is provided ’as is’. Except as expressly warranted in any other applicable license agreement, Melexis disclaims all warranties either express, implied, statutory or otherwise including but not limited to the merchantability, fitness for a particular purpose, title and non-infringement with regard to the content of this documentation.
4) Notwithstanding the fact that Melexis endeavors to take care of the concept and content of this documentation, it may include technical or factual inaccuracies or typographical errors. Melexis disclaims any
responsibility in connection herewith.
5) Melexis reserves the right to change the documentation, the specifications and prices at any time and
without notice. Therefore, prior to designing this product into a system, it is necessary to check with
Melexis for current information.
6) Melexis shall not be liable to recipient or any third party for any damages, including but not limited to
personal injury, property damage, loss of profits, loss of use, interrupt of business or indirect, special incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the information in this documentation.
7) The product described in this documentation is intended for use in normal commercial applications. Applications requiring operation beyond ranges specified in this documentation, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by Melexis for each application.
8) Any supply of products by Melexis will be governed by the Melexis Terms of Sale, published on
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ISO/TS 16949 and ISO14001 Certified
39012 71101 01
Rev. 012
Page 14 of 14
EVB Description
April/08