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ESDAXLC6-1BU2
Single-line bidirectional ESD protection for high speed interface
Datasheet - production data
Features
• Bidirectional device
• Extra low diode capacitance: 0.4 pF
• Low leakage current
• 0201 SMD package size compatible
• Ultra small PCB area: 0.18 mm2
• ECOPACK®2 and RoHS compliant component
Complies with the following standards:
0201 package
Pin 1 available in different forms
Figure 1. Functional diagram (top view)
Pin1
• IEC 61000-4-2 level 4
– ±15 kV (air discharge)
– ±8 kV (contact discharge)
Applications
Where transient overvoltage protection in ESD
sensitive equipment is required, such as:
• Smartphones, mobile phone and accessories
• Tablet PCs, netbooks and notebooks
• Portable multimedia devices and accessories
• Digital cameras and camcorders
• Communication and highly integrated systems
Description
The ESDAXLC6-1BU2 is a bidirectional single
line TVS diode designed to protect the data lines
or other I/O ports against ESD transients.
The device is ideal for applications where both
reduced line capacitance and board space saving
are required.
March 2014
This is information on a product in full production.
DocID023702 Rev 2
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Characteristics
ESDAXLC6-1BU2
1
Characteristics
Table 1.
Absolute maximum ratings (Tamb = 25 °C)
Symbol
Parameter
Value
Unit
± 16
± 25
kV
VPP
Peak pulse voltage:
IEC 61000-4-2 contact discharge
IEC 61000-4-2 air discharge
PPP
Peak pulse power (8/20 µs)
40
W
IPP
Peak pulse current (8/20 µs)
1.3
A
Tj
Operating junction temperature range
- 40 to +150
°C
Tstg
Storage temperature range
- 65 to +150
°C
TL
Maximum lead temperature for soldering during 10 s
260
°C
Note:
For a surge greater than the maximum values, the diode will fail in short-circuit
Figure 2. Electrical characteristics (definitions)
Symbol
VBR
VRM
IRM
IPP
=
=
=
=
Parameter
Breakdown voltage
Stand-off voltage
Leakage current @ VRM
Peak pulse current
Rd
αT
C
=
=
=
Dynamic impedance
Voltage temperature coefficient
Parasite capacitance
Table 2. Electrical characteristics (values, Tamb = 25 °C)
Symbol
Test Condition
Min.
Typ.
Max.
VBR
IR = 1 mA
IRM
VRM = 3 V
70
nA
VCL
IPP = 1 A, 8/20 µA
17
V
Cline
F = (200 MHz- 3000 MHz), VR = 0 V
0.5
pF
2/9
6
Unit
V
0.4
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ESDAXLC6-1BU2
Characteristics
Figure 3. Leakage current versus junction
temperature (typical values)
Figure 4. Junction capacitance versus applied
voltage (typical values)
IR(nA)
10.00
C (pF)
1.0
VR = 3 V Direct/Reverse
Vosc = 30 mVRMS
Tj = 25°C
direct / reverse
0.8
1.00
0.6
0.4
0.10
0.2
VR(V)
Tj(°C)
0.0
0.01
25
35
45
55
65
75
85
95
0
105 115 125 135 145
Figure 5. ESD response to IEC 61000-4-2
(+8 kV contact discharge)
50 V/div
1
2
4
5
Figure 6. ESD response to IEC 61000-4-2
(-8 kV contact discharge)
50 V/div
1
2
3
4
VCL: Peak clamping voltage
VCL :clamping voltage at 30 ns
VCL :clamping voltage at 60 ns
VCL :clamping voltage at 100 ns
4
3
2
1
3
-31 V
-14 V
-41 V
158 V
1
22
42 V
3
29 V
4
1
2
-163 V
3
4
15 V
VCL: Peak clamping voltage
VCL :clamping voltage at 30 ns
VCL :clamping voltage at 60 ns
VCL :clamping voltage at 100 ns
20 ns/div
20 ns/div
Figure 7. Attenuation measurement results
0.00
S21(dB)
-1.00
-2.00
-3.00
-4.00
-5.00
F(Hz)
-6.00
10.0M
100.0M
1.0G
10.0G
100.0G
ESDAXLC6-1BU2
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Package information
2
ESDAXLC6-1BU2
Package information
•
Epoxy meets UL94, V0
•
Lead-free package
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 8. 0201 dimension definitions
E
D
Top
A
L1
Side
L2
b1
b2
Bottom
Pin 1 L1 e L2
b1
b2
Bottom
e
Pin 1 available in different forms
Table 3. 0201 package dimension values
Dimensions
Ref.
Millimeters
Min.
Typ.
Max.
Min.
Typ.
Max.
A
0.23
0.28
0.33
0.0091
0.0110
0.0130
b1
0.20
0.25
0.30
0.0079
0.0098
0.0118
b2
0.20
0.25
0.30
0.0079
0.0098
0.0118
D
0.25
0.30
0.35
0.0099
0.0118
0.0138
E
0.55
0.60
0.65
0.0217
0.0236
0.0256
e
4/9
Inches
0.35
0.0138
L1
0.13
0.18
0.23
0.0052
0.0071
0.0091
L2
0.14
0.19
0.24
0.0055
0.0075
0.0095
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ESDAXLC6-1BU2
Package information
Figure 9. Footprint dimensions in mm
(inches)
0.243
(0.0096)
0.656
(0.0258)
Figure 10. Marking
0.243
(0.0096)
Z2
Pin2
0.300
(0.0118)
Pin 1
0.170
(0.0067)
Product marking may be rotated by 180° for assembly plant differentiation. In no case
should this product marking be used to orient the component for its placement on a PCB.
Only pin 1 mark is to be used for this purpose.
Figure 11. Tape and reel specifications
Bar indicates Pin 1
Ø 1.55
4.0
2.0
3.5
0.67
1.75
0.22
8.0
Note:
Z2
Z2
Z2
0.38
Z2
Z2
All dimensions in mm
Z2
Z2
0.34
2.0
User direction of unreeling
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Recommendation on PCB assembly
ESDAXLC6-1BU2
3
Recommendation on PCB assembly
3.1
Stencil opening design
Figure 12. Recommended stencil windows position
0.230
(0.0091)
0.643
(0.0253)
0.183
(0.0072)
0.285
(0.0112)
0.008
(0.0003)
0.300
(0.0118)
0.008
(0.0003)
0.656
(0.0258)
0.007
0.007
(0.00027) (0.00027)
0.170
(0.0067)
0.243
(0.0096)
mm
(inches)
Footprint
3.2
6/9
Stencil window
Solder paste
1.
Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
2.
“No clean” solder paste is recommended.
3.
Offers a high tack force to resist component movement during high speed
4.
Solder paste with fine particles: powder particle size is 20-45 µm.
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ESDAXLC6-1BU2
3.3
3.4
3.5
Recommendation on PCB assembly
Placement
1.
Manual positioning is not recommended.
2.
It is recommended to use the lead recognition capabilities of the placement system, not
the outline centering
3.
Standard tolerance of ± 0.05 mm is recommended.
4.
3.5 N placement force is recommended. Too much placement force can lead to
squeezed out solder paste and cause solder joints to short. Too low placement force
can lead to insufficient contact between package and solder paste that could cause
open solder joints or badly centered packages.
5.
To improve the package placement accuracy, a bottom side optical control should be
performed with a high resolution tool.
6.
For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is
recommended during solder paste printing, pick and place and reflow soldering by
using optimized tools.
PCB design preference
1.
To control the solder paste amount, the closed via is recommended instead of open
vias.
2.
The position of tracks and open vias in the solder area should be well balanced. The
symmetrical layout is recommended, in case any tilt phenomena caused by
asymmetrical solder paste amount due to the solder flow away.
Reflow profile
Figure 13. ST ECOPACK® recommended soldering reflow profile for PCB mounting
240-245 °C
Temperature (°C)
250
-2 °C/s
2 - 3 °C/s
60 sec
(90 max)
200
-3 °C/s
150
-6 °C/s
100
0.9 °C/s
50
Time (s)
0
Note:
30
60
90
120
150
180
210
240
270
300
Minimize air convection currents in the reflow oven to avoid component movement.
Maximum soldering profile corresponds to the latest IPC/JEDEC J-STD-020.
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Ordering information
4
ESDAXLC6-1BU2
Ordering information
Figure 14. Ordering information scheme
ESDA XLC 6 - 1B U2
ESDA array
Extra low capacitance
Breakdown voltage
6 = 6 V min
Direction
B = Bidirectional
Package
U2 = ST0201
Table 4. Ordering information
Order code
Marking
(1)
ESDAXLC6-1BU2
Z2
Weight
Base qty
Delivery mode
0.124 mg
15000
Tape and reel
1. The marking can be rotated by 180° to differentiate assembly location
5
Revision history
Table 5. Document revision history
8/9
Date
Revision
Changes
21-Sep-2012
1
Initial release.
27-Mar-2014
2
Updated Figure 5, Figure 6, Figure 7, Figure 9 and Figure 13.
Updated package graphics.
DocID023702 Rev 2
ESDAXLC6-1BU2
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