PA K 33 PSMN2R9-30MLC LF N-channel 30 V 2.95 mΩ logic level MOSFET in LFPAK33 using NextPower Technology Rev. 2 — 15 June 2012 Product data sheet 1. Product profile 1.1 General description Logic level enhancement mode N-channel MOSFET in LFPAK33 package. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment. 1.2 Features and benefits Low parasitic inductance and resistance Optimised for 4.5V Gate drive utilising NextPower Superjunction technology Ultra low QG, QGD, & QOSS for high system efficiencies at low and high loads 1.3 Applications DC-to-DC converters Synchronous buck regulator Load switching 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions VDS drain-source voltage Tj = 25 °C ID drain current Tmb = 25 °C; VGS = 10 V; see Figure 1 Ptot total power dissipation Tmb = 25 °C; see Figure 2 Tj junction temperature [1] Min Typ Max Unit - - 30 V - - 70 A - - 91 W -55 - 175 °C VGS = 4.5 V; ID = 25 A; Tj = 25 °C; see Figure 10 - 3.3 3.8 mΩ VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 10 - 2.45 2.95 mΩ Static characteristics RDSon drain-source on-state resistance Dynamic characteristics QGD gate-drain charge VGS = 4.5 V; ID = 25 A; VDS = 15 V; see Figure 12; see Figure 13 - 4.4 - nC QG(tot) total gate charge VGS = 4.5 V; ID = 25 A; VDS = 15 V; see Figure 12; see Figure 13 - 16.7 - nC [1] Continuous current is limited by package. PSMN2R9-30MLC NXP Semiconductors N-channel 30 V 2.95 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 S source 2 S source 3 S source 4 G gate mb D mounting base; connected to drain Graphic symbol D G S mbb076 1 2 3 4 SOT1210 (LFPAK33) 3. Ordering information Table 3. Ordering information Type number Package PSMN2R9-30MLC Name Description Version LFPAK33 Plastic single ended surface mounted package (LFPAK33); 4 leads SOT1210 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj = 25 °C - 30 V VGS gate-source voltage drain current ID -20 20 V VGS = 10 V; Tmb = 25 °C; see Figure 1 [1] - 70 A VGS = 10 V; Tmb = 100 °C; see Figure 1 [1] - 70 A IDM peak drain current pulsed; tp ≤ 10 µs; Tmb = 25 °C; see Figure 4 - 523 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - 91 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Tsld(M) peak soldering temperature - 260 °C VESD electrostatic discharge voltage MM (JEDEC JESD22-A115) 340 - V Source-drain diode IS source current Tmb = 25 °C - 70 A ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 523 A VGS = 10 V; Tj(init) = 25 °C; ID = 70 A; Vsup ≤ 30 V; RGS = 50 Ω; unclamped; see Figure 3 - 75 mJ Avalanche ruggedness EDS(AL)S [1] non-repetitive drain-source avalanche energy Continuous current is limited by package. PSMN2R9-30MLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 2 of 14 PSMN2R9-30MLC NXP Semiconductors N-channel 30 V 2.95 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 003aaj714 150 03na19 120 ID (A) Pder (%) 120 80 90 (1) 60 40 30 0 0 Fig 1. 50 100 150 Tmb (°C) 0 200 0 50 100 150 200 Tmb (°C) Continuous drain current as a function of mounting base temperature Fig 2. Normalized total power dissipation as a function of mounting base temperature 003aaj715 102 IAL (A) (1) 10 (2) 1 10-3 Fig 3. 10-2 10-1 1 tAL (ms) 10 Single pulse avalanche rating; avalanche current as a function of avalanche time PSMN2R9-30MLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 3 of 14 PSMN2R9-30MLC NXP Semiconductors N-channel 30 V 2.95 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 003aaj716 103 ID (A) Limit RDSon = VDS / ID 10 tp =10 μ s 2 100 μ s 10 DC 1 ms 10 ms 1 100 ms 10-1 10-1 Fig 4. 1 10 102 VDS (V) Safe operating area; continuous and peak drain currents as a function of drain-source voltage 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base see Figure 5 - 1.44 1.65 K/W 003aaj717 10 Zth(j-mb) (K/W) δ = 0.5 1 0.2 0.1 10-1 0.05 0.02 P d= tp T 10-2 single shot t tp T 10-3 10-6 Fig 5. 10-5 10-4 10-3 10-2 10-1 tp (s) 1 Transient thermal impedance from junction to mounting base as a function of pulse duration PSMN2R9-30MLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 4 of 14 PSMN2R9-30MLC NXP Semiconductors N-channel 30 V 2.95 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 6. Characteristics Table 6. Characteristics Symbol Parameter Conditions Min Typ Max Unit - - V Static characteristics V(BR)DSS drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = 25 °C 30 ID = 250 µA; VGS = 0 V; Tj = -55 °C 27 - - V VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C 1.45 1.78 2.15 V ∆VGS(th)/∆T gate-source threshold voltage variation with temperature - -4.3 - mV/K IDSS drain leakage current VDS = 30 V; VGS = 0 V; Tj = 25 °C - - 1 µA VDS = 30 V; VGS = 0 V; Tj = 150 °C - - 100 µA VGS = 16 V; VDS = 0 V; Tj = 25 °C - - 100 nA VGS = -16 V; VDS = 0 V; Tj = 25 °C - - 100 nA VGS = 4.5 V; ID = 25 A; Tj = 25 °C; see Figure 10 - 3.3 3.8 mΩ VGS = 4.5 V; ID = 25 A; see Figure 11; see Figure 10 - - 6.5 mΩ VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 10 - 2.45 2.95 mΩ VGS = 10 V; ID = 25 A; Tj = 150 °C; see Figure 10; see Figure 11 - - 5.05 mΩ f = 1 MHz 1.23 2.46 4.92 Ω ID = 25 A; VDS = 15 V; VGS = 10 V; see Figure 12; see Figure 13 - 36.1 - nC ID = 25 A; VDS = 15 V; VGS = 4.5 V; see Figure 12; see Figure 13 - 16.7 - nC ID = 0 A; VDS = 0 V; VGS = 10 V - 34.8 - nC ID = 25 A; VDS = 15 V; VGS = 4.5 V; see Figure 12; see Figure 13 - 6.1 - nC - 3.9 - nC IGSS RDSon RG gate leakage current drain-source on-state resistance gate resistance Dynamic characteristics QG(tot) total gate charge QGS gate-source charge QGS(th) pre-threshold gate-source charge QGS(th-pl) post-threshold gate-source charge - 2.2 - nC QGD gate-drain charge - 4.4 - nC VGS(pl) gate-source plateau voltage ID = 25 A; VDS = 15 V; see Figure 12; see Figure 13 - 2.7 - V Ciss input capacitance - 2419 - pF Coss output capacitance VDS = 15 V; VGS = 0 V; f = 1 MHz; Tj = 25 °C; see Figure 14 - 500 - pF Crss reverse transfer capacitance - 180 - pF PSMN2R9-30MLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 5 of 14 PSMN2R9-30MLC NXP Semiconductors N-channel 30 V 2.95 mΩ logic level MOSFET in LFPAK33 using NextPower Technology Table 6. Characteristics …continued Symbol Parameter Conditions Min Typ Max Unit td(on) turn-on delay time - 17.7 - ns tr rise time VDS = 15 V; RL = 0.6 Ω; VGS = 4.5 V; RG(ext) = 4.7 Ω - 30.8 - ns td(off) turn-off delay time - 24.6 - ns tf fall time Qoss output charge - 19.3 - ns VGS = 0 V; VDS = 15 V; f = 1 MHz; Tj = 25 °C - 15.1 - nC Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; see Figure 15 - 0.82 1.1 V trr reverse recovery time - 21.8 - ns Qr recovered charge IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V; VDS = 15 V - 15.6 - nC ta reverse recovery rise time VGS = 0 V; IS = 25 A; dIS/dt = -100 A/µs; VDS = 15 V; see Figure 16 - 12.9 - ns tb reverse recovery fall time - 8.9 - ns 003aaj718 75 ID 4.5 (A) 10 3.5 003aaj719 15 RDSon (mΩ) 60 3 10 45 VGS (V) = 2.8 30 5 15 2.6 2.4 0 0 0 Fig 6. 0.5 1 1.5 VDS (V) 2 Output characteristics; drain current as a function of drain-source voltage; typical values PSMN2R9-30MLC Product data sheet 0 Fig 7. 4 8 12 VGS (V) 16 Drain-source on-state resistance as a function of gate-source voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 6 of 14 PSMN2R9-30MLC NXP Semiconductors N-channel 30 V 2.95 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 003aaj720 240 003aaj721 75 ID (A) gfs (S) 60 180 45 120 30 60 15 Tj = 150 °C 0 0 Fig 8. Tj = 25 °C 0 15 30 45 60 ID (A) 0 75 Forward transconductance as a function of drain current; typical values Fig 9. 2.8 RDSon (mΩ) 2 3 4 VGS (V) Transfer characteristics; drain current as a function of gate-source voltage; typical values 003aaj724 20 1 003aaj725 2 3 a 10V 15 1.5 VGS=4.5V 10 1 3.5 5 0.5 4.5 VGS (V) = 10 0 0 15 30 45 60 ID (A) 75 Fig 10. Drain-source on-state resistance as a function of drain current; typical values PSMN2R9-30MLC Product data sheet 0 -60 0 60 120 Tj (°C) 180 Fig 11. Normalized drain-source on-state resistance factor as a function of junction temperature All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 7 of 14 PSMN2R9-30MLC NXP Semiconductors N-channel 30 V 2.95 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 003aaj726 10 VGS (V) VDS 8 ID 6 6V 24 V VGS(pl) 4 VGS(th) VDS = 15 V VGS QGS1 2 QGS2 QGS QGD QG(tot) 0 0 003aaa508 Fig 12. Gate charge waveform definitions 20 30 QG (nC) 40 Fig 13. Gate-source voltage as a function of gate charge; typical values 003aaj727 104 10 003aaj728 75 IS (A) C (pF) 60 Ciss 45 103 30 Coss 15 Tj = 150°C Crss 10 Tj = 25 °C 2 10-1 1 10 VDS (V) 102 Fig 14. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values PSMN2R9-30MLC Product data sheet 0 0 0.3 0.6 0.9 VSD(V) 1.2 Fig 15. Source current as a function of source-drain voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 8 of 14 PSMN2R9-30MLC NXP Semiconductors N-channel 30 V 2.95 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 003a a f 444 ID (A) trr ta tb 0 0.25 IRM I RM t (s ) Fig 16. Reverse recovery timing definition PSMN2R9-30MLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 9 of 14 PSMN2R9-30MLC NXP Semiconductors N-channel 30 V 2.95 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 7. Package outline Plastic single ended surface mounted package (LFPAK33); 8 leads E A A e1 c1 b1 L SOT1210 E1 mounting base D1 D H 1 4 e b w X A A1 c C θ Lp y C detail X 0 2.5 Dimensions Unit(1) mm 5 mm scale A A1 b b1 c c1 D(1) D1 E(1) E1 e e1 H L Lp w y 3.40 0.25 0.50 max 0.90 0.10 0.35 0.35 0.20 0.30 2.70 2.35 3.40 2.45 nom 0.65 0.65 0.20 0.10 3.20 0.13 0.30 min 0.80 0.00 0.25 0.25 0.10 0.20 2.50 1.90 3.20 2.00 Note 1. Plastic or metal protrusions of 0.15 mm per side are not included. Outline version JEDEC 8° 0° sot1210_po References IEC θ JEITA European projection Issue date 11-12-19 12-03-12 SOT1210 Fig 17. Package outline SOT1210 (LFPAK33) PSMN2R9-30MLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 10 of 14 PSMN2R9-30MLC NXP Semiconductors N-channel 30 V 2.95 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 8. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes PSMN2R9-30MLC v.2 20120615 Product data sheet - PSMN2R9-30MLC v.1 PSMN2R9-30MLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 11 of 14 PSMN2R9-30MLC NXP Semiconductors N-channel 30 V 2.95 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 9. 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Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 12 of 14 PSMN2R9-30MLC NXP Semiconductors N-channel 30 V 2.95 mΩ logic level MOSFET in LFPAK33 using NextPower Technology Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published athttp://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. 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Adelante,Bitport,Bitsound,CoolFlux,CoReUse,DESFire,EZ-HV,FabKey,G reenChip,HiPerSmart,HITAG,I²C-bus logo,ICODE,I-CODE,ITEC,Labelution,MIFARE,MIFARE Plus,MIFARE Ultralight,MoReUse,QLPAK,Silicon Tuner,SiliconMAX,SmartXA,STARplug,TOPFET,TrenchMOS,TriMedia andUCODE — are trademarks of NXP B.V. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the HD Radio andHD Radio logo — are trademarks of iBiquity Digital Corporation. 10. Contact information For more information, please visit:http://www.nxp.com For sales office addresses, please send an email to:[email protected] PSMN2R9-30MLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 15 June 2012 © NXP B.V. 2012. All rights reserved. 13 of 14 PSMN2R9-30MLC NXP Semiconductors N-channel 30 V 2.95 mΩ logic level MOSFET in LFPAK33 using NextPower Technology 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2 Thermal characteristics . . . . . . . . . . . . . . . . . . .4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Contact information. . . . . . . . . . . . . . . . . . . . . .13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2012. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 15 June 2012 Document identifier: PSMN2R9-30MLC