Data Sheet

D2
PA
K
PSMN6R5-80BS
N-channel 80V 6.9mΩ standard level MOSFET in D2PAK
Rev. 2 — 2 March 2012
Product data sheet
1. Product profile
1.1 General description
Standard level N-channel MOSFET in D2PAK package qualified to 175 °C. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
1.2 Features and benefits
 High efficiency due to low switching
and conduction losses
 Suitable for standard level gate drive
sources
1.3 Applications
 DC-to-DC converters
 Motor control
 Load switching
 Server power supplies
1.4 Quick reference data
Table 1.
Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
-
80
V
ID
drain current
Tmb = 25 °C; VGS = 10 V; see Figure 1
-
-
100
A
Ptot
total power dissipation
Tmb = 25 °C; see Figure 2
-
-
210
W
Tj
junction temperature
-55
-
175
°C
VGS = 10 V; ID = 15 A; Tj = 25 °C;
see Figure 13
-
5.9
6.9
mΩ
VGS = 10 V; ID = 25 A; VDS = 40 V;
see Figure 14; see Figure 15
-
16
-
nC
-
71
-
nC
-
-
700
mJ
[1]
Static characteristics
RDSon
drain-source on-state
resistance
Dynamic characteristics
QGD
gate-drain charge
QG(tot)
total gate charge
Avalanche ruggedness
EDS(AL)S
[1]
non-repetitive
drain-source
avalanche energy
VGS = 10 V; Tj(init) = 25 °C; ID = 49 A;
Vsup ≤ 80 V; RGS = 50 Ω; unclamped
Continuous current rating is limited by package.
PSMN6R5-80BS
NXP Semiconductors
N-channel 80V 6.9mΩ standard level MOSFET in D2PAK
2. Pinning information
Table 2.
Pinning information
Pin
Symbol Description
1
G
gate
2
D
drain[1]
Simplified outline
Graphic symbol
mb
3
S
source
mb
D
mounting base; connected to
drain
D
G
S
mbb076
2
1
3
SOT404 (D2PAK)
[1]
It is not possible to make connection to pin 2.
3. Ordering information
Table 3.
Ordering information
Type number
PSMN6R5-80BS
Package
Name
Description
Version
D2PAK
plastic single-ended surface-mounted package (D2PAK); 3 leads SOT404
(one lead cropped)
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
80
V
VDGR
drain-gate voltage
Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ
-
80
V
VGS
gate-source voltage
-20
20
V
ID
drain current
-
82
A
-
100
A
-
470
A
VGS = 10 V; Tmb = 100 °C; see Figure 1
VGS = 10 V; Tmb = 25 °C; see Figure 1
[1]
IDM
peak drain current
pulsed; tp ≤ 10 µs; Tmb = 25 °C; see Figure 3
Ptot
total power dissipation
Tmb = 25 °C; see Figure 2
-
210
W
Tstg
storage temperature
-55
175
°C
Tj
junction temperature
-55
175
°C
Tsld(M)
peak soldering temperature
-
260
°C
Source-drain diode
IS
source current
Tmb = 25 °C
-
100
A
ISM
peak source current
pulsed; tp ≤ 10 µs; Tmb = 25 °C
-
470
A
VGS = 10 V; Tj(init) = 25 °C; ID = 49 A; Vsup ≤ 80 V;
RGS = 50 Ω; unclamped
-
700
mJ
Avalanche ruggedness
EDS(AL)S
[1]
non-repetitive drain-source
avalanche energy
Continuous current rating is limited by package.
PSMN6R5-80BS
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 2 March 2012
© NXP B.V. 2012. All rights reserved.
2 of 14
PSMN6R5-80BS
NXP Semiconductors
N-channel 80V 6.9mΩ standard level MOSFET in D2PAK
003aad362
150
03aa16
120
ID
(A)
Pder
(%)
80
100
(1)
50
40
0
0
0
Fig 1.
50
100
150
Tmb (°C)
200
0
50
100
150
200
Tmb (°C)
Continuous drain current as a function of
mounting base temperature
Fig 2.
Normalized total power dissipation as a
function of mounting base temperature
003aad386
103
10 μs
Limit RDSon = VDS / ID
ID
(A)
102
(1)
100 μs
10
DC
1
1 ms
10 ms
100 ms
10
-1
1
Fig 3.
102
10
103
VDS (V)
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
PSMN6R5-80BS
Product data sheet
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Rev. 2 — 2 March 2012
© NXP B.V. 2012. All rights reserved.
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PSMN6R5-80BS
NXP Semiconductors
N-channel 80V 6.9mΩ standard level MOSFET in D2PAK
5. Thermal characteristics
Table 5.
Thermal characteristics
Symbol
Parameter
Rth(j-mb)
Rth(j-a)
Conditions
Min
Typ
Max
Unit
thermal resistance from junction to see Figure 4
mounting base
-
0.4
0.7
K/W
thermal resistance from junction to Minimum footprint; mounted on a
ambient
printed circuit board
-
50
-
K/W
003aad247
1
Zth (j-mb)
(K/W)
10-1
δ = 0.5
0.2
0.1
0.05
10-2
0.02
δ=
P
tp
T
10-3
single shot
t
tp
T
-4
10
10-6
10-5
10-4
10-3
10-2
10-1
1
10
tp (s)
Fig 4.
Transient thermal impedance from junction to mounting base as a function of pulse duration
PSMN6R5-80BS
Product data sheet
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Rev. 2 — 2 March 2012
© NXP B.V. 2012. All rights reserved.
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PSMN6R5-80BS
NXP Semiconductors
N-channel 80V 6.9mΩ standard level MOSFET in D2PAK
6. Characteristics
Table 6.
Characteristics
Tested to JEDEC standards where applicable.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
ID = 250 µA; VGS = 0 V; Tj = -55 °C
73
-
-
V
ID = 250 µA; VGS = 0 V; Tj = 25 °C
80
-
-
V
ID = 1 mA; VDS = VGS; Tj = 175 °C;
see Figure 10; see Figure 11
1
-
-
V
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 10; see Figure 11
-
-
4.6
V
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 10; see Figure 11
2.3
3
4
V
VDS = 80 V; VGS = 0 V; Tj = 25 °C
-
0.3
10
µA
VDS = 80 V; VGS = 0 V; Tj = 125 °C
-
-
150
µA
VGS = -20 V; VDS = 0 V; Tj = 25 °C
-
10
100
nA
VGS = 20 V; VDS = 0 V; Tj = 25 °C
-
10
100
nA
VGS = 10 V; ID = 15 A; Tj = 100 °C;
see Figure 12
-
-
11.5
mΩ
VGS = 10 V; ID = 15 A; Tj = 175 °C;
see Figure 12
-
-
16.56
mΩ
VGS = 10 V; ID = 15 A; Tj = 25 °C;
see Figure 13
-
5.9
6.9
mΩ
-
0.75
-
Ω
Static characteristics
V(BR)DSS
drain-source
breakdown voltage
VGS(th)
gate-source threshold
voltage
IDSS
drain leakage current
IGSS
gate leakage current
RDSon
RG
drain-source on-state
resistance
internal gate resistance f = 1 MHz
(AC)
Dynamic characteristics
QG(tot)
total gate charge
ID = 0 A; VDS = 0 V; VGS = 10 V
-
61
-
nC
-
71
-
nC
QGS
gate-source charge
ID = 25 A; VDS = 40 V; VGS = 10 V;
see Figure 14; see Figure 15
-
19
-
nC
QGS(th)
pre-threshold
gate-source charge
-
13.2
-
nC
QGS(th-pl)
post-threshold
gate-source charge
-
5.8
-
nC
QGD
gate-drain charge
-
16
-
nC
VGS(pl)
gate-source plateau
voltage
ID = 25 A; VDS = 40 V; see Figure 15
-
4.3
-
V
Ciss
input capacitance
-
4461
-
pF
Coss
output capacitance
VDS = 40 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; see Figure 16
-
410
-
pF
Crss
reverse transfer
capacitance
-
214
-
pF
td(on)
turn-on delay time
-
26
-
ns
tr
rise time
-
24
-
ns
td(off)
turn-off delay time
-
57
-
ns
tf
fall time
-
22
-
ns
PSMN6R5-80BS
Product data sheet
VDS = 40 V; RL = 0.5 Ω; VGS = 10 V;
RG(ext) = 4.7 Ω
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 2 March 2012
© NXP B.V. 2012. All rights reserved.
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PSMN6R5-80BS
NXP Semiconductors
N-channel 80V 6.9mΩ standard level MOSFET in D2PAK
Table 6.
Characteristics …continued
Tested to JEDEC standards where applicable.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
-
0.79
1.2
V
Source-drain diode
VSD
source-drain voltage
IS = 15 A; VGS = 0 V; Tj = 25 °C;
see Figure 17
trr
reverse recovery time
Qr
recovered charge
IS = 25 A; dIS/dt = 100 A/µs; VGS = 0 V;
VDS = 40 V
003aad440
100
ID
(A)
20
10
-
ns
-
nC
003aad442
ID
(A)
5
8
80
48
82
100
5.5
6
-
80
60
60
40
40
VGS (V) = 4.5
Tj = 175 °C
20
20
Tj = 25 °C
0
0
0
0.5
1
1.5
2
0
VDS (V)
Fig 5.
Output characteristics: drain current as a
function of drain-source voltage; typical values
003aad446
7000
C
(pF)
6000
Fig 6.
4
Ciss
VGS (V)
6
Transfer characteristics: drain current as a
function of gate-source voltage; typical values
003aad447
150
gfs
(S)
120
5000
90
Crss
4000
60
3000
30
2000
0
0
Fig 7.
2
5
10
15
20
25
VGS (V)
Input and reverse transfer capacitances as a
function of gate-source voltage; typical values
PSMN6R5-80BS
Product data sheet
0
Fig 8.
20
40
60
80
ID (A)
100
Forward transconductance as a function of
drain current; typical values
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Rev. 2 — 2 March 2012
© NXP B.V. 2012. All rights reserved.
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PSMN6R5-80BS
NXP Semiconductors
N-channel 80V 6.9mΩ standard level MOSFET in D2PAK
003aad448
20
03aa35
10−1
ID
(A)
RDSon
(mΩ)
min
10−2
typ
max
16
10−3
12
10−4
8
10−5
10−6
4
4
Fig 9.
8
12
16
VGS (V)
20
003aae992
VGS(th)
(V)
3
003aad045
2.5
2.0
typ
1.5
1.0
1
0.5
0
60
120
180
0.0
-60
-30
Tj (°C)
Fig 11. Gate-source threshold voltage as a function of
junction temperature
Product data sheet
6
Fig 10. Sub-threshold drain current as a function of
gate-source voltage
max
min
2
PSMN6R5-80BS
4
a
4
0
−60
2
VGS (V)
Drain-source on-state resistance as a function
of gate-source voltage; typical values
5
0
0
30
60
90
120
150 180
Tj (°C)
Fig 12. Normalized drain-source on-state resistance
factor as a function of junction temperature
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 2 March 2012
© NXP B.V. 2012. All rights reserved.
7 of 14
PSMN6R5-80BS
NXP Semiconductors
N-channel 80V 6.9mΩ standard level MOSFET in D2PAK
003aad441
12
VDS
VGS (V) = 5
RDSon
(mΩ)
ID
10
VGS(pl)
8
VGS(th)
5.5
VGS
6
QGS1
8
6
QGS2
QGS
QGD
QG(tot)
20
10
003aaa508
4
0
20
40
60
80
ID (A)
100
Fig 13. Drain-source on-state resistance as a function
of drain current; typical values
003aad444
10
VGS
(V)
8
Fig 14. Gate charge waveform definitions
003aad445
104
16 V
Ciss
C
(pF)
6
VDS = 40 V
4
103
Coss
64 V
Crss
2
0
0
20
40
60
QG (nC)
80
Fig 15. Gate-source voltage as a function of gate
charge; typical values
PSMN6R5-80BS
Product data sheet
102
10-1
1
10
VDS (V)
102
Fig 16. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 2 March 2012
© NXP B.V. 2012. All rights reserved.
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PSMN6R5-80BS
NXP Semiconductors
N-channel 80V 6.9mΩ standard level MOSFET in D2PAK
003aad443
100
IS
(A)
80
60
40
Tj = 175 °C
20
Tj = 25 °C
0
0
0.3
0.6
0.9
VSD (V)
1.2
Fig 17. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values
PSMN6R5-80BS
Product data sheet
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Rev. 2 — 2 March 2012
© NXP B.V. 2012. All rights reserved.
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PSMN6R5-80BS
NXP Semiconductors
N-channel 80V 6.9mΩ standard level MOSFET in D2PAK
7. Package outline
SOT404
Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped)
A
A1
E
mounting
base
D1
D
HD
2
Lp
1
3
c
b
e
e
Q
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
b
c
D
max.
D1
E
e
Lp
HD
Q
mm
4.50
4.10
1.40
1.27
0.85
0.60
0.64
0.46
11
1.60
1.20
10.30
9.70
2.54
2.90
2.10
15.80
14.80
2.60
2.20
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
05-02-11
06-03-16
SOT404
Fig 18. Package outline SOT404 (D2PAK)
PSMN6R5-80BS
Product data sheet
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Rev. 2 — 2 March 2012
© NXP B.V. 2012. All rights reserved.
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PSMN6R5-80BS
NXP Semiconductors
N-channel 80V 6.9mΩ standard level MOSFET in D2PAK
8. Revision history
Table 7.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PSMN6R5-80BS v.2
20120302
Product data sheet
-
PSMN6R5-80BS v.1
-
-
Modifications:
PSMN6R5-80BS v.1
PSMN6R5-80BS
Product data sheet
•
•
Status changed from objective to product.
Various changes to content.
20111021
Objective data sheet
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Rev. 2 — 2 March 2012
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PSMN6R5-80BS
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N-channel 80V 6.9mΩ standard level MOSFET in D2PAK
9. Legal information
9.1
Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term 'short data sheet' is explained in section "Definitions".
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URLhttp://www.nxp.com.
9.2
Definitions
Preview— The document is a preview version only. The document is still
subject to formal approval, which may result in modifications or additions.
NXP Semiconductors does not give any representations or warranties as to
the accuracy or completeness of information included herein and shall have
no liability for the consequences of use of such information.
Draft— The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet— A short data sheet is an extract from a full data sheet with
the same product type number(s) and title. A short data sheet is intended for
quick reference only and should not be relied upon to contain detailed and full
information. For detailed and full information see the relevant full data sheet,
which is available on request via the local NXP Semiconductors sales office.
In case of any inconsistency or conflict with the short data sheet, the full data
sheet shall prevail.
Product specification— The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
9.3
Disclaimers
Limited warranty and liability— Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with theTerms and conditions of commercial saleof NXP Semiconductors.
PSMN6R5-80BS
Product data sheet
Right to make changes— NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use— NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Quick reference data— The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Applications— Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values— Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 2 March 2012
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PSMN6R5-80BS
NXP Semiconductors
N-channel 80V 6.9mΩ standard level MOSFET in D2PAK
Terms and conditions of commercial sale— NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published athttp://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license— Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control— This document as well as the item(s) described herein may
be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products— Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations— A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
9.4
Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Adelante,Bitport,Bitsound,CoolFlux,CoReUse,DESFire,EZ-HV,FabKey,G
reenChip,HiPerSmart,HITAG,I²C-buslogo,ICODE,I-CODE,ITEC,Labelution
,MIFARE,MIFARE Plus,MIFARE Ultralight,MoReUse,QLPAK,Silicon
Tuner,SiliconMAX,SmartXA,STARplug,TOPFET,TrenchMOS,TriMediaand
UCODE— are trademarks of NXP B.V.
HD RadioandHD Radiologo — are trademarks of iBiquity Digital Corporation.
10. Contact information
For more information, please visit:http://www.nxp.com
For sales office addresses, please send an email to:[email protected]
PSMN6R5-80BS
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 2 March 2012
© NXP B.V. 2012. All rights reserved.
13 of 14
PSMN6R5-80BS
NXP Semiconductors
N-channel 80V 6.9mΩ standard level MOSFET in D2PAK
11. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
9
9.1
9.2
9.3
9.4
10
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
General description . . . . . . . . . . . . . . . . . . . . . .1
Features and benefits . . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Quick reference data . . . . . . . . . . . . . . . . . . . . .1
Pinning information . . . . . . . . . . . . . . . . . . . . . . .2
Ordering information . . . . . . . . . . . . . . . . . . . . . .2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2
Thermal characteristics . . . . . . . . . . . . . . . . . . .4
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 11
Legal information. . . . . . . . . . . . . . . . . . . . . . . .12
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Contact information. . . . . . . . . . . . . . . . . . . . . .13
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2012.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 2 March 2012
Document identifier: PSMN6R5-80BS