Data Sheet

PHP191NQ06LT
N-channel TrenchMOS logic level FET
Rev. 02 — 14 January 2010
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications only.
1.2 Features and benefits
„ Low conduction losses due to low
on-state resistance
„ Suitable for logic level gate drive
sources
1.3 Applications
„ DC-to-DC convertors
„ Motors, lamps and solenoids
„ General industrial applications
„ Uninterruptible power supplies
1.4 Quick reference data
Table 1.
Quick reference
Symbol Parameter
Conditions
Min
Typ
Max
Unit
VDS
drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C
-
-
55
V
ID
drain current
Tmb = 25 °C; VGS = 10 V;
see Figure 1 and 3
-
-
75
A
Ptot
total power
dissipation
Tmb = 25 °C; see Figure 2
-
-
300
W
VGS = 5 V; ID = 25 A;
VDS = 44 V; Tj = 25 °C;
see Figure 11
-
37.6
-
nC
VGS = 10 V; ID = 25 A;
Tj = 25 °C; see Figure 10
and 9
-
3.1
3.7
mΩ
Dynamic characteristics
QGD
gate-drain charge
Static characteristics
RDSon
drain-source
on-state resistance
PHP191NQ06LT
NXP Semiconductors
N-channel TrenchMOS logic level FET
2. Pinning information
Table 2.
Pinning information
Pin
Symbol
Description
Simplified outline
1
G
gate
2
D
drain
3
S
source
mb
D
mounting base; connected to
drain
Graphic symbol
D
mb
G
mbb076
S
1 2 3
SOT78 (TO-220AB)
3. Ordering information
Table 3.
Ordering information
Type number
PHP191NQ06LT
Package
Name
Description
Version
TO-220AB
plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead SOT78
TO-220AB
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
55
V
VDGR
drain-gate voltage
Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ
-
55
V
VGS
gate-source voltage
ID
drain current
-15
15
V
VGS = 10 V; Tmb = 100 °C; see Figure 1
-
75
A
VGS = 10 V; Tmb = 25 °C; see Figure 1 and 3
-
75
A
-
240
A
IDM
peak drain current
tp ≤ 10 µs; pulsed; Tmb = 25 °C; see Figure 3
Ptot
total power dissipation
Tmb = 25 °C; see Figure 2
-
300
W
Tstg
storage temperature
-55
175
°C
Tj
junction temperature
-55
175
°C
Source-drain diode
IS
source current
Tmb = 25 °C
-
75
A
ISM
peak source current
tp ≤ 10 µs; pulsed; Tmb = 25 °C
-
240
A
-
560
mJ
Avalanche ruggedness
EDS(AL)S
non-repetitive
VGS = 10 V; Tj(init) = 25 °C; ID = 75 A; Vsup ≤ 55 V;
drain-source avalanche unclamped; RGS = 50 Ω; tp ≤ 0.21 ms
energy
PHP191NQ06LT_2
Product data sheet
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Rev. 02 — 14 January 2010
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PHP191NQ06LT
NXP Semiconductors
N-channel TrenchMOS logic level FET
03aq99
120
Ider
(%)
Pder
(%)
80
80
40
40
0
Fig 1.
03aa16
120
0
50
100
150
0
200
Tmb (°C)
0
50
100
150
200
Tmb (°C)
Normalized continuous drain current as a
function of mounting base temperature
Fig 2.
Normalized total power dissipation as a
function of mounting base temperature
03ar01
103
Limit R DSon = VDS /I D
ID
(A)
t p = 10 μs
102
100 μs
1 ms
DC
10 ms
10
100 ms
1
1
102
10
VDS (V)
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
PHP191NQ06LT_2
Product data sheet
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Rev. 02 — 14 January 2010
© NXP B.V. 2010. All rights reserved.
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N-channel TrenchMOS logic level FET
5. Thermal characteristics
Table 5.
Thermal characteristics
Symbol
Parameter
Rth(j-mb)
Rth(j-a)
Conditions
Min
Typ
Max
Unit
thermal resistance from junction see Figure 4
to mounting base
-
-
0.5
K/W
thermal resistance from junction vertical in still air
to ambient
-
60
-
K/W
03ar00
1
Zth(j-mb)
(K/W)
10−1
δ = 0.5
0.2
0.1
0.05
0.02
δ=
P
single pulse
t
tp
10−2
10−4
tp
T
T
10−3
10−2
10−1
1
tp (s)
Fig 4.
Transient thermal impedance from junction to mounting base as a function of pulse duration
PHP191NQ06LT_2
Product data sheet
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Rev. 02 — 14 January 2010
© NXP B.V. 2010. All rights reserved.
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N-channel TrenchMOS logic level FET
6. Characteristics
Table 6.
Symbol
Characteristics
Parameter
Conditions
Min
Typ
Max
Unit
drain-source
breakdown voltage
ID = 250 µA; VGS = 0 V; Tj = -55 °C
50
-
-
V
ID = 250 µA; VGS = 0 V; Tj = 25 °C
55
-
-
V
gate-source threshold
voltage
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 7 and 8
-
-
2.2
V
ID = 1 mA; VDS = VGS; Tj = 175 °C;
see Figure 7 and 8
0.5
-
-
V
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 7 and 8
1
1.5
2
V
VDS = 55 V; VGS = 0 V; Tj = 25 °C
-
-
1
µA
VDS = 55 V; VGS = 0 V; Tj = 175 °C
-
-
500
µA
VGS = 15 V; VDS = 0 V; Tj = 25 °C
-
2
100
nA
VGS = -15 V; VDS = 0 V; Tj = 25 °C
-
2
100
nA
VGS = 4.5 V; ID = 25 A; Tj = 25 °C;
see Figure 9
-
-
4.4
mΩ
VGS = 5 V; ID = 25 A; Tj = 25 °C;
see Figure 10 and 9
-
3.5
4.2
mΩ
VGS = 10 V; ID = 25 A; Tj = 175 °C;
see Figure 10 and 9
-
-
7.4
mΩ
VGS = 10 V; ID = 25 A; Tj = 25 °C;
see Figure 10 and 9
-
3.1
3.7
mΩ
ID = 25 A; VDS = 44 V; VGS = 5 V;
Tj = 25 °C; see Figure 11
-
95.6
-
nC
-
17.2
-
nC
-
37.6
-
nC
Static characteristics
V(BR)DSS
VGS(th)
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
Dynamic characteristics
QG(tot)
total gate charge
QGS
gate-source charge
QGD
gate-drain charge
Ciss
input capacitance
Coss
output capacitance
Crss
reverse transfer
capacitance
td(on)
turn-on delay time
tr
rise time
td(off)
tf
VDS = 25 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; see Figure 12
VDS = 30 V; RL = 1.2 Ω; VGS = 5 V;
RG(ext) = 10 Ω; Tj = 25 °C
-
7665
-
pF
-
1045
-
pF
-
465
-
pF
-
63
-
ns
-
232
-
ns
turn-off delay time
-
273
-
ns
fall time
-
178
-
ns
Source-drain diode
VSD
source-drain voltage
IS = 25 A; VGS = 0 V; Tj = 25 °C;
see Figure 13
-
0.79
1.2
V
trr
reverse recovery time
-
78
-
ns
Qr
recovered charge
IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V;
VDS = 25 V; Tj = 25 °C
-
171
-
nC
PHP191NQ06LT_2
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 14 January 2010
© NXP B.V. 2010. All rights reserved.
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PHP191NQ06LT
NXP Semiconductors
N-channel TrenchMOS logic level FET
03ar02
240
10 V
Tj = 25 °C
ID
(A)
03ar04
80
4 V 3.6 V
VDS > ID x R DSon
ID
(A)
3.2 V
5V
60
160
40
2.8 V
80
20
Tj = 175 °C
25 °C
VGS = 2.4 V
0
0
0
0.5
1
1.5
2
0
VDS (V)
Fig 5.
Output characteristics: drain current as a
function of drain-source voltage; typical values
03aa33
2.5
1.5
max
10-2
typ
10-3
Fig 7.
03aa36
Product data sheet
typ
max
10-5
10-6
0
60
120
Tj (°C)
180
Gate-source threshold voltage as a function of
junction temperature
PHP191NQ06LT_2
3
10-4
min
0.5
0
-60
VGS (V)
Transfer characteristics: drain current as a
function of gate-source voltage; typical values
min
1
2
10-1
ID
(A)
VGS(th)
(V)
2
Fig 6.
1
0
Fig 8.
1
2
VGS (V)
3
Sub-threshold drain current as a function of
gate-source voltage
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Rev. 02 — 14 January 2010
© NXP B.V. 2010. All rights reserved.
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PHP191NQ06LT
NXP Semiconductors
N-channel TrenchMOS logic level FET
03ne89
2
03ar03
10
Tj = 25 °C
R DSon
(mΩ)
8
a
VGS = 3.2 V
1.5
6
3.6 V
1
4V
5V
10 V
4
0.5
2
0
-60
Fig 9.
0
60
120
Tj (°C)
180
Normalized drain-source on-state resistance
factor as a function of junction temperature
03ar07
10
VGS
ID = 25 A
(V)
0
80
160
ID (A)
240
Fig 10. Drain-source on-state resistance as a function
of drain current; typical values
03ar06
105
C
(pF)
Tj = 25 °C
8
0
104
C iss
6
14 V
VDD = 44 V
4
103
C oss
C rss
2
0
102
0
50
100
150
200
Q G (nC)
Fig 11. Gate-source voltage as a function of gate
charge; typical values
PHP191NQ06LT_2
Product data sheet
10−1
1
10
VDS (V)
102
Fig 12. Sub-threshold drain current as a function of
gate-source voltage
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Rev. 02 — 14 January 2010
© NXP B.V. 2010. All rights reserved.
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PHP191NQ06LT
NXP Semiconductors
N-channel TrenchMOS logic level FET
03ar05
80
VGS = 0 V
IS
(A)
60
40
175 °C
Tj = 25 °C
20
0
0
0.3
0.6
0.9
1.2
VSD (V)
Fig 13. Source current as a function of source-drain voltage; typical values
PHP191NQ06LT_2
Product data sheet
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Rev. 02 — 14 January 2010
© NXP B.V. 2010. All rights reserved.
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N-channel TrenchMOS logic level FET
7. Package outline
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB
SOT78
E
A
A1
p
q
mounting
base
D1
D
L1(1)
L2(1)
Q
L
b1(2)
(3×)
b2(2)
(2×)
1
2
3
b(3×)
c
e
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
b
b1(2)
b2(2)
c
D
D1
E
e
L
L1(1)
L2(1)
max.
p
q
Q
mm
4.7
4.1
1.40
1.25
0.9
0.6
1.6
1.0
1.3
1.0
0.7
0.4
16.0
15.2
6.6
5.9
10.3
9.7
2.54
15.0
12.8
3.30
2.79
3.0
3.8
3.5
3.0
2.7
2.6
2.2
Notes
1. Lead shoulder designs may vary.
2. Dimension includes excess dambar.
OUTLINE
VERSION
SOT78
REFERENCES
IEC
JEDEC
JEITA
3-lead TO-220AB
SC-46
EUROPEAN
PROJECTION
ISSUE DATE
08-04-23
08-06-13
Fig 14. Package outline SOT78 (TO-220AB)
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Product data sheet
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Rev. 02 — 14 January 2010
© NXP B.V. 2010. All rights reserved.
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N-channel TrenchMOS logic level FET
8. Revision history
Table 7.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PHP191NQ06LT_2
20100114
Product data sheet
-
PHP_PHB191NQ06LT-01
Modifications:
•
The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•
•
Legal texts have been adapted to the new company name where appropriate.
Type number PHP191NQ06LT separated from data sheet PHP_PHB191NQ06LT-01.
PHP_PHB191NQ06LT-01 20040505
(9397 750 13168)
PHP191NQ06LT_2
Product data sheet
Product data sheet
-
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 14 January 2010
-
© NXP B.V. 2010. All rights reserved.
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N-channel TrenchMOS logic level FET
9. Legal information
9.1
Data sheet status
Document status [1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term 'short data sheet' is explained in section "Definitions".
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
9.2
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
9.3
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on a weakness or default in the
customer application/use or the application/use of customer’s third party
customer(s) (hereinafter both referred to as “Application”). It is customer’s
sole responsibility to check whether the NXP Semiconductors product is
suitable and fit for the Application planned. Customer has to do all necessary
testing for the Application in order to avoid a default of the Application and the
product. NXP Semiconductors does not accept any liability in this respect.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
PHP191NQ06LT_2
Product data sheet
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 14 January 2010
© NXP B.V. 2010. All rights reserved.
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N-channel TrenchMOS logic level FET
Export control — This document as well as the item(s) described herein may
be subject to export control regulations. Export might require a prior
authorization from national authorities.
Non-automotive qualified products — Unless the data sheet of an NXP
Semiconductors product expressly states that the product is automotive
qualified, the product is not suitable for automotive use. It is neither qualified
nor tested in accordance with automotive testing or application requirements.
NXP Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications. In
the event that customer uses the product for design-in and use in automotive
applications to automotive specifications and standards, customer (a) shall
use the product without NXP Semiconductors’ warranty of the product for
such automotive applications, use and specifications, and (b) whenever
customer uses the product for automotive applications beyond NXP
Semiconductors’ specifications such use shall be solely at customer’s own
risk, and (c) customer fully indemnifies NXP Semiconductors for any liability,
damages or failed product claims resulting from customer design and use of
the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
9.4
Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
TrenchMOS — is a trademark of NXP B.V.
10. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
PHP191NQ06LT_2
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 14 January 2010
© NXP B.V. 2010. All rights reserved.
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N-channel TrenchMOS logic level FET
11. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
9
9.1
9.2
9.3
9.4
10
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
General description . . . . . . . . . . . . . . . . . . . . . .1
Features and benefits . . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Quick reference data . . . . . . . . . . . . . . . . . . . . .1
Pinning information . . . . . . . . . . . . . . . . . . . . . . .2
Ordering information . . . . . . . . . . . . . . . . . . . . . .2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2
Thermal characteristics . . . . . . . . . . . . . . . . . . .4
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . .10
Legal information. . . . . . . . . . . . . . . . . . . . . . . . 11
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Contact information. . . . . . . . . . . . . . . . . . . . . .12
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 14 January 2010
Document identifier: PHP191NQ06LT_2