Data Sheet

PSMN006-20K
N-channel TrenchMOS SiliconMAX ultra low level FET
Rev. 01 — 17 November 2009
Product data sheet
1. Product profile
1.1 General description
SiliconMAX ultra low level N-channel enhancement mode Field-Effect Transistor (FET) in
a plastic package using TrenchMOS technology. This product is designed and qualified for
use in computing, communications, consumer and industrial applications only.
1.2 Features and benefits
„ Low conduction losses due to low
on-state resistance
„ Suitable for very low gate drive
sources
1.3 Applications
„ Computer motherboards
„ Switched-mode power supplies
„ DC-to-DC convertors
1.4 Quick reference data
Table 1.
Quick reference
Symbol Parameter
Conditions
Min
Typ
Max
Unit
VDS
drain-source voltage Tj ≥ 25 °C; Tj ≤ 150 °C
-
-
20
V
ID
drain current
Tsp = 25 °C; VGS = 4.5 V;
see Figure 1 and 3
-
-
32
A
Ptot
total power
dissipation
Tsp = 25 °C; see Figure 2
-
-
8.3
W
VGS = 2.5 V; ID = 30 A;
VDS = 10 V; Tj = 25 °C;
see Figure 11
-
13.2
-
nC
VGS = 2.5 V; ID = 5 A;
Tj = 25 °C; see Figure 9 and 10
-
4.8
5.7
mΩ
VGS = 1.8 V; ID = 5 A;
Tj = 25 °C; see Figure 10
-
5.7
8.2
mΩ
VGS = 4.5 V; ID = 5 A;
Tj = 25 °C; see Figure 9 and 10
-
4.2
5
mΩ
Dynamic characteristics
QGD
gate-drain charge
Static characteristics
RDSon
drain-source
on-state resistance
PSMN006-20K
NXP Semiconductors
N-channel TrenchMOS SiliconMAX ultra low level FET
2. Pinning information
Table 2.
Pinning information
Pin
Symbol
Description
1
S
source
2
S
source
3
S
source
4
G
gate
5
D
drain
6
D
drain
7
D
drain
8
D
drain
Simplified outline
8
Graphic symbol
D
5
G
1
mbb076
4
S
SOT96-1 (SO8)
3. Ordering information
Table 3.
Ordering information
Type number
PSMN006-20K
Package
Name
Description
Version
SO8
plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 150 °C
-
20
V
VGS
gate-source voltage
-10
10
V
ID
drain current
Tsp = 25 °C; VGS = 4.5 V; see Figure 1 and 3
-
32
A
IDM
peak drain current
Tsp = 25 °C; tp ≤ 10 µs; pulsed; see Figure 3
-
60
A
Ptot
total power dissipation
Tsp = 25 °C; see Figure 2
-
8.3
W
Tstg
storage temperature
-
150
°C
Tj
junction temperature
-55
150
°C
Source-drain diode
IS
source current
Tsp = 25 °C
-
7.5
A
ISM
peak source current
Tsp = 25 °C; tp ≤ 10 µs; pulsed
-
30
A
PSMN006-20K_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 17 November 2009
2 of 12
PSMN006-20K
NXP Semiconductors
N-channel TrenchMOS SiliconMAX ultra low level FET
03aa25
120
Ider
(%)
03aa17
120
Pder
(%)
80
80
40
40
0
0
0
50
100
150
200
0
50
100
Tsp (°C)
Fig 1.
Normalized continuous drain current as a
function of solder point temperature
150
200
Tsp (°C)
Fig 2.
Normalized total power dissipation as a
function of solder point temperature
03ai63
102
Limit RDSon = VDS/ID
tp = 10 µs
ID
(A)
1 ms
10
10 ms
DC
100 ms
1
10−1
10−1
1
102
10
VDS (V)
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
PSMN006-20K_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 17 November 2009
3 of 12
PSMN006-20K
NXP Semiconductors
N-channel TrenchMOS SiliconMAX ultra low level FET
5. Thermal characteristics
Table 5.
Thermal characteristics
Symbol
Parameter
Conditions
Rth(j-sp)
thermal resistance from mounted on a metal clad board;
junction to solder point see Figure 4
Min
Typ
Max
Unit
-
-
15
K/W
03ai62
102
Zth(j-sp)
(K/W)
10
δ = 0.5
0.2
0.1
1
δ=
P
0.05
tp
T
0.02
single pulse
10−1
10−4
t
tp
T
10−3
10−2
10−1
1
102
10
tp (s)
Fig 4.
Transient thermal impedance from junction to solder point as a function of pulse duration
PSMN006-20K_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 17 November 2009
4 of 12
PSMN006-20K
NXP Semiconductors
N-channel TrenchMOS SiliconMAX ultra low level FET
6. Characteristics
Table 6.
Symbol
Characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics
V(BR)DSS
drain-source
breakdown voltage
ID = 250 µA; VGS = 0 V; Tj = 25 °C
20
-
-
V
VGS(th)
gate-source threshold
voltage
ID = 1 mA; VDS = VGS; Tj = 150 °C; see Figure 8
0.15
-
-
V
ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 8
0.4
0.7
-
V
drain leakage current
VDS = 20 V; VGS = 0 V; Tj = 150 °C
-
-
0.5
µA
VDS = 20 V; VGS = 0 V; Tj = 25 °C
-
0.05
1
µA
VGS = 8 V; VDS = 0 V; Tj = 25 °C
-
10
100
nA
VGS = -8 V; VDS = 0 V; Tj = 25 °C
-
10
100
nA
VGS = 2.5 V; ID = 5 A; Tj = 25 °C; see Figure 9
and 10
-
4.8
5.7
mΩ
VGS = 1.8 V; ID = 5 A; Tj = 25 °C; see Figure 10
-
5.7
8.2
mΩ
VGS = 4.5 V; ID = 5 A; Tj = 25 °C; see Figure 9
and 10
-
4.2
5
mΩ
-
32
-
nC
IDSS
IGSS
RDSon
gate leakage current
drain-source on-state
resistance
Dynamic characteristics
QG(tot)
total gate charge
ID = 30 A; VDS = 10 V; VGS = 25 V; Tj = 25 °C;
see Figure 11
QGS
gate-source charge
QGD
gate-drain charge
ID = 30 A; VDS = 10 V; VGS = 2.5 V; Tj = 25 °C;
see Figure 11
Ciss
input capacitance
Coss
output capacitance
Crss
reverse transfer
capacitance
td(on)
turn-on delay time
tr
rise time
td(off)
tf
gfs
forward
transconductance
-
10
-
nC
-
13.2
-
nC
-
4350
-
pF
-
825
-
pF
-
550
-
pF
-
65
-
ns
-
32
-
ns
turn-off delay time
-
190
-
ns
fall time
-
90
-
ns
VDS = 15 V; ID = 10 A
-
25
-
S
VDS = 20 V; VGS = 0 V; f = 1 MHz; Tj = 25 °C;
see Figure 12
VDS = 10 V; RL = 10 Ω; VGS = 4.5 V;
RG(ext) = 6 Ω; Tj = 25 °C
Source-drain diode
VSD
source-drain voltage
IS = 3 A; VGS = 0 V; Tj = 25 °C; see Figure 13
-
0.75
1.3
V
trr
reverse recovery time
-
47
-
ns
Qr
recovered charge
IS = 10 A; dIS/dt = -70 A/µs; VGS = 0 V;
VDS = 25 V; Tj = 25 °C
-
17
-
nC
PSMN006-20K_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 17 November 2009
5 of 12
PSMN006-20K
NXP Semiconductors
N-channel TrenchMOS SiliconMAX ultra low level FET
03ai64
30
03ai66
30
4.5 V 2.5 V 2 V
VDS > I D x R DSon
1.5 V
ID
ID
(A)
(A)
20
20
1.3 V
10
10
Tj = 150 °C
1.1 V
25 °C
VGS = 1 V
0
Fig 5.
0
0.05
0.1
0.15
VDS (V)
0
0.2
Output characteristics: drain current as a
function of drain-source voltage; typical values
0
Fig 6.
03ai70
10−1
0.4
0.8
1.2
VGS (V)
1.6
Transfer characteristics: drain current as a
function of gate-source voltage; typical values
03ai71
1
VGS(th)
ID
(A)
(V)
10−2
0.8
typ
10−3
0.6
min
typ
min
10−4
0.4
10−5
0.2
10−6
Fig 7.
0
0.2
0.4
0.6
0
0.8
1
VGS (V)
Sub-threshold drain current as a function of
gate-source voltage
Fig 8.
−80
80
Tj (°C)
160
Gate-source threshold voltage as a function of
junction temperature
PSMN006-20K_1
Product data sheet
0
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 17 November 2009
6 of 12
PSMN006-20K
NXP Semiconductors
N-channel TrenchMOS SiliconMAX ultra low level FET
03ai65
10
Tj = 25 °C
R DSon
03af18
2
a
(mW)
8
1.5
VGS = 1.5 V
6
2V
2.5 V
4.5 V
4
1
0.5
2
0
-60
0
0
Fig 9.
10
20
30
ID (A)
Drain-source on-state resistance as a function
of drain current; typical values
03ai69
5
VGS
0
60
120
Tj (°C)
180
Fig 10. Normalized drain-source on-state resistance
factor as a function of junction temperature
03ai68
104
VDD = 10 V
(V)
C iss
C
(pF)
ID = 30 A
4
Tj = 25 °C
3
103
C oss
2
C rss
1
102
0
0
20
40
60
Q G (nC)
80
Fig 11. Gate-source voltage as a function of gate
charge; typical values
10−1
10
VDS (V)
102
Fig 12. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
PSMN006-20K_1
Product data sheet
1
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 17 November 2009
7 of 12
PSMN006-20K
NXP Semiconductors
N-channel TrenchMOS SiliconMAX ultra low level FET
03ai67
30
VGS = 0 V
IS
(A)
20
10
25 °C
Tj = 150 °C
0
0
0.2
0.4
0.6
0.8
1
VSD (V)
Fig 13. Source current as a function of source-drain voltage; typical values
PSMN006-20K_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 17 November 2009
8 of 12
PSMN006-20K
NXP Semiconductors
N-channel TrenchMOS SiliconMAX ultra low level FET
7. Package outline
SO8: plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
D
E
A
X
c
y
HE
v M A
Z
5
8
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
1
L
4
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
5.0
4.8
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
0.069
0.010 0.057
0.004 0.049
0.01
0.019 0.0100
0.014 0.0075
0.20
0.19
0.16
0.15
0.05
0.01
0.01
0.004
0.028
0.012
inches
0.244
0.039 0.028
0.041
0.228
0.016 0.024
θ
o
8
o
0
Notes
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT96-1
076E03
MS-012
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
Fig 14. Package outline SOT96-1 (SO8)
PSMN006-20K_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 17 November 2009
9 of 12
PSMN006-20K
NXP Semiconductors
N-channel TrenchMOS SiliconMAX ultra low level FET
8. Revision history
Table 7.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PSMN006-20K_1
20091117
Product data sheet
-
-
PSMN006-20K_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 17 November 2009
10 of 12
PSMN006-20K
NXP Semiconductors
N-channel TrenchMOS SiliconMAX ultra low level FET
9. Legal information
9.1
Data sheet status
Document status [1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term 'short data sheet' is explained in section "Definitions".
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
9.2
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
9.3
Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein may
be subject to export control regulations. Export might require a prior
authorization from national authorities.
9.4
Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
TrenchMOS — is a trademark of NXP B.V.
10. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
PSMN006-20K_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 17 November 2009
11 of 12
PSMN006-20K
NXP Semiconductors
N-channel TrenchMOS SiliconMAX ultra low level FET
11. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
9
9.1
9.2
9.3
9.4
10
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
General description . . . . . . . . . . . . . . . . . . . . . .1
Features and benefits . . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Quick reference data . . . . . . . . . . . . . . . . . . . . .1
Pinning information . . . . . . . . . . . . . . . . . . . . . . .2
Ordering information . . . . . . . . . . . . . . . . . . . . . .2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2
Thermal characteristics . . . . . . . . . . . . . . . . . . .4
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . .10
Legal information. . . . . . . . . . . . . . . . . . . . . . . . 11
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Contact information. . . . . . . . . . . . . . . . . . . . . . 11
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 17 November 2009
Document identifier: PSMN006-20K_1
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