SO T4 16 PMR400UN N-channel TrenchMOS ultra low level FET Rev. 2 — 2 February 2012 Product data sheet 1. Product profile 1.1 General description N-channel enhancement mode Field-Effect Transistor (FET) in ultra small Surface-Mounted Device (SMD) plastic package using TrenchMOS technology. 1.2 Features and benefits Low threshold voltage Low on-state resistance Surface mounted package Footprint 63% smaller than SOT23 1.3 Applications Driver circuits Switching in portable appliances 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 150 °C - - 30 V ID drain current Tsp = 25 °C; VGS = 4.5 V - - 0.8 A VGS gate-source voltage -8 - 8 V - 400 480 mΩ Static characteristics drain-source on-state resistance RDSon VGS = 4.5 V; ID = 0.2 A; Tj = 25 °C 2. Pinning information Table 2. Pinning information Pin Symbol Description 1 G gate 2 S source 3 D drain Simplified outline Graphic symbol D 3 G 1 2 SOT416 (SC-75) S 017aaa253 PMR400UN NXP Semiconductors N-channel TrenchMOS ultra low level FET 3. Ordering information Table 3. Ordering information Type number Package PMR400UN Name Description Version SC-75 plastic surface-mounted package; 3 leads SOT416 4. Marking Table 4. Marking codes Type number Marking code PMR400UN R7 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 150 °C - 30 V VDGR drain-gate voltage Tj ≥ 25 °C; Tj ≤ 150 °C; RGS = 20 kΩ - 30 V VGS gate-source voltage -8 8 V ID drain current Tsp = 25 °C; VGS = 4.5 V - 0.8 A Tsp = 100 °C; VGS = 4.5 V - 0.51 A IDM peak drain current Tsp = 25 °C; pulsed; tp ≤ 10 µs - 1.61 A Ptot total power dissipation Tsp = 25 °C - 0.53 W Tstg storage temperature -55 150 °C Tj junction temperature -55 150 °C Source-drain diode IS source current Tsp = 25 °C - 0.44 A ISM peak source current Tsp = 25 °C; pulsed; tp ≤ 10 µs - 0.88 A PMR400UN Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 2 February 2012 © NXP B.V. 2012. All rights reserved. 2 of 13 PMR400UN NXP Semiconductors N-channel TrenchMOS ultra low level FET 03aa25 120 03aa17 120 Ider (%) Pder (%) 80 80 40 40 0 0 0 50 100 150 200 0 50 100 150 Tsp (°C) Fig 1. 200 Tsp (°C) Normalized continuous drain current as a function of solder point temperature Fig 2. Normalized total power dissipation as a function of solder point temperature 03ao06 10 ID (A) Limit RDSon = VDS / ID tp = 10 μ s 1 100 μ s DC 1 ms 10-1 10 ms 100 ms 10-2 10-1 1 102 10 VDS (V) Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage PMR400UN Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 2 February 2012 © NXP B.V. 2012. All rights reserved. 3 of 13 PMR400UN NXP Semiconductors N-channel TrenchMOS ultra low level FET 6. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Rth(j-sp) thermal resistance from junction to solder point Min Typ Max Unit - - 235 K/W 03an29 103 Zth(j-sp) (K/W) δ = 0.5 102 0.2 P 0.1 δ= tp T 0.05 0.02 10 10-4 Fig 4. t tp T single pulse 10-3 10-2 10-1 1 tp (s) 10 Transient thermal impedance from junction to solder point as a function of pulse duration PMR400UN Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 2 February 2012 © NXP B.V. 2012. All rights reserved. 4 of 13 PMR400UN NXP Semiconductors N-channel TrenchMOS ultra low level FET 7. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit ID = 1 µA; VGS = 0 V; Tj = 25 °C 30 - - V ID = 1 µA; VGS = 0 V; Tj = -55 °C 27 - - V ID = 0.25 mA; VDS = VGS; Tj = 25 °C 0.45 0.7 1 V ID = 0.25 mA; VDS = VGS; Tj = 150 °C 0.25 - - V ID = 0.25 mA; VDS = VGS; Tj = -55 °C - - 1.2 V Static characteristics V(BR)DSS drain-source breakdown voltage VGS(th) gate-source threshold voltage IDSS IGSS RDSon drain leakage current gate leakage current drain-source on-state resistance VDS = 30 V; VGS = 0 V; Tj = 25 °C - - 1 µA VDS = 30 V; VGS = 0 V; Tj = 150 °C - - 100 µA VGS = 8 V; VDS = 0 V; Tj = 25 °C - 10 100 nA VGS = -8 V; VDS = 0 V; Tj = 25 °C - 10 100 nA VGS = 4.5 V; ID = 0.2 A; Tj = 25 °C - 400 480 mΩ VGS = 4.5 V; ID = 0.2 A; Tj = 150 °C - 660 816 mΩ VGS = 2.5 V; ID = 0.1 A; Tj = 25 °C - 480 580 mΩ VGS = 1.8 V; ID = 0.075 A; Tj = 25 °C - 580 830 mΩ ID = 1 A; VDS = 15 V; VGS = 4.5 V; Tj = 25 °C - 0.89 - nC - 0.1 - nC - 0.2 - nC Dynamic characteristics QG(tot) total gate charge QGS gate-source charge QGD gate-drain charge Ciss input capacitance Coss output capacitance Crss reverse transfer capacitance td(on) turn-on delay time tr rise time td(off) tf VDS = 25 V; VGS = 0 V; f = 1 MHz; Tj = 25 °C VDS = 15 V; RL = 15 Ω; VGS = 4.5 V; RG(ext) = 6 Ω; Tj = 25 °C - 43 - pF - 7.7 - pF - 4.8 - pF - 4 - ns - 7.5 - ns turn-off delay time - 18 - ns fall time - 4.5 - ns - 0.76 1.2 V Source-drain diode VSD source-drain voltage PMR400UN Product data sheet IS = 0.3 A; VGS = 0 V; Tj = 25 °C All information provided in this document is subject to legal disclaimers. Rev. 2 — 2 February 2012 © NXP B.V. 2012. All rights reserved. 5 of 13 PMR400UN NXP Semiconductors N-channel TrenchMOS ultra low level FET 03an94 2.5 ID (A) 4.5 3 03an96 2.5 2.5 ID (A) 2 2 25 °C 2 1.5 Tj = 150 °C 1.5 1.8 1 1 VGS (V) = 1.5 0.5 0.5 0 0 0 Fig 5. 0.5 1 1.5 2 VDS (V) Output characteristics: drain current as a function of drain-source voltage; typical values 0 Fig 6. RDSon (Ω) 3 4 VGS (V) 03af18 2 2 VGS (V) = 1.8 2 Transfer characteristics: drain current as a function of gate-source voltage; typical values 03an95 1 1 a 0.8 1.5 2.5 0.6 3 1 4.5 0.4 0.5 0.2 0 0 Fig 7. 0.5 1 1.5 2 ID (A) Drain-source on-state resistance as a function of drain current; typical values PMR400UN Product data sheet 0 -60 2.5 Fig 8. 0 60 120 Tj (°C) 180 Normalized drain-source on-state resistance factor as a function of junction temperature All information provided in this document is subject to legal disclaimers. Rev. 2 — 2 February 2012 © NXP B.V. 2012. All rights reserved. 6 of 13 PMR400UN NXP Semiconductors N-channel TrenchMOS ultra low level FET 03aj65 1.2 VGS(th) (V) 03am43 10−3 ID (A) 0.9 max 10−4 min typ max typ 0.6 10−5 min 0.3 0 −60 10−6 0 60 120 0 180 0.4 0.8 Tj (°C) 1.2 VGS (V) ID = 0.25 mA; VDS = VGS Fig 9. Gate-source threshold voltage as a function of junction temperature Fig 10. Sub-threshold drain current as a function of gate-source voltage 03an98 102 03an97 1 VGS = 0 V IS (A) C (pF) Ciss 0.8 0.6 10 Coss 0.4 Crss 0.2 1 10-1 1 10 VDS (V) 102 Fig 11. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values PMR400UN Product data sheet 150 °C Tj = 25 °C 0 0 0.2 0.4 0.6 0.8 1 VSD (V) Fig 12. Source current as a function of source-drain voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 2 — 2 February 2012 © NXP B.V. 2012. All rights reserved. 7 of 13 PMR400UN NXP Semiconductors N-channel TrenchMOS ultra low level FET 03an99 5 ID = 1 A Tj = 25 °C VDS = 15 V VGS (V) 4 3 2 1 0 0 0.2 0.4 0.6 0.8 1 QG (nC) Fig 13. Gate-source voltage as a function of gate charge; typical values PMR400UN Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 2 February 2012 © NXP B.V. 2012. All rights reserved. 8 of 13 PMR400UN NXP Semiconductors N-channel TrenchMOS ultra low level FET 8. Package outline 0.95 0.60 1.8 1.4 3 0.45 0.15 1.75 0.9 1.45 0.7 1 2 0.30 0.15 0.25 0.10 1 Dimensions in mm 04-11-04 Fig 14. Package outline SOT416 (SC-75) 9. Soldering 2.2 1.7 solder lands solder resist 1 0.85 2 solder paste 0.5 (3×) occupied area Dimensions in mm 0.6 (3×) 1.3 sot416_fr Fig 15. Reflow soldering footprint for SOT416 (SC-75) PMR400UN Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 2 February 2012 © NXP B.V. 2012. All rights reserved. 9 of 13 PMR400UN NXP Semiconductors N-channel TrenchMOS ultra low level FET 10. Revision history Table 8. Revision history Document ID Release date Data sheet status Change notice Supersedes PMR400UN v.2 20120202 Product data sheet - PMR400UN v.1 Modifications: PMR400UN v.1 PMR400UN Product data sheet • The format of this document has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. 20040303 Product data sheet - All information provided in this document is subject to legal disclaimers. Rev. 2 — 2 February 2012 - © NXP B.V. 2012. All rights reserved. 10 of 13 PMR400UN NXP Semiconductors N-channel TrenchMOS ultra low level FET 11. Legal information 11.1 Data sheet status Document status [1] [2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 11.2 Definitions Preview — The document is a preview version only. The document is still subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. 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This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. All information provided in this document is subject to legal disclaimers. Rev. 2 — 2 February 2012 © NXP B.V. 2012. All rights reserved. 11 of 13 PMR400UN NXP Semiconductors N-channel TrenchMOS ultra low level FET Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. 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In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 11.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. 12. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] PMR400UN Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 2 February 2012 © NXP B.V. 2012. All rights reserved. 12 of 13 PMR400UN NXP Semiconductors N-channel TrenchMOS ultra low level FET 13. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 11 11.1 11.2 11.3 11.4 12 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .1 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2 Thermal characteristics . . . . . . . . . . . . . . . . . . .4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .9 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . .10 Legal information. . . . . . . . . . . . . . . . . . . . . . . . 11 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Contact information. . . . . . . . . . . . . . . . . . . . . .12 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2012. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 2 February 2012 Document identifier: PMR400UN