Data Sheet

DISCRETE SEMICONDUCTORS
DATA SHEET
age
M3D087
BSP130
N-channel enhancement mode
vertical D-MOS transistor
Product specification
Supersedes data of 1997 Jun 23
2001 Dec 11
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSP130
FEATURES
PINNING - SOT223
• Direct interface to C-MOS, TTL, etc.
PIN
DESCRIPTION
• High-speed switching
1
gate
• No secondary breakdown.
2
drain
3
source
4
drain
APPLICATIONS
• Line current interruptor in telephone sets
• Relay, high-speed and line transformer drivers.
d
4
handbook, halfpage
DESCRIPTION
N-channel enhancement mode vertical D-MOS transistor
in a SOT223 package.
g
1
2
s
3
Top view
MAM054
Marking code BSP130.
Fig.1 Simplified outline and symbol.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDS
drain-source voltage (DC)
−
300
V
ID
drain current (DC)
−
350
mA
Ptot
total power dissipation
Tamb ≤ 25 °C
−
1.5
W
VGSO
gate-source voltage
open drain
−
±20
V
RDSon
drain-source on-state
resistance
ID = 250 mA; VGS = 10 V
−
6
Ω
VGSoff
gate-source cut-off voltage
ID = 1 mA; VDS = VGS
0.8
2
V
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
−
300
V
−
±20
V
drain current (DC)
−
350
mA
peak drain current
−
1.4
A
−
1.5
W
storage temperature
−55
+150
°C
junction temperature
−
150
°C
VDS
drain-source voltage (DC)
VGSO
gate-source voltage (DC)
ID
IDM
Ptot
total power dissipation
Tstg
Tj
open drain
Tamb ≤ 25 °C; note 1
Note
1. Device mounted on an epoxy printed-circuit board, 40 x 40 x 1.5 mm, mounting pad for the drain tab minimum 6 cm2.
2001 Dec 11
2
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSP130
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
PARAMETER
VALUE
UNIT
83.3
K/W
thermal resistance from junction to ambient; note 1
Note
1. Device mounted on an epoxy printed-circuit board, 40 x 40 x 1.5 mm, mounting pad for the drain tab minimum 6 cm2.
STATIC CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
V(BR)DSS
drain-source breakdown voltage
ID = 10 µA; VGS = 0
300
−
−
V
IGSS
gate-source leakage current
VGS = ±20 V; VDS = 0
−
−
±100
nA
VGSth
gate-source threshold voltage
ID = 1 mA; VDS = VGS
0.8
−
2
V
RDSon
drain-source on-state resistance
ID = 20 mA; VGS = 2.4 V
−
4.8
10
Ω
ID = 250 mA; VGS = 10 V
−
3.7
6
Ω
IDSS
drain-source leakage current
VDS = 240 V; VGS = 0
−
−
100
nA
 Yfs
transfer admittance
ID = 250 mA; VDS = 25 V
200
690
−
mS
Ciss
input capacitance
VDS = 25 V; VGS = 0; f = 1 MHz
−
100
120
pF
Coss
output capacitance
VDS = 25 V; VGS = 0; f = 1 MHz
−
21
30
pF
Crss
feedback capacitance
VDS = 25 V; VGS = 0; f = 1 MHz
−
10
15
pF
Switching times (see Figs 2 and 3)
ton
turn-on time
ID = 250 mA; VDD = 50 V;
VGS = 0 to 10 V
−
6
10
ns
toff
turn-off time
ID = 250 mA; VDD = 50 V;
VGS = 10 to 0 V
−
46
60
ns
2001 Dec 11
3
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSP130
handbook, halfpage
VDD = 50 V
handbook, halfpage
90 %
INPUT
10 %
90 %
OUTPUT
10 V
ID
0V
10 %
50 Ω
ton
MBB691
MBB692
Fig.2 Switching times test circuit.
Fig.3 Input and output waveforms.
MRC218
2
toff
MLD765
250
handbook, halfpage
handbook, halfpage
Ptot
C
(pF)
(W)
200
1.5
150
1
Ciss
100
0.5
50
Coss
Crss
0
0
0
50
100
150
Tj (°C)
0
200
10
20
VDS (V)
30
VGS = 0; f = 1 MHz; Tj = 25 °C.
Fig.5
Fig.4 Power derating curve.
2001 Dec 11
4
Capacitance as a function of drain-source
voltage; typical values.
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSP130
MLD766
1.2
handbook, halfpage
VGS = 10 V
ID
4V
(A)
3.5 V
MLD767
1.2
handbook, halfpage
5V
ID
(A)
3V
0.8
0.8
0.4
0.4
2.5 V
2V
0
0
0
4
8
VDS (V)
12
0
Tj = 25 °C.
4
6
8
10
VGS (V)
VDS = 10 V; Tj = 25 °C.
Fig.6 Typical output characteristics.
Fig.7 Typical transfer characteristics.
MLD768
30
handbook, halfpage
2
MLD769
20
handbook, halfpage
VGS = 2 V
2.5 V
RDSon
(Ω)
3V
RDSon
3.5 V
(Ω)
15
20
10
10
5
4V
5V
10 V
0
10−1
1
ID (A)
0
10
0
4
6
8
10
VGS (V)
VDS = 100 mV; Tj = 25 °C.
Tj = 25 °C.
Fig.8
2
Drain-source on-state resistance as a
function of drain current; typical values.
2001 Dec 11
Fig.9
5
Drain-source on-state resistance as a function
of gate-source voltage; typical values.
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSP130
MRC221
102
handbook, full pagewidth
δ=
0.75
0.5
Rth j-a
(K/W)
0.2
10
0.1
0.05
0.02
0.01
1
δ=
P
tp
T
0
t
tp
T
10−1
10−5
10−4
10−3
10−2
10−1
1
10
102
tp (s)
Fig.10 Transient thermal resistance from junction to ambient as a function of pulse time.
MLD773
10
handbook, halfpage
ID
(A)
1
tp =
10 µs
100 µs
1 ms
10 ms
(1)
10−1
DC
100 ms
tp
δ= T
P
1s
10−2
t
tp
T
10−3
10
1
102
VDS (V)
103
δ = 0.01; Tamb = 25 °C.
(1) RDSon limitation.
Fig.11 SOAR curve.
2001 Dec 11
6
103
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSP130
MLD771
2
MLD772
1.25
handbook, halfpage
handbook, halfpage
k
k
(1)
1
1.5
(2)
0.75
1
0.5
0.5
0.25
0
−50
0
50
100
Tj (°C)
0
-50
150
0
50
100
150
Tj (°C)
R DS(on) at T j
k = ----------------------------------------R DS(on) at 25 °C
V GS ( th ) at T j
k = -------------------------------------------.
V GS ( th ) at 25 °C
Typical RDSon;
(1) ID = 250 mA; VGS = 10 V.
(2) ID = 20 mA; VGS = 2.4 V.
Typical VGSth at 1 mA.
Fig.12 Temperature coefficient of drain-source
on-state resistance; typical values.
Fig.13 Temperature coefficient of gate-source
threshold voltage; typical values.
2001 Dec 11
7
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSP130
PACKAGE OUTLINE
Plastic surface mounted package; collector pad for good heat transfer; 4 leads
D
SOT223
E
B
A
X
c
y
HE
v M A
b1
4
Q
A
A1
1
2
3
Lp
bp
e1
w M B
detail X
e
0
2
4 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
bp
b1
c
D
E
e
e1
HE
Lp
Q
v
w
y
mm
1.8
1.5
0.10
0.01
0.80
0.60
3.1
2.9
0.32
0.22
6.7
6.3
3.7
3.3
4.6
2.3
7.3
6.7
1.1
0.7
0.95
0.85
0.2
0.1
0.1
OUTLINE
VERSION
SOT223
2001 Dec 11
REFERENCES
IEC
JEDEC
EIAJ
SC-73
8
EUROPEAN
PROJECTION
ISSUE DATE
97-02-28
99-09-13
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSP130
DATA SHEET STATUS
DATA SHEET STATUS(1)
PRODUCT
STATUS(2)
DEFINITIONS
Objective data
Development
This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Preliminary data
Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
DEFINITIONS
DISCLAIMERS
Short-form specification  The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Life support applications  These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition  Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes  Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2001 Dec 11
9
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSP130
NOTES
2001 Dec 11
10
Philips Semiconductors
Product specification
N-channel enhancement mode
vertical D-MOS transistor
BSP130
NOTES
2001 Dec 11
11
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: [email protected]
SCA73
© Koninklijke Philips Electronics N.V. 2001
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
613510/03/pp12
Date of release: 2001
Dec 11
Document order number:
9397 750 09064
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