dm00031449

AN3412
10 W +10 W dual BTL class-D audio amplifier demonstration board
based on the TDA7491P
Introduction
The STEVAL-CCA028V1 is a demonstration board designed for the TDA7491P dual BTL
class-D audio amplifier. This application note provides the board specifications and a quickstart list for standalone operation. Also included are the schematic, printed circuit board
layout and bill of material.
Due to its high efficiency, the device assembled in the PSSO36 (slug-down) package is
capable of dissipating heat without any heatsink. Jumpers on the board allow configuring
the amplifier in order to verify all the features as single-ended or differential inputs, fixed gain
settings. Microswitches are also provided to enable the standby and mute functions.
The main features of the TDA7491P include:
■
10 W +10 W continuous output power at THD =10%, RL = 6 Ω, VCC = 11 V
■
9.5 W +9.5 W continuous output power at THD = 10%, RL = 8 Ω, VCC =12 V
■
Wide-range, single-supply operation (5 V - 18 V)
■
High efficiency (η = 90%)
■
Four selectable, fixed gain settings (20 dB, 26 dB, 30 dB and 32 dB)
■
Differential inputs to minimize common-mode noise
■
Filterless operation
■
Standby and mute features
■
Short-circuit and thermal overload protections
■
Externally synchronizable
Figure 1.
June 2011
STEVAL-CCA028V1
Doc ID 018920 Rev 1
1/15
www.st.com
Contents
AN3412
Contents
1
2
3
2/15
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2
Demonstration board preparation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3
Inputs and outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.4
Powering up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.5
Gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.6
Single-ended or differential input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.7
Board schematic and bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1
Layout views . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2
Design guidelines for PCB schematic and layout . . . . . . . . . . . . . . . . . . . . 9
2.2.1
Dumping network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2.2
Main filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.2.3
Layout recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Doc ID 018920 Rev 1
AN3412
1
Operation
Operation
The TDA7491P demonstration board specifications are as follows:
1.1
●
Power supply voltage range: 5 V to 18 V
●
Number of channels: 2 BTL (Bridge Tied Load) stereo
●
Load impedance: 4 Ω to 8 Ω
●
Gain settings: 20 dB, 26 dB, 30 dB, 32 dB
●
Undervoltage protection (UVP): 4.5 V
Power supply
A single power supply is required to feed the TDA7491P demonstration board via the
connector J2 (see Figure 2).
Connect the positive voltage of the 25 V/ 5 A DC power supply to the +Vcc pin and the
negative to GND.
Note:
Voltage range 5 V to 18 V = 3 A current capability
1.2
Demonstration board preparation
1.3
1.
Ensure that the power supply is switched OFF.
2.
Connect the regulated power supply, adjusted in the device operating range, to the
connector J2 (observe the polarity).
Inputs and outputs
1.
Connect the loads across the connectors J3 (LEFT) and J4 (RIGHT), the specified
impedance ranges from 6 to 8 Ω.
2.
Connect the analog audio inputs, either differential or single-ended, to the L-input and
R-input RCA plugs (J1).
Table 1.
Input configuration
Input configuration
Jumper J8 (right)
Jumper J9 (left)
Differential
Open
Open
Single-ended
Closed
Closed
Refer to Section Figure 2.: Demonstration board connections on page 4.
Doc ID 018920 Rev 1
3/15
Operation
AN3412
Figure 2.
Demonstration board connections
STBY
MUTE
Dummy
Load
GND
+VCC
Analog
Inputs
Dummy
Load
1.4
Powering up
Before powering up the demonstration board, ensure that the TDA7491P is in standby and
mute conditions and the gain is set to the desired value (default 20 dB). Verify also the
dedicated switches and jumpers.
Table 2.
Figure 3.
Standby and mute settings
STBY (S1)
Mute (S2)
Status
L
L
STBY
L
H
STBY
H
L
MUTE
H
H
PLAY
Standby and mute switches
S1= STBY
L
H
L
H
S2= MUTE
4/15
Doc ID 018920 Rev 1
AN3412
1.5
Operation
Gain settings
Table 3.
Configuration of jumpers J5 and J6
Figure 4.
1.6
Gain 0 (J5)
Gain 1 (J6)
Gain (db)
Open (L)
Open (L)
20
Open (L)
Closed (H)
26
Closed (H)
Open (L)
30
Closed (H)
Closed (H)
32
Jumpers J5 and J6
Single-ended or differential input
Jumpers J8 and J9 are used to modify the input signal configuration.
Table 4.
Configuration of jumpers J8 and J9
Input configuration
Left (J9)
Right (J8)
Differential
Open
Open
Single-ended
Closed
Closed
Figure 5.
Jumpers J8 and J9
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5/15
Operation
AN3412
1.7
Board schematic and bill of material
Figure 6.
STEVAL-CCA028V1 schematic
C3
1nF
C4
1nF
C1 470nF
C2 470nF
C5
100nF
)RU6LQJOH(QGHG
-
C6
100nF
,15
,15
4
3
R3
39K
-
VDDS
31 GAIN1
-
)RU6LQJOH(QGHG,QSXW
C10
100nF
-
C11 470nF
C13
1nF
C12 470nF
3V3
C14
6 087(
1
3
2
1
3
2
6 67%<
OUT
& 1
X)
,&
IN
L4931CZ33 3
2
GND
1nF
R4 33k
+
R2 N
+
5 VCC
N
&
R13
Q) 9.1k
932:(56833/<
6/15
33 INNB
21 MUTE
C15
2.2uF
16V 20 STBY
C7
2.2uF
16V
C27
330pF
OUTNA 10
OUTNA 11
L3
2
287/
287/
IC1
TDA7492P
(TDA7491P/LP/HV)
OUTPB
3
OUTPB
2
C24
100nF
J2
C30 C31 C32 C33
C23 +
10uF 16V+ + + +
470uF
OPTION
25V
L1
PVCCB 7
PVCCB 6
C18
100nF
R5
22R
OUTNB 9
OUTNB 8
L2
9&&
2
*1'
J4
C21
330pF
1
1
&
Q)
C19
100nF
PGNDB 5
PGNDB 4
32 INPB
J3
&
Q)
PVCCA 12
PVCCA 13
35 SVCC
36 VSS
C28
100nF
R6
22R
1
18 PGND
30 GAIN0
C25
100nF
DIAG
24 ROSC
C8
100nF
L4
27 SGND
25 SYNCLK
,1/
,1/
PGNDA 14
PGNDA 15
19 VDDPW
J1
2
23 INNA
R1 100k 28
SYNCLK
1
OUTPA 16
OUTPA 17
26 VDDS
R7
22R
Input
1 SUB_GND
22 INPA
2
2875
2875
C22
100nF
VREF 34
+
SVR 29
+
7'$3
&/$66'$03/,),(5
Doc ID 018920 Rev 1
C17
1uF
16V
C16
1uF
16V
LC FILTER COMPONENT
Load
L1,L2,L3,L4
C20,C26
4 ohm
15 uH
470 nF
6 ohm
22 uH
220 nF
8 ohm
33 uH
220 nF
16 ohm
68 uH
220 nF
AN3412
Table 5.
Package
Operation
Bill of material
Description
Qty
Reference
Manufacturer
C0603
330 pF 50 V NPO ±5%
2
C21, C27
Murata
C0603
1 nF 50 V ±10%
4
C3, C4, C13, C14
Murata
C0603
100 nF 50 V ±10%
11
C5, C6, C8, C9, C10, C18,
C19, C22, C24, C25, C28
Murata
C0603
470 nF 50 V ±10%
4
C1, C2, C11, C12
Murata
C0603
2.2 µF, 16 V ±10%
3
C7, C15, C29
Murata
C0603
1 µF, 16 V, ±10%
2
C16, C17
Murata
E-cap 8X20
470 µF, 25 V, ±10%,
pitch = 5.0 mm
1
C23
C1206
10 µF, 25 V, ±20%, Y5V
4
C30, C31, C32, C33
Murata
Mcap 7x5
220 nF, 50 V, ±10%
2
C20, C26
Murata
R0603
22 ohm, ±10%, 1/16 W
3
R5, R6, R7
Murata
R0603
2.2k ohm, ±10%, 1/16 W
1
R8
Murata
R0603
9.1k ohm, ±10%, 1/16 W
1
R13
Murata
R0603
33k ohm, ±10%, 1/16 W
2
R2, R4
Murata
R0603
39k ohm, ±10%, 1/16 W
1
R3
Murata
R0603
100k ohm, ±10%, 1/16 W
1
R1
Murata
PSSO36
slug-down
TDA7491P (SSO36) slug-down
1
IC1
STMicroelectronics
Coil 10X10
33 µh 2 A coil MSS1046-333ML(1)
4
L1, L2, L3, L4
RCA-2P
RCA socket 2Px2, type AV2-8.4-12
1
J1
Songcheng
TO92
L4931CZ33, 3V3 regulator
1
IC2
STMicroelectronics
CNN-Terminal 2P, pitch = 5 mm connector terminal
3
J2, J3, J4
Any source
2-way jumper
2P, pitch = 2.5 mm jumper
4
J5, J6, J8, J9
Any source
Slide switch
3P, pitch = 2.5 mm
2
S1, S2
Any source
Panasonic
Coilcraft
1. Alternate part MSS1246/MSS1260
Doc ID 018920 Rev 1
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PCB layout
AN3412
2
PCB layout
2.1
Layout views
8/15
Figure 7.
Top view of PCB layout
Figure 8.
Bottom view of PCB layout
Doc ID 018920 Rev 1
AN3412
PCB layout
Figure 9.
Top view of PCB layout - with dimensions
2.2
Design guidelines for PCB schematic and layout
2.2.1
Dumping network
The capacitor is mainly intended for high inductive loads and for common mode noise
attenuation.
Figure 10. Dumping network
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PCB layout
2.2.2
AN3412
Main filter
The main filter is an LC Butterworth based filter. The cutoff frequency must be chosen
between the upper limit of the audio band (~20 kHz) and the carrier frequency (310 kHz).
Figure 11. Main filter
Table 6.
10/15
Recommended values
RLOAD
8Ω
6Ω
LLOAD
33 µH
22 µH
CLOAD
220 nF
220 nF
Doc ID 018920 Rev 1
AN3412
2.2.3
PCB layout
Layout recommendations
The following figures illustrate layout recommendations.
Solder 100 nF bypass capacitors (X7R) as close as possible to the IC VCC pins
(recommended distance to be within 3 mm) in order to avoid spikes generated by the stray
inductance caused by the copper supply lines.
Figure 12. Capacitors soldered as close as possible to VCC pins
Ground pin and VCC pin of 100nF
capacitor should be connected to
IC related pin directly
Solder the snubber networks as close as possible to the IC related pin.
A voltage spike dangerous for device operation could occur if the snubber network is far
from the output pins. It is recommended that the distance between the snubber network and
the output pins be within 5 mm.
Figure 13. Snubber networks soldered as close as possible to relevant IC pin
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PCB layout
AN3412
Put the RC filter for the ROSC pin close to the IC.
Figure 14. RC filter
Put the filter capacitor for SVR, VREF, SVCC, VSS and VDDPW close to the IC.
Figure 15. Filter capacitor
12/15
Doc ID 018920 Rev 1
AN3412
PCB layout
Signal ground should be directly connected to the negative terminal of the bulk capacitor.
Figure 16. Signal ground routing
Signal gnd
C23 gnd pin
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Revision history
3
AN3412
Revision history
Table 7.
14/15
Document revision history
Date
Revision
15-Jun-2011
1
Changes
Initial release.
Doc ID 018920 Rev 1
AN3412
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