AN3956 Application note 5 W + 5 W dual BTL class-D audio amplifier demonstration board based on the TDA7491LP Introduction The STEVAL-CCA029V1 is a demonstration board designed for the TDA7491LP dual BTL class-D audio amplifier. This application note provides the board specifications and a quickstart list for standalone operation. Also included are the schematic, printed circuit board layout and bill of material. Due to its high efficiency, the device assembled in the PSSO36 (slug-down) package is capable of dissipating heat without any heatsink. Jumpers on the board allow the configuration of the amplifier in order to verify all the features as single-ended or differential inputs, fixed gain settings. Microswitches are also provided to enable the standby and mute functions. The main features of the TDA7491LP include: ■ 5 W +5 W continuous output power at THD =10%, RL = 8 Ω, VCC = 9 V ■ 5 W +5 W continuous output power at THD = 10%, RL = 4 Ω, VCC =6.5V ■ Wide-range, single-supply operation (5 V - 14 V) ■ High efficiency (η = 90%) ■ Four selectable, fixed gain settings (20 dB, 26 dB, 30 dB and 32 dB) ■ Differential inputs to minimize common-mode noise ■ Filterless operation ■ Standby and mute features ■ Short-circuit and thermal overload protections ■ Externally synchronizable Figure 1. September 2012 STEVAL-CCA029V1 Doc ID 022034 Rev 1 1/14 www.st.com Contents AN3956 Contents 1 2 3 2/14 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 Demonstration board preparation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 Inputs and outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.4 Powering up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.5 Gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.6 Single-ended or differential input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.7 Board schematic and bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 Layout views . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 Design guidelines for PCB schematic and layout . . . . . . . . . . . . . . . . . . . . 9 2.2.1 Dumping network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2.2 Filterless operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2.3 Layout recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Doc ID 022034 Rev 1 AN3956 1 Operation Operation The TDA7491LP demonstration board specifications are as follows: 1.1 ● Power supply voltage range: 5 V to 14V ● Number of channels: 2 BTL (bridge-tied load) stereo ● Load impedance: 4 Ω to 8 Ω ● Gain settings: 20 dB, 26 dB, 30 dB, 32 dB ● Undervoltage protection (UVP): 4 V Power supply A single power supply is required to feed the TDA7491LP demonstration board via the connector J2 (see Figure 2). Connect the positive voltage of the 15 V/3 A DC power supply to the +Vcc pin and the negative to GND. Note: Voltage range 5 V to 14 V = 3 A current capability 1.2 Demonstration board preparation 1.3 1. Ensure that the power supply is switched OFF. 2. Connect the regulated power supply, adjusted in the device operating range, to the connector J7(Vcc) - J8(GND) (observe the polarity). Inputs and outputs 1. Connect the loads across the connectors J5-J6 (LEFT) and J9-J10 (RIGHT), the specified impedance ranges from 4 to 8 Ω. 2. Connect the analog audio inputs, single-ended, to the L-input and R-input RCA plugs (J1). Refer to Figure 2: Demonstration board connections on page 4. Doc ID 022034 Rev 1 3/14 Operation AN3956 Figure 2. Demonstration board connections 1.4 Powering up Before powering up the demonstration board, ensure that the TDA7491LP is in standby and mute conditions and the gain is set to the desired value (default 20 dB). Verify also the dedicated switches and jumpers. Table 1. Figure 3. Standby and mute settings STBY (S1) Mute (S2) Status L L STBY L H STBY H L MUTE H H PLAY Standby and mute switches S 1= S T B Y L H L H S 2= M UT E 4/14 Doc ID 022034 Rev 1 AN3956 1.5 Operation Gain settings Table 2. Figure 4. Configuration of jumpers J11 and J12 Gain 0 (J11) Gain 1 (J12) Gain (db) Open (L) Open (L) 20 Open (L) Closed (H) 26 Closed (H) Open (L) 30 Closed (H) Closed (H) 32 Jumpers J11 and J12 Closed=H Open=L J11/J12 J11/J12 J12=G1 1.6 J11=G0 Single-ended or differential input Although the TDA7491LP can be configured for both input configurations, the STEVALCCA029V1 allows only the single-ended connection. Doc ID 022034 Rev 1 5/14 Operation AN3956 1.7 Board schematic and bill of material Figure 5. STEVAL-CCA029V1 schematic 6/14 Doc ID 022034 Rev 1 AN3956 Table 3. Type Operation Bill of material Footprint Description Qty Reference Manufacturer CCAP CAP0603 330 pF 50 V NPO ±5% 2 C21, C27 Murata CCAP CAP0603 2200 pF 50 V X7R 4 C18, C22, C24, C28 Murata CCAP CAP0603 1 nF 50 V ±10% 4 C3, C4, C13, C14 Murata CCAP CAP0603 100 nF 50 V ±10% 7 C5, C6, C8, C9, C10, C19, C25 Murata CCAP CAP0603 220 nF 50 V ±10% 4 C1, C2, C11, C12 Murata CCAP CAP0603 2.2 µF, 16 V ±10% 1 C29 Murata ECAP CAP0603 2.2 µF, 16 V, ±10% 2 C7, C15 Murata ECAP CAP0603 1 µF, 16 V, ±10% 2 C16, C17 Murata ECAP D < 12.0 mm 1000 µF, 25 V, ±10%, pitch = 5.0 mm 1 C23 Rubicon SMD tantalum CAP1206 10 µF, 25 V, ±10%, tantalum 4 C31, C32, C33, C34 Rubicon RES R0603 22 ohm, ±10%, 1/16 W 3 R5, R6, R7 Murata RES R0603 2.2k ohm, ±10%, 1/16 W 1 R8 Murata RES R0603 9.1k ohm, ±10%, 1/16 W 1 R13 Murata RES R0603 33k ohm, ±10%, 1/16 W 2 R2, R4 Murata RES R0603 39k ohm, ±10%, 1/16 W 1 R3 Murata RES R0603 100k ohm, ±10%, 1/16 W 1 R1 Murata Terminal Through-hole 2P, pitch = 5 mm connector terminal 3 J2, J3, J4 Any source Jumper 2-way jumper 2P, pitch = 2.5 mm jumper 4 J5, J6, J8, J9 Any source Switch Slide 3P, pitch = 2.5 mm 2 S1, S2 Any source Bead SMD 0R 1 L1 Any source Jumper 3-way jumper 3P, pitch = 2.5 mm jumper 2 J11, J12 Any source IC TDA7491LP TDA7491LP (SSO36) slug-down 1 IC1 Bead SMD BLM41PG471SN1 4 L2, L3, L4, L7 Connector RCA-2P RCA socket 2Px2, type AV2-8.4-12 1 J1 Songcheng Regulator TO92 L4931CZ33, 3V3 regulator 1 IC2 STMicroelectronics PCB 75 x 50 mm TDA7491P filterless PCB 1 Doc ID 022034 Rev 1 STMicroelectronics Murata King Brother 7/14 PCB layout AN3956 2 PCB layout 2.1 Layout views 8/14 Figure 6. Top view of PCB layout Figure 7. Bottom view of PCB layout Doc ID 022034 Rev 1 AN3956 PCB layout Figure 8. Top view of PCB layout - with dimensions 2.2 Design guidelines for PCB schematic and layout 2.2.1 Dumping network The capacitor is mainly intended for high inductive loads and for common-mode noise attenuation. Figure 9. 2.2.2 Dumping network (for one channel) Filterless operation The TDA7491LP can avoid using the main filter (LC Butterworth-based filter) if the speakers are placed at a distance within 50 cm. In order to improve the EMI performance ferrite beads are used (see Figure 5 and Table 3 for details). Doc ID 022034 Rev 1 9/14 PCB layout 2.2.3 AN3956 Layout recommendations The following figures illustrate layout recommendations. Solder 100 nF bypass capacitors (X7R) as close as possible to the IC VCC pins (recommended distance to be within 3 mm) in order to avoid spikes generated by the stray inductance caused by the copper supply lines. Figure 10. Capacitors soldered as close as possible to VCC pins Ground pin and VCC pin of 100nF capacitor shouldbe directly connected to the IC related pin Solder the snubber networks as close as possible to the IC related pin. A voltage spike dangerous for device operation could occur if the snubber network is far from the output pins. It is recommended that the distance between the snubber network and the output pins be within 5 mm. Figure 11. Snubber networks soldered as close as possible to relevant IC pin Snubbers 10/14 Doc ID 022034 Rev 1 AN3956 PCB layout Put the RC filter for the ROSC pin close to the IC. Figure 12. RC filter Put the filter capacitor for SVR, VREF, SVCC, VSS and VDDPW close to the IC. Figure 13. Filter capacitor Doc ID 022034 Rev 1 11/14 PCB layout AN3956 Signal ground should be directly connected to the negative terminal of the bulk capacitor. Figure 14. Signal ground routing Signal gnd C23 gnd pin 12/14 Doc ID 022034 Rev 1 AN3956 3 Revision history Revision history Table 4. Document revision history Date Revision 21-Sep-2012 1 Changes Initial release. Doc ID 022034 Rev 1 13/14 AN3956 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. 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