dm00026181

AN3385
Application note
50 W + 50 W dual BTL class-D audio amplifier demonstration board
based on the TDA7492
Introduction
This application note describes the STEVAL-CCA027V1 demonstration board designed for
the evaluation of the TDA7492 high-power dual BTL class-D audio amplifier and provides
the board specifications and a quick-start list for standalone operation.
Due to the device’s high efficiency, the TDA7492, housed in the PSSO-36 package, is
capable of dissipating heat with the use of a relatively small heatsink. Jumpers on the board
allow the configuration of the amplifier in order to verify the input signal as single-ended or
differential and choose the fixed gain settings. Microswitches are also provided to enable the
standby and mute functions.
The main features of the TDA7492 include:
■
50 W + 50 W continuous output power at THD = 10%, RL= 6 Ω, VCC = 25 V
■
40 W + 40 W continuous output power at THD = 10%, RL = 8 Ω, VCC = 25 V
■
Wide-range, single-supply operation ( 8 V - 26 V)
■
High efficiency (η = 90 %)
■
Four selectable, fixed gain settings (21.6 dB, 27.6 dB, 31.1 dB and 33.6 dB)
■
Differential inputs to minimize common-mode noise
■
Standby and mute features
■
Short-circuit and thermal overload protections
■
Externally synchronizable
Figure 1.
October 2012
STEVAL-CCA027V1 demonstration board
Doc ID 018702 Rev 1
1/15
www.st.com
Contents
AN3385
Contents
1
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2
Demonstration board preparation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3
Inputs and outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.4
Powering up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Board schematic and bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4
2/15
3.1
Layout views . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.2
Design guidelines for PCB schematic and layout . . . . . . . . . . . . . . . . . . . . 9
3.2.1
Dumping network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2.2
Main filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.2.3
Layout recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Doc ID 018702 Rev 1
AN3385
1
Operation
Operation
The TDA7492 demonstration board specifications are as follows:
1.1
●
Power supply voltage range: 8 V to 26 V
●
Number of channels: 2 BTL (Bridge-Tied Load) stereo
●
Load impedance: 6 Ω to 8 Ω
●
Gain settings: 21.6 dB, 27.6 dB, 31.1 dB, 33.6 dB
●
Undervoltage protection (UVP): 8 V
●
Overvoltage protection (OVP): 30 V
Power supply
A single power supply is required to feed the TDA7492 demonstration board via the
connector J2 (see layout components in Figure 2).
Connect positive voltage of 25 V/ 5 A DC power supply to +VCC pin and negative to GND.
Note:
Voltage range 8 V to 26 V = 5 A current capability
1.2
Demonstration board preparation
1.3
1.
Ensure that the power supply is switched OFF.
2.
Connect the regulated power supply adjusted in the device operating range to the
connector J2 (observe the polarity).
Inputs and outputs
1.
Connect the loads across the connectors J3 (LEFT) and J4 (RIGHT), the specified
impedance ranges from 6 Ω to 8 Ω.
2.
Connect the analog audio inputs, either differential or single-ended, to the L-Input and
R-Input RCA plugs (J1).
Table 1.
Audio inputs
Input configuration
Jumper J8 (right)
Junper J9 (left)
Differential
Open
Open
Single-ended
Closed
Closed
Refer to Figure 2: Demonstration board connections on page 4.
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Operation
Figure 2.
AN3385
Demonstration board connections
Dummy
load
GND +VCC
Dummy
load
Gain selection
Single ended input
mode / differential
input mode selection
Analog input signal
Standby and mute
control
AM045276v1
4/15
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AN3385
1.4
Operation
Powering up
Before powering up the demonstration board, ensure that the TDA7492 is in standby and
mute conditions and the gain is set to the desired value (default 21.6 dB) and verify the
dedicated switches and jumpers.
Table 2.
Standby and mute settings
STBY (S1)
Mute (S2)
Status
L
L
STBY
L
H
STBY
H
L
MUTE
H
H
PLAY
Figure 3.
Standby and mute control
AM045277v1
Table 3.
Gain settings
Gain 0 (J5)
Gain 1 (J6)
Gain (dB)
Open (L)
Open (L)
21.6
Open (L)
Closed (H)
27.6
Closed (H)
Open (L)
31.1
Closed (H)
Closed (H)
33.6
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Board schematic and bill of material
2
AN3385
Board schematic and bill of material
Figure 4 shows the TDA7492 demonstration board schematic diagram, for the complete bill
of material refer to Table 4.
Figure 4.
6/15
Schematic diagram
Doc ID 018702 Rev 1
AN3385
Board schematic and bill of material
Table 4.
Bill of material
Reference
Type
Footprint
C21, C27
CCAP
CAP0603
C3, C4, C13, C14
CCAP
C5, C6, C8, C9, C10,
C18, C19, C22, C24,
C25, C28
Description
Qty
Manufacturer
330 pF 50 V NPO ±5%
2
Murata
CAP0603
1 nF 50 V ±10%
4
Murata
CCAP
CAP0603
100 nF 50 V ±10%
11
Murata
C1, C2, C11, C12
CCAP
CAP0603
470 nF 50 V ±10%
4
Murata
C7, C15, C29
CCAP
CAP0603
2.2 µF, 16 V, ±10%
3
Murata
C16, C17
CCAP
CAP0603
1 µF, 16 V, ±10%
2
Murata
C23
ECAP
1
Rubycon
C20, C26
CAP
Mylar
220 nF, pitch = 5 mm
2
Murata
R5, R6, R7
RES
R0603
22 ohm, ±10%, 1/16W
3
Murata
R8
RES
R0603
2.2k ohm, ±10%, 1/16W
1
Murata
R13
RES
R0603
9.1k ohm, ±10%, 1/16W
1
Murata
R2, R4
RES
R0603
33k ohm, ±10%, 1/16W
2
Murata
R3
RES
R0603
39k ohm, ±10%, 1/16W
1
Murata
R1
RES
R0603
100k ohm, ±10%, 1/16W
1
Murata
IC1
IC
TDA7492
TDA7492 (SSO36) slug up
1
ST
L1, L2, L3, L4
Coil
Inductor
33 µH, type: 7075P-330M
4
Kwangsung
J1
Connector
RCA-2P
RCA socket 2P x 2, type: AV2-8.4-12
1
Songcheng
IC2
Regulator
TO92
L4931CZ33, 3V3 regulator
1
ST
PCB
90 x 70 mm
TDA7492-UP PCB
1
ST
D < 12.0 mm 1000 µF, 35 V, ±10% , pitch = 5.0 mm
J2, J3, J4
Terminal
CNN-Terminal 2P, pitch = 5 mm connector terminal
3
Any source
J5, J6, J8, J9
Jumper
2-way jumper 2P, pitch = 2.5 mm jumper
4
Any source
S1, S2
Switch
2
Any source
Slide
3P, pitch = 2.5 mm
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PCB layout
AN3385
3
PCB layout
3.1
Layout views
Figure 5.
Top view of PCB layout
AM045279v1
Figure 6.
Bottom view of PCB layout
AM045280v1
8/15
Doc ID 018702 Rev 1
AN3385
PCB layout
3.2
Design guidelines for PCB schematic and layout
3.2.1
Dumping network
The capacitor is mainly intended for high inductive loads and for common-mode noise
attenuation.
Figure 7.
Dumping network
C28
100nF
C24
100nF
AM045281v1
3.2.2
Main filter
The main filter is an LC Butterworth based filter. The cutoff frequency must be chosen
between the upper limit of the audio band (∼20 kHz) and the carrier frequency (310 kHz).
Figure 8.
Main filter
AM045282v1
Table 5.
Recommended values
RLOAD
8Ω
6Ω
LLOAD
33 µH
22 µH
CLOAD
220 nF
220 nF
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PCB layout
3.2.3
AN3385
Layout recommendations
The following figures illustrate layout recommendations.
Solder the 100 nF bypass capacitors (X7R) as close as possible to the IC VCC pins
(recommended distance to be within 3 mm) in order to avoid spikes generated by the stray
inductance caused by the copper supply lines.
Figure 9.
Capacitors soldered as close as possible to VCC pins
Ground pin and Vcc pin of 100 nF
capacitor should be directly connected
to the related IC pin
AM045283v1
Solder the snubber networks as close as possible to the IC related pin.
A voltage spike dangerous for device operation could occur if the snubber network is far
from the output pins. It is recommended that the distance between the snubber network and
output pins be within 5 mm.
Figure 10. Snubber networks soldered as close as possible to relevant IC pin
AM045284v1
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PCB layout
A "star route" for VCC supply is recommended in order to avoid interferences between
different channels when the audio signals in Left and Right are very different in amplitude.
Figure 11. Electrolytic capacitor to separate VCC paths
Vias to bypass
capacitors
Positive pin of E-cap
TOP COPPER
BOTTOM COPPER
AM045285v1
Figure 12. Symmetrical paths created for output stage (for differential applications)
AM045286v1
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PCB layout
AN3385
Figure 13. RC filter for ROSC pin placed close to IC
AM045287v1
Figure 14. Filter capacitor for SVR, VREF, SVCC, VSS and VDDPW placed close to IC
Filter capacitor for
VREF, SVCC and
VSS
Filter capacitor
for SVR
Filter capacitor
VDDS
Filter capacitor
VDDPW
12/15
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for
AM045288v1
AN3385
PCB layout
Signal ground should be directly connected to the bulk capacitor negative terminal.
Figure 15. Signal ground routing
Signal ground
E-cap negative pin
TOP
BOTTOM
Doc ID 018702 Rev 1
AM045289v1
13/15
Revision history
4
AN3385
Revision history
Table 6.
14/15
Document revision history
Date
Revision
01-Oct-2012
1
Changes
Initial release.
Doc ID 018702 Rev 1
AN3385
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