BR1568, Analog ICs Integrated Solutions Packaging - Brochure

Analog Mixed Signal and Power Management
Packaging
Robust packaging is a key technology component of Analog Products.
Freescale puts solutions together in single packages to accommodate
power, high voltages, communications, control, and protection
features.
Environmentally Preferred Products (EPP) is also a key mandate for
Freescale Analog products.
Packaging
Analog Mixed Signal and Power Management
The Analog and Mixed Signal Products Division of Freescale has a long history of
serving the commercial and automotive marketplace, and vast experience with the
automotive industry’s quality requirements / expectations.
We achieved QS9000 certification status in July 1998, TS16949 certification in 2004,
and we use AEC-Q100 as the basis for our product stress test qualifications (products
introduced prior to July 1998, which may have limited qualification or other data
available). Data may be available on a fee-for-service basis.
2
Analog Mixed Signal and Power Management
Packaging
Freescale Environmentally Preferred Products (EPP)
OVERVIEW:
EPP STRATEGY:
Producing Environmentally Friendly Products
Freescale offers Environmentally Preferred products and packages.
These products are RoHS compliant. Some are Pb-free, use Pb-free
package terminations, or may be halogen free.
Delivering products that are free of hazardous substances is a
Freescale priority. To that end, Freescale has a proactive
Environmentally Preferred Products Program that assures it meets
customer and legislative requirements, as well as Freescale’s own
standards, whichever is the most stringent, to reduce or eliminate the
presence of lead (Pb) in its semiconductors. Historically, lead has been
used in semiconductor packages to ensure an effective electrical
connection is made when the semiconductor is integrated into the end
product.
Freescale works closely with its customers and suppliers to ensure a
smooth transition into compliance with current and pending
requirements of the European Union, China, Japan and the USA
regarding the use of hazardous substances in electronic equipment. In
addition, Freescale closely monitors electronics industry standards for
qualification of replacement technologies. Together, these efforts result
in products that incorporate environmentally preferred materials and
design features.
Freescale Environmental Product activities include RoHS (Restriction
of Hazardous Substances), WEEE (Waste of Electrical and Electronic
Equipment), and ELV (End of Life Vehicle) Directive compliance
initiatives. Freescale restricts many hazardous substances from its
products, but lead (Pb) is the primary focus.
• EPP ball grid array (BGA) products use tin silver copper
or SnAg (tin silver) solder balls.
(SnAgCu)
• Termination finishes on EPP plated products use 100% matte tin
(Sn) with a one hour, 150oC post-plate anneal. Some EPP
products may use nickel palladium gold (NiPdAu) termination
finishes.
• Environmentally Preferred Packaging Strategy:
• RoHS compliant
• MSL (Moisture Sensitivity Level) of 3 or better
• Package Peak Temperature (PPT) per JEDEC J-STD-020C
• Halogen-free mold compound
• Freescale intends to offer BGA products with SnPbAg solderballs for
automotive and other RoHS exempt applications. The SnPbAg
solderball products will use different part numbers from the Pb-free
solderball products.
PB-FREE Termination Suffix:
This brochure uses various part number suffixes to identify products
with Pb-free plating or balls. RoHS compliant products with these Pbfree terminations may contain other sources of Pb (RoHS exempt) in
the packages. Freescale may also sell versions of some products that
contain Pb which is not exempt from RoHS. Freescale will identify
these products with separate part numbers.
RELIABILITY:
THERMAL ADDENDUM:
Freescale subjects its products to rigorous testing to ensure reliable
performance and compatibility with surface mount assembly
processes.
Verify each part number for its particular MSL and PPT.
• All surface mount products intended for high temperature board
attach using Pb-free solders are fully characterized for MSL and
PPT.
• Next, click on the ‘RoHS’ or ‘No’ value under the ‘Compliance Flags
RoHS’ column. This will open another window with the PPT and
MSL.
• Commercial & industrial products are qualified according to the
JEDEC J-STD-020 version in effect at the time of qualification.
REFERENCE INFORMATION:
• Automotive products are qualified according to AEC-Q100.
• Find EPP and RoHS information at www.freescale.com/
pbfree
• Tin plating is qualified according to the JEDEC JESD201
procedure.
• Search at www.freescale.com by entering all or a portion of the part
number (e.g., MC34845 or 34845) in the Part Number Search field.
• Download a copy of the Freescale solder profile application note by
entering ‘AN3298’ in the KEYWORD SEARCH at
www.freescale.com.
Contact your Freescale account representative or send an email
to [email protected] for further EPP assistance.
3
Packaging
Analog Mixed Signal and Power Management
Small Outline Surface Mount Packages
8 SOICN
Suffix D
Pb-free Suffix EF
14 SOICN
Suffix D
Pb-free Suffix EF
16 SOICN
Suffix D
Pb-free Suffix EF
D
D
D
16 SOICW
Suffix DW
Pb-free Suffix EG
20 SOICW
Suffix DW
Pb-free Suffix EG
DW
DW
SMALL OUTLINE SURFACE MOUNT PACKAGE DIMENSIONS
Body Size
Package
D1
Lead Pitch
E1
e
A
A1
H
L
b
c
SOIC
8 SOICN
4.90
3.90
1.27
1.55
0.18
6.00
0.83
0.43
0.22
14 SOICN
8.65
3.90
1.27
1.55
0.18
6.00
0.83
0.43
0.22
16 SOICN
9.90
3.90
1.27
1.55
0.18
6.00
0.83
0.43
0.22
16 SOICW
10.30
7.50
1.27
2.50
0.18
10.30
0.70
0.43
0.28
20 SOICW
12.80
7.50
1.27
2.50
0.18
10.30
0.70
0.43
0.28
24 SOICW
15.40
7.50
1.27
2.50
0.21
10.30
0.70
0.43
0.28
28 SOICW
17.93
7.50
1.27
2.50
0.21
10.30
0.70
0.43
0.28
32 SOICW
11.00
7.50
0.65
2.50
0.21
10.30
0.70
0.30
0.22
54 SOICW
17.90
7.50
0.65
2.50
0.21
10.30
0.70
0.30
0.28
All dimensions are in millimeters and are nominal values.
OVERVIEW:
RELIABILITY:
Freescale provides a large selection of proven and reliable small
outline surface mount (SOIC) packages in both narrow body
(3.90 mm) and wide body (7.50 mm) styles. Lead counts range
from 8 to 54 leads and are formed in a popular “gullwing” shape that
easily adapts to all surface mount technology (SMT) processes.
Freescale subjects their packages to rigorous testing to ensure reliable
performance and compatibility with surface mount assembly
processes.
KEY FEATURES:
• Narrow SOICN (3.90 mm) and Wide SOICW (7.50 mm) Body Sizes
• Pb-free Terminal Finishes
• Gullwing Lead Forms
• 1.27 mm and 0.65 mm Lead Pitch
• Rail or Tape & Reel Packing Available
• JEDEC Compliant Case Outlines
4
• For Moisture Sensitivity levels and Peak Package Temperature,
please refer to the “More Info” entry, in the part number ordering
table, found at: www.freescale.com. Do a search by part number
(e.g. MC34845 or 34845) for the particular Freescale device, to
locate the device’s part number ordering table. Then select the "Part
Data" icon in the Data Sheet/Part Data column.
• All package qualifications performed per the latest version of the
AEC-Q100 testing procedures.
Analog Mixed Signal and Power Management
Packaging
Small Outline Surface Mount Packages
24 SOICW
Suffix DW
Pb-free Suffix EG
DW
28 SOICW
Suffix DW
Pb-free Suffix EG
32 SOICW Fine Pitch
Suffix DWB
Pb-free Suffix EW
54 SOICW Fine Pitch
Suffix DWB
Pb-free Suffix EW
DWB
DW
DWB
TOP VIEW
H
E1
b
Cross Section
D1
A
SOICN, SOICW
GUIDELINES FOR SOLDERING:
Freescale’s broad array of Small Outline IC’s (SOIC) include the
popular “gull wing” lead forms designed to adapt easily to all surface
mount (SMT) processes. With the correct pad footprint geometry, the
packages will self align to the PCB board when subjected to a solder
reflow process.
APPLICATION NOTE
Please refer to application note AN2409 for package information
concerning SOICW fine pitch packages. This includes packages
without and with exposed thermal pads.
e
L
A1
c
See THERMAL ADDENDUM:
Thermal
Resistance
Typical
Values
Test
Condition
RθJA
75°C/W - 175°C/W JESD51-2
RθJL
40°C/W - 80°C/W
JESD51-8
Power Dissipation: Up to 1.5 W
5
Packaging
Analog Mixed Signal and Power Management
Small Outline Surface Mount Packages
16 TSSOP
Suffix DTB/MTB
Pb-free Suffix EJ
24 TSSOP
Suffix DTB
Pb-free Suffix EJ
SMALL OUTLINE SURFACE MOUNT PACKAGE (FINE PITCH - TSSOP)
Body Size
Package
Lead Pitch
D1
E1
e
A
A1
H
L
b
c
16 TSSOP
5.00
4.40
0.65
1.20
0.10
6.40
0.60
0.30
0.22
24 TSSOP
7.80
5.60
0.65
1.20
0.10
7.60
0.60
0.30
0.22
TSSOP
All dimensions are in millimeters and are nominal values.
OVERVIEW:
RELIABILITY:
Freescale provides a large selection of proven and reliable small
outline surface mount (SOIC) packages. The TSSOP (4.4 & 5.6 mm)
style fall between the SOICN (narrow body) and the SOICW (wide
body). The TSSOP range from 16 to 24 pin. The leads are formed in a
popular “gullwing” shape that easily adapts to all surface mount
technology (SMT) processes.
Freescale subjects their packages to rigorous testing to ensure reliable
performance and compatibility with surface mount assembly
processes.
KEY FEATURES:
• Pb-free Terminal Finishes
• 0.65 mm Lead Pitch
• Tray Packing Available
• Rail or Tape & Reel Packaging Available
6
• For Moisture Sensitivity levels and Peak Package Temperature,
please refer to the “More Info” entry, in the part number ordering
table, found at: www.freescale.com. Do a search by part number
(e.g. MC34845 or 34845) for the particular Freescale device, to
locate the device’s part number ordering table. Then select the "Part
Data" icon in the Data Sheet/Part Data column.
• All package qualifications performed per the latest version of the
AEC-Q100 testing procedures.
Analog Mixed Signal and Power Management
Packaging
Small Outline Surface Mount Packages
GUIDELINES FOR SOLDERING:
Freescale’s broad array of Small Outline IC’s (SOIC) include the
popular “gull wing” lead forms designed to adapt easily to all surface
mount (SMT) processes. With the correct pad footprint geometry, the
packages will self align to the PCB board when subjected to a solder
reflow process.
APPLICATION NOTE
See THERMAL ADDENDUM:
Thermal
Resistance
RθJA
Typical
Values
Test
Condition
100°C/W - 190°C/W JESD51-2
Power Dissipation: Up to 1.0 W
Please refer to application note AN2409 for package information
concerning SOICW fine pitch packages. This includes packages
without and with exposed thermal pads.
7
Packaging
Analog Mixed Signal and Power Management
Thermally Enhanced Small Outline Surface Mount Packages
24 SOICW
Suffix DW
Pb-free Suffix EG
28 SOICW
Suffix DW
Pb-free Suffix EG
32 SOICW
Suffix DWB
Pb-free Suffix EW
54 SOICW
Suffix DWB
Pb-free Suffix EW
DW
DWB
DWB
DW
THERMALLY ENHANCED SMALL OUTLINE SURFACE MOUNT PACKAGE DIMENSIONS
Body Size
Package
D1
Lead Pitch
E1
e
A
A1
F
G
H
L
b
c
SOICW
24 SOICW
15.40
7.50
1.27
2.50
0.21
N/A
N/A
10.30
0.67
0.43
0.25
28 SOICW
17.93
7.50
1.27
2.50
0.21
N/A
N/A
10.30
0.66
0.43
0.25
32 SOICW
11.00
7.50
0.65
2.50
0.21
N/A
N/A
10.30
0.70
0.30
0.25
54 SOICW
17.90
7.50
0.65
2.50
0.21
N/A
N/A
10.30
0.70
0.30
0.25
32 SOICW-EP
11.00
7.50
0.65
2.34
0.21
3.40
3.40
10.30
0.70
0.30
0.25
32 SOICW-EP
11.00
7.50
0.65
2.34
0.21
4.70
4.70
10.30
0.70
0.30
0.25
32 SOICW-EP
11.00
7.50
0.65
2.34
0.21
4.60
5.70
10.30
0.70
0.30
0.25
54 SOICW-EP
17.90
7.50
0.65
2.50
0.05
4.55
4.55
10.30
0.70
0.30
0.25
54 SOICW-EP
17.90
7.50
0.65
2.50
0.05
4.55
6.25
10.30
0.70
0.30
0.25
54 SOICW-EP
17.90
7.50
0.65
2.50
0.05
5.05
10.30
10.30
0.70
0.30
0.25
All dimensions are in millimeters and are nominal values.
Note: -EP denotes Exposed Thermal Pad
OVERVIEW:
RELIABILITY:
Thermally enhanced SOIC packages are also available to increase the
power dissipation capability up to 2X for a given IC application, thereby
expanding the margin of operating parameters possible.
Enhancements are made such as thermal leads tied to die pads or
exposed die pads that can be directly soldered to a multi-layer PCB
board heat sink or thermal vias.
Freescale subjects their packages to rigorous testing to ensure reliable
performance and compatibility with surface mount assembly
processes.
KEY FEATURES:
• 7.50 mm wide SOIC Body Sizes
• Thermal Leads and/or Exposed Pad for Increased Performance
• Pb-free Terminal Finishes
• Gullwing Lead Forms
• 1.27 mm and 0.65 mm Lead Pitch
• Rail or Tape & Reel Packing Available
8
• For Moisture Sensitivity levels and Peak Package Temperature,
please refer to the “More Info” entry, in the part number ordering
table, found at: www.freescale.com. Do a search by part number
(e.g. MC34845 or 34845) for the particular Freescale device, to
locate the device’s part number ordering table. Then select the "Part
Data" icon in the Data Sheet/Part Data column.
• All package qualifications performed per the latest version of the
AEC-Q100 testing procedures.
Analog Mixed Signal and Power Management
Packaging
Thermally Enhanced Small Outline Surface Mount Packages
32 SOICW-EP
Exposed Pad
Suffix DWB
Pb-free Suffix EK
54 SOICW-EP
Exposed Pad
Suffix DWB
Pb-free Suffix EK
TOP VIEW
BOTTOM VIEW
G
Cross Section
H
E1
SOICW-EP
(Exposed Pad)
F
D1
c
A
The exposed pad size
depends on the lead frame
and product chosen
e
b
A1
L
G
Cross Section
H
F
E1
Inverted SOICW-EP
(Exposed Pad)
D1
GUIDELINES FOR SOLDERING:
Freescale’s broad array of Small Outline IC’s (SOIC) include the
popular "gull wing" lead forms designed to adapt easily to all surface
mount (SMT) processes. With the correct pad footprint geometry, the
packages will self align to the PCB board when subjected to a solder
reflow process. Thermal leads or an exposed pad should be soldered
directly to a multi-layered PCB with thermal via holes to realize the
greatest potential of the enhanced SOICW packages. Refer to
AN2409, and device specific thermal data.
APPLICATION NOTE
Please refer to application note AN2409 for package information
concerning SOICW fine pitch packages. This includes packages
without and with exposed thermal pads.
See THERMAL ADDENDUM:
Thermal
Resistance
Typical
Values
Test
Condition
RθJA
60°C/W - 100°C/W JESD51-2
RθJL
10°C/W - 40°C/W
JESD51-8
RθJC*
1°C/W - 2°C/W
JESD51-8
* SOICW-Exposed Pad
Power Dissipation: Up to 4.0 W
9
Packaging
Analog Mixed Signal and Power Management
Heatsink Small Outline Surface Mount Packages
20 HSOP
Suffix DH
Pb-free Suffix VW
30 HSOP
Suffix DH
Pb-free Suffix VW
36 HSOP
Suffix DH
Pb-free Suffix VW
44 HSOP
Suffix DH
Pb-free Suffix VW
HEATSINK SMALL OUTLINE SURFACE MOUNT PACKAGE DIMENSIONS
Body Size
Package
D
Lead Pitch
E1
e
A
A3
D1
E
E3
L
b
c
HSOP
20 HSOP
15.90
11.00
1.27
3.00
0.20
12.20
14.20
6.80
0.97
0.46
0.30
30 HSOP
15.90
11.00
0.80
3.00
0.20
12.20
14.20
6.90
0.97
0.41
0.30
36 HSOP
15.90
11.00
0.65
3.15
0.10
11.00
14.20
6.80
0.95
0.32
0.30
44 HSOP
15.90
11.00
0.65
3.20
0.08
12.20
14.20
6.90
0.97
0.29
0.30
All dimensions are in millimeters and are nominal values.
OVERVIEW:
RELIABILITY:
Freescale offers a family of Heatsink Small Outline Packages (HSOP)
that have significantly improved thermal performance characteristics
as compared to traditional small outline packages (SOIC). The
HSOP’s have an internally integrated copper heat slug that provides a
direct path for heat conduction away from an IC and into a solder
attached PCB board (heatsink or thermal vias).
Freescale subjects their packages to rigorous testing to ensure reliable
performance and compatibility with surface mount assembly
processes.
KEY FEATURES:
• Mechanically Attached Thick Copper Heat Slug
• Pb-free Terminal Finish
• Lead Pitch Ranging from 0.65 mm to 1.27 mm
• Gullwing Lead Forms
• Rail or Tape & Reel Packing Available
10
• For Moisture Sensitivity levels and Peak Package Temperature,
please refer to the “More Info” entry, in the part number ordering
table, found at: www.freescale.com. Do a search by part number
(e.g. MC34845 or 34845) for the particular Freescale device, to
locate the device’s part number ordering table. Then select the "Part
Data" icon in the Data Sheet/Part Data column.
• All package qualifications performed per the latest version of the
AEC-Q100 testing procedures.
Analog Mixed Signal and Power Management
Packaging
Heatsink Small Outline Surface Mount Package
BOTTOM VIEW
E3
TOP VIEW
b
Cross Section
D1
D
e
E1
HSOP
E
A
c
A3
L
GUIDELINES FOR SOLDERING:
The Freescale portfolio of Heatsink Small Outline Packages include
the popular "gull wing" lead forms designed to adapt easily to all
surface mount (SMT) processes. With the correct pad footprint
geometry, the packages will self align to the PCB board when
subjected to a solder reflow process. The copper slug should be
soldered directly to a multi-layered PCB with thermal via holes to
realize the greatest potential of the HSOP power packages.
APPLICATION NOTE
Please refer to application note AN2388 for package information
concerning HSOP packages.
See THERMAL ADDENDUM:
Thermal
Resistance
Typical
Values
Test
Condition
RθJA
30°C/W - 40°C/W
JESD51-2
RθJL
12°C/W - 15°C/W
JESD51-8
RθJC
0.5°C/W - 1°C/W
JESD51-5
Power Dissipation: 2.0 to 4.0 W
11
Packaging
Analog Mixed Signal and Power Management
Quad Flat Pack Surface Mount Packages (LQFP)
52 LQFP
Suffix FTB
Pb-free Suffix AE
80 LQFP
Suffix FTB
Pb-free Suffix AF
FTA
FTB
64 LQFP
Suffix FTA
Pb-free Suffix AE
FTB
48 LQFP
Suffix FTA
Pb-free Suffix AE
FTA
44 LQFP
Suffix FTB
Pb-free Suffix AC
FTB
32 LQFP
Suffix FTB
Pb-free Suffix AC
QUAD FLAT PACK SURFACE MOUNT PACKAGE DIMENSIONS
Body Size
Package
D1
Lead Pitch
E1
e
A1
A2
D
E
L
b
c
LQFP
32 LQFP
7.00
7.00
0.80
0.10
1.40
9.00
9.00
0.60
0.38
0.15
44 LQFP
10.00
10.00
0.80
0.10
1.40
12.00
12.00
0.60
0.38
0.15
48 LQFP
7.00
7.00
0.50
0.10
1.40
9.00
9.00
0.60
0.22
0.15
52 LQFP
10.00
10.00
0.65
0.10
1.40
12.00
12.00
0.60
0.30
0.15
64 LQFP
10.00
10.00
0.50
0.10
1.40
12.00
12.00
0.60
0.22
0.15
80 LQFP
14.00
14.00
0.65
0.10
1.40
16.00
16.00
0.60
0.30
0.15
100 LQFP
14.00
14.00
0.50
0.10
1.40
16.00
16.00
0.60
0.22
0.15
144 LQFP
20.00
20.00
0.50
0.10
1.40
22.00
22.00
0.60
0.22
0.15
All dimensions are in millimeters and are nominal values.
OVERVIEW:
RELIABILITY:
Low-profile quad flat packages (LQFPs) are classified by the overall
thickness per JEDEC definition. For Analog Products, Freescale offers
both package styles in lead counts ranging from 32 to 144 to cover a
large range of applications.
Freescale subjects their packages to rigorous testing to ensure reliable
performance and compatibility with surface mount assembly
processes.
KEY FEATURES:
• Body Sizes Ranging from 7 mm x 7 mm to 20 mm x 20 mm
• Pb-free Terminal Finishes
• Gullwing Lead Forms
• Lead Pitch Ranging from 0.50 mm to 0.80 mm
• Tray Packing Available
• JEDEC Compliant Case Outlines
• Low Profile “L” (1.4 mm) Body Thickness Options
• Exposed Pad “EP” available for Increased Thermal Performance
12
• For Moisture Sensitivity levels and Peak Package Temperature,
please refer to the “More Info” entry, in the part number ordering
table, found at: www.freescale.com. Do a search by part number
(e.g. MC34845 or 34845) for the particular Freescale device, to
locate the device’s part number ordering table. Then select the "Part
Data" icon in the Data Sheet/Part Data column.
• All package qualifications performed per the latest version of the
AEC-Q100 testing procedures.
Analog Mixed Signal and Power Management
Packaging
Quad Flat Pack Surface Mount Packages (LQFP)
144 LQFP
Suffix FTA
Pb-free Suffix AG
FTA
FTA
100 LQFP
Suffix FTA
Pb-free Suffix AF
GUIDELINES FOR SOLDERING:
Freescale’s broad selection of Quad Flat Pack packages include the
popular “gull wing” lead forms designed to adapt easily to all surface
mount (SMT) processes. With the correct pad footprint geometry, the
packages will self align to the PCB board when subjected to a solder
reflow process.
See THERMAL ADDENDUM:
Thermal
Resistance
Typical
Values
Test
Condition
APPLICATION NOTE
RθJA
30°C/W - 80°C/W
JESD51-2
Please refer to application note AN4388 for package information
concerning QFP packages.
RθJL
12°C/W - 55°C/W
JESD51-8
RθJC
1°C/W - 2°C/W
JESD51-5
Power Dissipation: 2.0 to 5.0 W
13
Packaging
Analog Mixed Signal and Power Management
Thermally Enhanced Quad Flat Pack Surface Mount Packages
64 LQFP-EP
Exposed Pad
Suffix FTA
Pb-free Suffix AM
128 LQFP-EP
Exposed Pad
Suffix FTA
Pb-free Suffix AK
80 TQFP-EP
Exposed Pad
Suffix FTA
Pb-free Suffix AM
100 TQFP-EP
Exposed Pad
Suffix FTA
Pb-free Suffix AK
FTB
48 LQFP-EP
Exposed Pad
Suffix FTA
Pb-free Suffix AM
THERMALLY ENHANCED QUAD FLAT PACK SURFACE MOUNT PACKAGE DIMENSIONS
Body Size
Package
D1
E1
Lead Pitch
e
A1
A2
D
E
F
G
L
b
c
LQFP
48 LQFP-EP
7.0
7.0
0.50
0.10
1.40
9.00
9.00
4.50
4.50
0.60
0.20
0.14
64 LQFP-EP
10.00
10.00
0.50
0.10
1.40
12.00
12.00
6.50
6.50
0.60
0.22
0.15
128 LQFP-EP
14.00
20.00
0.50
0.10
1.40
22.00
16.00
9.20
9.20
0.60
0.22
0.15
TQFP
80 TQFP-EP
12.00
12.00
0.50
0.10
1.00
14.00
14.00
5.60
5.60
0.60
0.22
0.15
100 TQFP-EP
14.00
14.00
0.50
0.10
1.00
16.00
16.00
9.00
9.00
0.60
0.22
0.15
128 TQFP-EP
14.00
14.00
0.40
0.10
1.00
16.00
16.00
8.85
8.85
0.60
0.18
0.15
All dimensions are in millimeters and are nominal values.
Note: -EP denotes Exposed Thermal Pad
OVERVIEW:
Thin quad flat packages (TQFPs) and low-profile quad flat packages
(LQFPs) are classified by the overall thickness per JEDEC definition.
For Analog Products, Freescale offers both package styles in lead
counts ranging from 48 to 128 to cover a large range of applications.
Exposed pad (LQFP-EP and TQFP-EP) packages are available for
increased thermal performance requirements. The exposed pad or
copper heat slug should be soldered directly to a multi-layered PCB
board to realize the greatest performance.
KEY FEATURES:
• Body Sizes Ranging from 7 mm x 7 mm to 14 mm x 14 mm
• Pb-free Terminal Finishes
• Gullwing Lead Forms
• Lead Pitch Ranging from 0.40 mm to 0.65 mm
• Tray Packing Available
• JEDEC Compliant Case Outlines
14
• Low Profile “L” (1.4 mm) and Thin “T” (1.0 mm) Body Thickness
Options
• Exposed Pad “EP” available for Increased Thermal Performance
RELIABILITY:
Freescale subjects their packages to rigorous testing to ensure reliable
performance and compatibility with surface mount assembly
processes.
• For Moisture Sensitivity levels and Peak Package Temperature,
please refer to the “More Info” entry, in the part number ordering
table, found at: www.freescale.com. Do a search by part number
(e.g. MC34845 or 34845) for the particular Freescale device, to
locate the device’s part number ordering table. Then select the "Part
Data" icon in the Data Sheet/Part Data column.
• All package qualifications performed per the latest version of the
AEC-Q100 testing procedures.
Analog Mixed Signal and Power Management
Packaging
Thermally Enhanced Quad Flat Pack Surface Mount Packages
128 TQFP-EP
Exposed Pad
Suffix FTA
Pb-free Suffix AK
TOP VIEW
BOTTOM VIEW
G
E
E1
F
L
D1
c
EXPOSED PAD
D
(Exposed Pad)
A2
e
GUIDELINES FOR SOLDERING:
Freescale’s broad selection of Quad Flat Pack packages include the
popular "gull wing" lead forms designed to adapt easily to all surface
mount (SMT) processes. With the correct pad footprint geometry, the
packages will self align to the PCB board when subjected to a solder
reflow process.
b
A1
See THERMAL ADDENDUM:
Thermal
Resistance
Typical
Values
Test
Condition
APPLICATION NOTE
RθJA
30°C/W - 80°C/W
JESD51-2
Please refer to application note AN4388 for package information
concerning QFP packages.
RθJL
12°C/W - 55°C/W
JESD51-8
RθJC
1°C/W - 2°C/W
JESD51-5
Power Dissipation: 2.0 to 5.0 W
15
Packaging
Analog Mixed Signal and Power Management
Dual Flat No-Lead Surface Mount Packages
6 UDFN-EP
Suffix FC
Pb-free Suffix EP
8 UDFN
Suffix FC
Pb-free Suffix EP
10 UDFN-EP
Suffix FC
Pb-free Suffix EP
Bottom View
Bottom View
Bottom View
6 DFN-EP
Suffix FC
Pb-free Suffix EP
10 DFN-EP
Suffix FC
Pb-free Suffix EP
Bottom View
Bottom View
DUAL FLAT NO-LEAD SURFACE MOUNT PACKAGE DIMENSIONS - UDFN
Body Size
Package
Lead Pitch
D1
E1
e
A1
A2
F
G
L
b
UDFN
6 UDFN-EP
2.00
2.00
0.65
0.02
0.60
0.95
1.40
0.25
0.25
8 UDFN -EP
2.00
3.00
0.50
0.02
0.55
0.95
1.35
0.55
0.25
10 UDFN-EP
3.00
3.00
0.50
0.02
0.55
1.60
2.20
0.40
0.24
6 DFN-EP
3.00
3.00
0.95
0.02
0.80
1.60
2.40
0.40
0.37
10 DFN-EP
3.00
2.00
0.50
0.03
0.90
0.50
0.41
0.40
0.24
DFN
All dimensions are in millimeters and are nominal values.
Note: -EP denotes Exposed Thermal Pad
OVERVIEW:
A unique MAP (mold array package) packaging process developed by
Freescale is used to create a lead-less surface mount package.
Freescale’s dual and quad flat no-lead (DFN, QFN) packages provide
a cost-effective answer to the demand for reliable and high
performance packaging, including some versions with enhanced
thermal management characteristics.
KEY FEATURES:
• Pb-free Terminal Finishes
• 0.40, 0.50, 0.65, 0.80, and 0.95 mm Lead Pitch
• Tray Packing Available
• JEDEC Compliant Case Outlines
• UF-QFN (ultra-thin, fine pitch QFN) package 0.50 to 0.65 mm body
thickness
RELIABILITY:
Freescale subjects their packages to rigorous testing to ensure reliable
performance and compatibility with surface mount assembly
processes.
• For Moisture Sensitivity levels and Peak Package Temperature,
please refer to the “More Info” entry, in the part number ordering
table, found at: www.freescale.com. Do a search by part number
(e.g. MC34845 or 34845) for the particular Freescale device, to
locate the device’s part number ordering table. Then select the "Part
Data" icon in the Data Sheet/Part Data column.
• Exposed Pad (some)
• All package qualifications performed per the latest version of the
AEC-Q100 testing procedures.
• DFN (dual flat no-lead) package 0.50 to 1.00 mm body thickness
See PB-FREE Termination Suffix:
• UDFN (ultra-thin DFN) package 0.50 to 0.65 mm body thickness
16
Analog Mixed Signal and Power Management
Packaging
Quad Flat No-Lead Surface Mount Packages
16 QFN-EP
Suffix FC
Pb-free Suffix EP
16 QFN-EP
Suffix FC
Pb-free Suffix EP
20 UF-QFN-EP
Suffix FC
Pb-free Suffix EP
Bottom View
Bottom View
Bottom View
20 UF-QFN-EP
Suffix FC
Pb-free Suffix EP
20 UF-QFN-EP
Suffix FC
Pb-free Suffix EP
Bottom View
20 UF-QFN-EP
Suffix FC
Pb-free Suffix EP
Bottom View
Bottom View
QUAD FLAT NO-LEAD SURFACE MOUNT PACKAGE DIMENSIONS - QFN
Body Size
Package
D1
Lead Pitch
E1
e
A1
A2
F
G
L
b
QFN
16 QFN-EP
3.00
3.00
0.50
0.03
0.90
1.60
1.60
0.40
0.24
16 QFN-EP
5.00
5.00
0.80
0.03
0.90
3.60
3.60
0.55
0.30
20 UF-QFN-EP
3.00
3.00
0.40
0.03
0.56
1.68
1.68
0.40
0.20
20 UF-QFN-EP
3.00
4.00
0.50
0.03
0.58
2.63
1.63
0.40
0.24
20 UF-QFN-EP
4.00
3.00
0.50
0.03
0.55
1.65
2.65
0.40
0.24
20 UF-QFN-EP
4.00
4.00
0.50
0.03
0.58
2.80
2.80
0.40
0.24
24 QFN-EP
4.00
4.00
0.50
0.03
0.90
2.60
2.60
0.40
0.24
24 UF-QFN-EP
4.00
4.00
0.50
0.03
0.58
2.80
2.80
0.40
0.24
26 QFN-EP
5.00
5.00
0.50
0.03
0.90
3.65
3.65
0.40
0.24
32 QFN -EP
5.00
5.00
0.50
0.03
0.90
3.10
3.10
0.40
0.24
32 QFN -EP
5.00
5.00
0.50
0.03
0.90
3.65
3.65
0.40
0.24
32 QFN-EP
7.00
7.00
0.65
0.03
0.90
4.70
4.70
0.63
0.30
32 QFN-EP
5.00
5.00
0.50
0.03
0.90
3.50
3.50
0.50
0.24
44 QFN-EP
9.00
9.00
0.65
0.03
0.90
6.70
6.70
0.63
0.30
48 QFN-EP
7.00
7.00
0.50
0.03
1.00
5.10
5.10
0.40
0.24
56 QFN-EP
7.00
7.00
0.40
0.03
0.90
5.10
5.10
0.40
0.20
56 QFN
8.00
8.00
0.50
0.03
0.90
n/a
n/a
0.40
0.24
64 QFN
9.00
9.00
0.50
0.30
0.75
n/a
n/a
0.63
0.24
All dimensions are in millimeters and are nominal values.
Note: -EP denotes Exposed Thermal Pad
17
Packaging
Analog Mixed Signal and Power Management
Quad Flat No-Lead Surface Mount Packages (cont.)
24 QFN-EP
Suffix FC
Pb-free Suffix EP
24 UF-QFN-EP
Suffix FC
Pb-free Suffix EP
Bottom View
Bottom View
26 QFN-EP
Suffix FC
Pb-free Suffix EP
32 QFN-EP
Suffix FC
Pb-free Suffix EP
Bottom View
Bottom View
32 QFN-EP
Suffix FC
Pb-free Suffix EP
Bottom View
TOP VIEW
e
TOP VIEW
D1
DFN
(Dual)
L
F
Bottom View
BOTTOM VIEW
G
b
Exposed
Metal Pad
32 QFN-EP
Suffix FC
Pb-free Suffix EP
QFN
(Quad)
E1
F
E1
G
D1
BOTTOM VIEW
Exposed
Metal Pad
L
A1
A2
Cross Section
SIDE VIEW
A2
b
DFN, QFN
e
DETAIL G
See THERMAL ADDENDUM:
Thermal
Resistance
Typical
Values
Test
Condition
RθJA
35°C/W - 80°C/W
JESD51-2
RθJL
12°C/W - 55°C/W
JESD51-8
RθJC
1°C/W - 2°C/W
JESD51-5
Power Dissipation: 1.5 to 5.0 W
18
A1
Analog Mixed Signal and Power Management
Packaging
Quad Flat No-Lead Surface Mount Packages (cont.)
44 QFN-EP
Suffix FC
Pb-free Suffix EPP
48 QFN-EP
Suffix FC
Pb-free Suffix EP
56 QFN-EP
Suffix FC
Pb-free Suffix EP
56 QFN
Suffix FC
Pb-free Suffix EP
Bottom View
Bottom View
Bottom View
Bottom View
64 QFN
Suffix FC
Pb-free Suffix EP
Bottom View
GUIDELINES FOR SOLDERING:
Freescale’s selection of Dual and Quad Flat No-Lead Packages
provide space efficient solutions for surface mount (SMT) processes.
With the correct pad footprint geometry, the packages will self align to
the PCB board when subjected to a solder reflow process. The
exposed pad or copper heat slug should be soldered directly to a
multi-layered PCB board to realize the greatest performance.
APPLICATION NOTE
Please refer to application note AN1902 for package information
concerning QFN packages.
19
Packaging
Analog Mixed Signal and Power Management
Power Quad Flat No-Lead Surface Mount Packages
16 PQFN
5 mm x 5 mm
Pb-free Suffix PNB
32 PQFN
8 mm x 8 mm
Pb-free Suffix PNB
36 PQFN
9 mm x 9 mm
Pb-free Suffix PNB
Bottom View
Bottom View
Bottom View
POWER QUAD FLAT NO-LEAD SURFACE MOUNT PACKAGE - (PQFN)
Body Size
Package
A
Lead Pitch
B
e
A1
F
G
L
b
PQFN
16 PQFN
5
5
0.80
2.10
2.0
2.0
1.05
0.55
32 PQFN
8
8
0.80
2.10
5.0
5.0
1.05
0.54
36 PQFN
9
9
0.80
2.10
6.0
6.0
1.05
0.54
All dimensions are in millimeters and are nominal values.
OVERVIEW:
RELIABILITY:
A unique MAP packaging process developed by Freescale is used to
create a lead-less surface mount package with enhanced thermal
capability. Freescale’s Power Quad Flat No-Lead (PQFN) packages
provide a cost-effective answer to the demand for reliable and high
performance packaging with enhanced thermal management
characteristics in a small form factor.
Freescale subjects their packages to rigorous testing to ensure reliable
performance and compatibility with surface mount assembly
processes.
KEY FEATURES:
• Pb-free Terminal Finishes
• 0.8 mm Lead Pitch
• Tray Packing Available
• Exposed Pad(s)
• Quick time to market for new devices
20
• For Moisture Sensitivity levels and Peak Package Temperature,
please refer to the “More Info” entry, in the part number ordering
table, found at: www.freescale.com. Do a search by part number
(e.g. MC34845 or 34845) for the particular Freescale device, to
locate the device’s part number ordering table. Then select the "Part
Data" icon in the Data Sheet/Part Data column.
• All package qualifications performed per the latest version of the
AEC-Q100 testing procedures.
Analog Mixed Signal and Power Management
Packaging
Power Quad Flat No-Lead Surface Mount Packages
F
A
G
B
Exposed
Metal Pad
b
L
A1
e
GUIDELINES FOR SOLDERING:
Freescale’s selection of Quad Flat No-Lead Packages provide space
efficient solutions for surface mount (SMT) processes. With the correct
pad footprint geometry, the packages will self align to the PCB board
when subjected to a solder reflow process. The exposed pad or
copper heat slug should be soldered directly to a multi-layered PCB
board to realize the greatest performance.
APPLICATION NOTE
See THERMAL ADDENDUM:
Thermal
Resistance
Typical
Values
Test
Condition
RθJA
Refer to Product Data Sheet
RθJA
Refer to Product Data Sheet
RθJA
Refer to Product Data Sheet
Please refer to application note AN2467 for package information
concerning PQFN packages.
21
Packaging
Analog Mixed Signal and Power Management
Power Quad Flat No-Lead Surface Mount Packages
23 PQFN
12 mm x 12 mm
Pb-free Suffix PNA
16 PQFN
12 mm x 12 mm
Pb-free Suffix PNA
24 PQFN
12 mm x 12 mm
Pb-free Suffix PNA
36 PQFN
12 mm x 12 mm
Pb-free Suffix PNB
Bottom View
Bottom View
Bottom View
Bottom View
POWER QUAD FLAT NO-LEAD SURFACE MOUNT PACKAGE - (PQFN)
Body Size
Package
A
Lead Pitch
B
e
A1
PQFN
23 PQFN
12
12
0.90
2.10
16/24 PQFN
12
12
0.90
2.10
36 PQFN
12
12
0.80
2.10
All dimensions are in millimeters and are nominal values.
Notes: Heatsink pads location and size may vary. Refer to the Device Data Sheet for actual physical dimensions.
Freescale is investigating other pin pitches, including 0.65 mm (suffix PNC).
OVERVIEW:
RELIABILITY:
A unique MAP packaging process developed by Freescale is used to
create a lead-less surface mount package with enhanced thermal
capability. Freescale’s Power Quad Flat No-Lead (PQFN) packages
provide a cost-effective answer to the demand for reliable and high
performance packaging with enhanced thermal management
characteristics in a small form factor.
Freescale subjects their packages to rigorous testing to ensure reliable
performance and compatibility with surface mount assembly
processes.
KEY FEATURES:
• Pb-free Terminal Finishes
• 0.8, and 0.9 mm Lead Pitch
• Tray Packing Available
• Exposed Pad(s)
• Quick time to market for new devices
22
• For Moisture Sensitivity levels and Peak Package Temperature,
please refer to the “More Info” entry, in the part number ordering
table, found at: www.freescale.com. Do a search by part number
(e.g. MC34845 or 34845) for the particular Freescale device, to
locate the device’s part number ordering table. Then select the "Part
Data" icon in the Data Sheet/Part Data column.
• All package qualifications performed per the latest version of the
AEC-Q100 testing procedures.
Analog Mixed Signal and Power Management
Packaging
Power Quad Flat No-Lead Surface Mount Packages
A
Heatsink/Pin Layouts
Vary by Device
for Each Package or Product
A1
B
e
e
(Lead pitch “e” 0.80mm)
(Lead pitch “e” 0.90mm)
GUIDELINES FOR SOLDERING:
Freescale’s selection of Quad Flat No-Lead Packages provide space
efficient solutions for surface mount (SMT) processes. With the correct
pad footprint geometry, the packages will self align to the PCB board
when subjected to a solder reflow process. The exposed pad or
copper heat slug should be soldered directly to a multi-layered PCB
board to realize the greatest performance. Please refer to application
note AN2467 for soldering details.
APPLICATION NOTE
See THERMAL ADDENDUM:
Thermal
Resistance
Typical
Values
Test
Condition
RθJA
Refer to Product Data Sheet
RθJA
Refer to Product Data Sheet
RθJA
Refer to Product Data Sheet
Please refer to application note AN2467 for package information
concerning PQFN packages.
23
Soldering Footprint:
The Analog and Mixed Signal Products Division of Freescale has a long history of serving the
commercial and automotive marketplace, and vast experience with the automotive industry’s
quality requirements / expectations.
Freescale can provide suggested package footprints for the various package types suitable for
the layout of printed circuit assemblies.The information can be requested at www.freescale.com/
support by choosing the “Create Service Request” item. First, gather information to place in the
service request. On the www.Freescale.com home page, enter the product number into the
keyword search box (top right), such as MC33988. Next choose the MC33988 product summary
page (.has a html suffix) line item, from the results list. On the product summary page, click on
the Buy/Parameter tab. This will provide access to the package drawing information. On the Buy
/Parameter page, click on the item in the Package Description and Diagram column (blue text).
This will link to a product infromation web page. Now click on the item in the value column for the
Package Description and Mechanical Drawing line item. Note the Document number on the
package drawing (document number - 98A......) that appears. This information along with the
product number should be placed in the Request Details Subject and Description blocks for the
Customer Service Request. Now go to www.freescale.com/support and choose the “Create
Service Request” item, then choose step 1/category - Hardware Product Support and step 2/
topic - Generic Design Questions. Click the Next button. In the Device type selection area, select
the product number from the product tree; e.g. Analog & Power Management/Power Actuation/
High side switches/MC33988. Click the Next button. Also, include the information that you are
requesting relative to the package solder footprint. Be sure to include the package drawing
information gather initially above. Click the Submit button to have your service request
submitted.
Learn More: For current information about Freescale products and documentation,
please visit www.freescale.com.
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners.
© Freescale Semiconductor, Inc., 2007-2012. All rights reserved.
Document Number: BR1568 REV. 6.0
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