Type BSC039N06NS OptiMOSTM Power-Transistor Features Product Summary • Optimized for high performance SMPS, e.g. sync. rec. • 100% avalanche tested • Superior thermal resistance • N-channel 1) • Qualified according to JEDEC for target applications VDS 60 V RDS(on),max 3.9 mW ID 100 A QOSS 32 nC QG(0V..10V) 27 nC • Pb-free lead plating; RoHS compliant • Halogen-free according to IEC61249-2-21 PG-TDSON-8 Type Package Marking BSC039N06NS PG-TDSON-8 039N06NS Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Continuous drain current ID Value V GS=10 V, T C=25 °C 100 V GS=10 V, T C=100 °C 65 V GS=10 V, T C=25 °C, R thJA =50K/W 2) 19 Unit A Pulsed drain current3) I D,pulse T C=25 °C 400 Avalanche energy, single pulse4) E AS I D=50 A, R GS=25 W 50 mJ Gate source voltage V GS ±20 V 1) J-STD20 and JESD22 Device on 40 x 40 x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 2) 3) See figure 3 for more detailed information 4) See figure 13 for more detailed information Rev.2.1 page 1 2012-12-07 BSC039N06NS Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Power dissipation P tot Value T C=25 °C 69 T A=25 °C, T j, T stg -55 ... 150 IEC climatic category; DIN IEC 68-1 Parameter W 2.5 R thJA=50 K/W 2) Operating and storage temperature Unit °C 55/150/56 Values Symbol Conditions Unit min. typ. max. - - 1.8 top - - 20 6 cm2 cooling area2) - - 50 Thermal characteristics Thermal resistance, junction - case Device on PCB R thJC R thJA K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA 60 - - Gate threshold voltage V GS(th) V DS=V GS, I D=36 µA 2.1 2.8 3.3 Zero gate voltage drain current I DSS V DS=60 V, V GS=0 V, T j=25 °C - 0.5 1 V DS=60 V, V GS=0 V, T j=125 °C - 10 100 V µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 10 100 nA Drain-source on-state resistance R DS(on) V GS=10 V, I D=50 A - 3.3 3.9 mW V GS=6 V, I D=12.5 A - 4.8 5.9 - 1.6 2.4 W 42 85 - S Gate resistance RG Transconductance g fs Rev.2.1 |V DS|>2|I D|R DS(on)max, I D=50 A page 2 2012-12-07 BSC039N06NS Parameter Values Symbol Conditions Unit min. typ. max. - 2000 2500 - 490 613 Dynamic characteristics Input capacitance C iss V GS=0 V, V DS=30 V, f =1 MHz pF Output capacitance C oss Reverse transfer capacitance Crss - 22 44 Turn-on delay time t d(on) - 12 - Rise time tr - 12 - Turn-off delay time t d(off) - 20 - Fall time tf - 7 - Gate to source charge Q gs - 9 - Gate charge at threshold Q g(th) - 5 - Gate to drain charge Q gd - 5 7 Switching charge Q sw - 9 - Gate charge total Qg - 27 32 Gate plateau voltage V plateau - 4.8 - V Gate charge total, sync. FET Q g(sync) V DS=0.1 V, V GS=0 to 10 V - 24 - nC Output charge Q oss V DD=30 V, V GS=0 V - 32 - - - 100 - - 400 - 0.9 1.2 V - 32 51 ns - 28 - nC V DD=30 V, V GS=10 V, I D=50 A, R G,ext=3 W ns Gate Charge Characteristics5) V DD=30 V, I D=50 A, V GS=0 to 10 V nC Reverse Diode Diode continuous forward current IS Diode pulse current I S,pulse Diode forward voltage V SD Reverse recovery time t rr Reverse recovery charge Q rr 5) A T C=25 °C V GS=0 V, I F=50 A, T j=25 °C V R=30 V, I F=50 A, di F/dt =100 A/µs See figure 16 for gate charge parameter definition Rev.2.1 page 3 2012-12-07 BSC039N06NS 1 Power dissipation 2 Drain current P tot=f(T C) I D=f(T C); V GS≥10 V 80 120 100 60 ID [A] Ptot [W] 80 40 60 40 20 20 0 0 0 25 50 75 100 125 150 175 0 25 50 TC [°C] 75 100 125 150 175 TC [°C] 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T C=25 °C; D =0 Z thJC=f(t p) parameter: t p parameter: D =t p/T 10 103 limited by on-state resistance 1 µs 10 µs 102 1 0.5 101 ZthJC [K/W] ID [A] 100 µs 1 ms 10 ms 0.2 0.1 DC 0.05 0.1 0.02 100 0.01 single pulse 10-1 10-1 100 101 102 VDS [V] Rev.2.1 0.01 0.000001 0.00001 0.0001 0.001 0.01 0.1 tp [s] page 4 2012-12-07 BSC039N06NS 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 °C R DS(on)=f(I D); T j=25 °C parameter: V GS parameter: V GS 400 8 5V 360 5.5 V 6V 7 7V 10 V 320 6 7V 280 RDS(on) [mW] ID [A] 240 200 6V 160 120 5.5 V 5 4 10 V 3 2 80 5V 1 40 0 0 0.0 0.5 1.0 1.5 2.0 0 50 100 150 VDS [V] 200 250 300 350 400 ID [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 °C parameter: T j 400 120 360 320 280 80 gfs [S] ID [A] 240 200 160 40 120 80 40 150 °C 25 °C 0 0 0 2 4 6 8 VGS [V] Rev.2.1 0 20 40 60 80 100 ID [A] page 5 2012-12-07 BSC039N06NS 9 Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=50 A; V GS=10 V V GS(th)=f(T j); V GS=V DS 7 5 6.5 6 4 5.5 5 max 3 4 3.5 VGS(th) [V] RDS(on) [mW] 4.5 typ 3 360 mA 36 µA 2 2.5 2 1.5 1 1 0.5 0 0 -60 -20 20 60 100 140 180 -60 -20 20 60 100 140 180 Tj [°C] Tj [°C] 11 Typ. capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j 104 103 10000 Ciss 102 IF [A] 1000 C [pF] 103 Coss 25 °C 102 101 Crss 100 10 0 20 40 60 VDS [V] Rev.2.1 150 °C 101 100 0 0.5 1 1.5 2 VSD [V] page 6 2012-12-07 BSC039N06NS 13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 W V GS=f(Q gate); I D=50 A pulsed parameter: T j(start) parameter: V DD 100 12 30 V 10 12 V 10 125 °C 25 °C 8 VGS [V] IAV [A] 100 °C 48 V 1 6 4 2 0.1 1 10 100 0 1000 0 10 tAV [µs] 20 30 Qgate [nC] 15 Drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS)=f(T j); I D=1 mA 70 V GS Qg VBR(DSS) [V] 66 62 V gs(th) 58 54 Q g(th) Q sw Q gs 50 -60 -20 20 60 100 140 Q gate Q gd 180 Tj [°C] Rev.2.1 page 7 2012-12-07 BSC039N06NS PG-TDSON-8 (SuperSO8) Rev.2.1 page 8 2012-12-07 BSC039N06NS Published by Infineon Technologies AG 81726 Munich, Germany © 2011 Infineon Technologies AG All Rights Reserved. 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Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev.2.1 page 9 2012-12-07