IDT 49FCT20805PYGI

IDT49FCT20805
2.5V CMOS DUAL 1-TO-5 CLOCK DRIVER
INDUSTRIAL TEMPERATURE RANGE
2.5V CMOS DUAL
1-TO-5 CLOCK DRIVER
DESCRIPTION:
FEATURES:
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IDT49FCT20805
The FCT20805 is a 2.5 volt clock driver built using advanced CMOS
technology. The device consists of two banks of drivers, each with a 1:5 fanout
and its own output enable control. The device has a "heartbeat" monitor for
diagnostics and PLL driving. The MON output is identical to all other outputs
and complies with the output specifications in this document. The FCT20805
offers low capacitance inputs.
The FCT20805 is designed for high speed clock distribution where signal
quality and skew are critical. The FCT20805 also allows single point-to-point
transmission line driving in applications such as address distribution, where one
signal must be distributed to multiple recievers with low skew and high signal
quality.
Advanced CMOS Technology
Guaranteed low skew < 200ps (max.)
Very low propagation delay < 2.5ns (max)
Very low duty cycle distortion < 270ps (max)
Very low CMOS power levels
Operating frequency up to 166MHz
TTL compatible inputs and outputs
Two independent output banks with 3-state control
1:5 fanout per bank
"Heartbeat" monitor output
VCC = 2.5V ± 0.2V
Available in SSOP, QSOP, and VFQFPN packages
FUNCTIONAL BLOCK DIAGRAM
OEA
5
INA
5
INB
OA1 - OA5
OB1 - OB5
OEB
MON
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
MAY 2010
1
c
2007 Integrated Device Technology, Inc.
DSC-6172/113
IDT49FCT20805
2.5V CMOS DUAL 1-TO-5 CLOCK DRIVER
INDUSTRIAL TEMPERATURE RANGE
OB1
OB2
VCCB
VCCA
OA1
PIN CONFIGURATIONS
18 17
16
20
VCCB
OA1
2
19
OB1
OA2
3
18
OB2
OA2
1
15
OB3
OA3
4
17
OB3
OA3
2
14
GNDB
GNDA
5
16
GNDB
GNDA
3
13
OB4
OA4
6
15
OB4
OA4
4
12
OB5
OA5
7
14
OB5
OA5
5
11
MON
GNDQ
8
13
MON
OEA
9
12
OEB
INA
10
11
INB
7
OEA
SSOP/ QSOP
TOP VIEW
VCC
Description
Input Power Supply Voltage
Unit
Pin Names
–0.5 to +4.6
V
OEA, OEB
Description
3-State Output Enable Inputs (Active LOW)
VI
Input Voltage
–0.5 to +5.5
V
INA, INB
Clock Inputs
Output Voltage
–0.5 to VCC+0.5
V
OAn, OBn
Clock Outputs
TJ
Junction Temperature
150
°C
MON
Monitor Output
TSTG
Storage Temperature
–65 to +165
°C
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
FUNCTION TABLE (1)
Inputs
CAPACITANCE (TA = +25 C, f = 1.0MHz)
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
3
4
pF
COUT
Output Capacitance
VOUT = 0V
—
6
pF
NOTE:
1. This parameter is measured at characterization but not tested.
2
Outputs
OEA, OEB
INA, INB
OAn, OBn
MON
L
L
L
L
L
H
H
H
H
L
Z
L
H
H
Z
H
NOTE:
1. H = HIGH
L = LOW
Z = High-Impedance
O
Parameter(1)
10
PIN DESCRIPTION
Max
VO
Symbol
9
VFQFPN
TOP VIEW
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
8
INA
6
GNDQ
20 19
OEB
1
INB
VCCA
IDT49FCT20805
2.5V CMOS DUAL 1-TO-5 CLOCK DRIVER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified
Industrial: TA = -40°C to +85°C, VCC = 2.5V ± 0.2V
Symbol
Test Conditions(1)
Parameter
Min.
Typ.(2)
Max.
Unit
VIH
Input HIGH Level
1.7
—
5.5
V
VIL
Input LOW Level
–0.5
—
0.7
V
IIH
Input HIGH Current
VCC = Max.
VI = 5.5V
—
—
±1
IIL
Input LOW Current
VCC = Max.
VI = GND
—
—
±1
IOZH
High Impedance Output Current
VCC = Max.
VO = VCC
—
—
±1
IOZL
(3-State Outputs Pins)
—
—
±1
VIK
Clamp Diode Voltage
VCC = Min., IIN = –18mA
—
–0.7
–1.2
V
IODH
Output HIGH Current
VCC = 2.5V, VIN = VIH or VIL, VO = 1.25V(3,4)
–15
–35
–90
mA
IODL
Output LOW Current
VCC = 2.5V, VIN = VIH or VIL, VO = 1.25V(3,4)
25
55
100
mA
–30
–50
–120
mA
V
IOS
VOH
VOL
Short Circuit Current
Output HIGH Voltage
Output LOW Voltage
VO = GND
VCC = Max., VO =
GND(3,4)
1.7(5)
—
—
VCC - 0.2
—
—
VCC = Min.
IOH = –8mA
VIN = VIH or VIL
IOH = –100µA
VCC = Min.
IOL = 8mA
—
0.2
0.4
VIN = VIH or VIL
IOL = 100µA
—
—
0.2
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 2.5V, 25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. VOH = Vcc -0.6V at rated current.
3
µA
V
IDT49FCT20805
2.5V CMOS DUAL 1-TO-5 CLOCK DRIVER
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
ICCL
ICCH
ICCZ
∆ICC
Parameter
Quiescent Power Supply Current
Test Conditions(1)
VCC = Max.
VIN = GND or VCC
Power Supply Current per Input HIGH
VCC = Max.
VIN = VCC –0.6V
ICCD
Dynamic Power Supply Current
per Output(3)
VCC = Max.
CL = 15pF
All Outputs Toggling
VCC = Max.
CL = 15pF
All Outputs Toggling
fi = 133MHz
VCC = Max.
CL = 15pF
All Outputs Toggling
fi = 166MHz
IC
Total Power Supply Current(4)
Min.
—
Typ.(2)
0.1
Max.
20
Unit
µA
—
35
250
µA
VIN = VCC
VIN = GND
—
65
100
µA/MHz
VIN = VCC
VIN = GND
VIN = VCC –0.6V
VIN = GND
VIN = VCC
VIN = GND
VIN = VCC –0.6V
VIN = GND
—
100
125
—
100
125
—
115
150
—
115
150
mA
NOTES:
1.
2.
3.
4.
For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
Typical values are at VCC = 2.5V, +25°C ambient.
This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fONO)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
∆ICC = Power Supply Current for a TTL High Input (VIN = VCC -0.6V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fO = Output Frequency
NO = Number of Outputs at fO
4
IDT49FCT20805
2.5V CMOS DUAL 1-TO-5 CLOCK DRIVER
INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE(3,4)
Symbol
Parameter
Conditions(1)
Min.(2)
Max.
Unit
1
3
ns
tPLH
Propagation Delay
CL = 15pF
tPHL
INA to OAn, INB to OBn
f ≤ 133MHz
tR
Output Rise Time (0.8V to 2V)
—
1.5
ns
tF
Output Fall Time (2V to 0.8V)
—
1.5
ns
tSK(O)
Same device output pin to pin skew(5)
—
270
ps
tSK(P)
Pulse skew(6,9)
—
270
ps
tSK(PP)
Part to part skew(7)
—
550
ps
tPZL
Output Enable Time
—
5.2
ns
tPZH
OEA to OAn, OEB to OBn
tPLZ
Output Disable Time
—
5.2
ns
tPHZ
OEA to OAn, OEB to OBn
fMAX
Input Frequency
—
133
MHz
Conditions(1,8)
Min.(2)
Max.
Unit
CL = 15pF
0.5
2.5
ns
Symbol
Parameter
tPLH
Propagation Delay
tPHL
INA to OAn, INB to OBn
133MHz ≤ f ≤ 166MHz
tR
Output Rise Time (0.7V to 1.7V)
—
1.25
ns
tF
Output Fall Time (1.7V to 0.7V)
—
1.25
ns
tSK(O)
Same device output pin to pin skew(5)
—
200
ps
tSK(P)
Pulse skew(6,9)
—
270
ps
tSK(PP)
Part to part skew(7)
—
550
ps
—
5.2
ns
—
5.2
ns
—
166
MHz
tPZL
Output Enable Time
tPZH
OEA to OAn, OEB to OBn
tPLZ
Output Disable Time
tPHZ
OEA to OAn, OEB to OBn
fMAX
Input Frequency
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. tPLH and tPHL are production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew.
5. Skew measured between all outputs under identical transitions and load conditions.
6. Skew measured is difference between propagation delay times tPHL and tPLH of same outputs under identical load conditions.
7. Part to part skew for all outputs given identical transitions and load conditions at identical VCC levels and temperature.
8. Airflow of 1m/s is recommended for frequencies above 133MHz.
9. This parameter is measured using f = 1MHz.
5
IDT49FCT20805
2.5V CMOS DUAL 1-TO-5 CLOCK DRIVER
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
4.6V
VCC
Open
GND
500
VIN
VOUT
Pulse
Generator
D.U.T
RL
CL
RT
500
Enable and Disable Time Circuit
V CC
INPUT
tPLH1
VIN
VOUT
Pulse
Generator
tPHL1
OUTPUT 1
D.U.T
RL
tSK(o)
CL
RT
tSK(o)
OUTPUT 2
tPLH2
2.5V
1.25V
0V
VOH
1.25V
VOL
VOH
1.25V
VOL
tPHL2
tSK(o) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1|
Output Skew - tSK(O)
CL = 15pF Test Circuit
SWITCH POSITION
TEST CONDITIONS
Test
Switch
Symbol
VCC = 2.5V ±0.2V
Unit
Disable Low
Enable Low
4.6V
CL
15
pF
RT
ZOUT of pulse generator
Disable High
Enable High
GND
Ω
RL
33
Ω
t R / tF
1 (0V to 2.5V or 2.5V to 0V)
ns
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
tR / tF = Rise/Fall time of the input stimulus from the Pulse Generator.
6
IDT49FCT20805
2.5V CMOS DUAL 1-TO-5 CLOCK DRIVER
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
ENABLE
DISABLE
2.5V
CONTROL
INPUT
t PLZ
SWITCH
CLOSED
OUTPUT
NORMALLY
HIGH
VOH
0.3V
tSK(PP)
VOL
0.3V
SWITCH
OPEN
VOH
tPLH2
1.25V
VOL
tSK(PP)
PACKAGE 2
OUTPUT
t PHZ
t PZH
VOH
1.25V
VOL
PACKAGE 1
OUTPUT
0V
VOH
1.25V
tPHL1
tPLH1
1.25V
tPZL
OUTPUT
NORMALLY
LOW
2.5V
1.25V
0V
INPUT
VOL
tPHL2
tSK(PP) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1|
Part-to-Part Skew - tSK(PP)
Enable and Disable Times
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH
Part-to-Part Skew is for the same package and speed grade.
2.5V
INPUT
2.5V
INPUT
1.25V
1.25V
0V
tPLH
0V
tPHL
tPLH
tPHL
VOH
1.7V
OUTPUT
0.7V
tR
VOH
1.25V
VOL
VOH
OUTPUT
1.25V
1.25V
V OL
VOL
tSK(P) = |tPLH - tPLH|
tF
Propagation Delay
Pulse Skew
7
IDT49FCT20805
2.5V CMOS DUAL 1-TO-5 CLOCK DRIVER
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT49FCT
XXXX
Device Type
X
Package
X
Process
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2.5V CMOS Dual 1-to-5 Clock Driver
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