Application Note PWM control of MLX90401 (SPEED ADJUST) Scope The scope of this application note is to explain the speed control of the BLDC motor through the SPEED ADJUST pin of the MLX90401 using a PWM Description 12V Regulator (To Boost) 5V Regulator (To Logic) Vsup (1) VREG(internal) UVLO UVLO VREF (2) Note: Only one channel shown Sawtooth Oscillator Osc R/C (8) Level Shifter + Speed Adj / Disable (7) GT (17,20,23) Chop VREG(internal) Vsup Cap Boost (18,21,24) Charge Pump OSC -25kHz (variable) FB (16,19,22) UVLO Fault + Output Control Logic GB (13,14,15) PWR GND (12) 5V 3.5KΩ Debouncer 5V 60°/120° Select (11) 3.5KΩ Debouncer 5V 3.5KΩ Fwd/Rev (6) Debouncer 5V Commutation Decoding Logic /Brake (9) 3.5KΩ Hall A (3) 5V 3.5KΩ Hall B (4) 5V 3.5KΩ Hall C (5) VSS (10) From the Blockdiagram it is clear that the PWM (chop) that controls the speed of the BLDC motor is realized using a comparator that takes the Oscillator voltage and an analog voltage level from the SPEED ADJUST pin. Since the oscillator voltage is derived from Vref, also the analog voltage should be derived from VREF, either using a potentiometer, or using a PWM with an RC network. 390119040102 Rev 001 Page 1 of 3 May-2005 Application Note PWM control of MLX90401 (SPEED ADJUST) Vref 100%PWM 0.643*Vref Oscillator output 0.357*Vref 0%PWM 0.16*Vref Disable DISABLE Vref Microcontroller Speed/ Disable MLX90401 When the analog voltage is below 0.357*Vref, the comparator will not be toggled, and thus PWM=0% will be applied to the motor. The schematic representation below reflects a snapshot when driving a single phase with a PWM=15%. The Low Side PWM is applied on the bottom FET (FET4) and inverted to the top FET (FET3), while FET1 is constant high. Vsup Vsup FET1 FET3 Tphase Tphase FET2 FET4 Tphase Tphase Tristate In case PWM = 0% both top FETs will be active, as if they were braking on the high side. Further reducing the voltage below 16% of Vref, will set the FET drivers high impedant. Below table contains some voltage values the analog voltage that should be applied to realize at least 100%PWM, 0% PWM or to disable all drivers: Vbat 24V 12V 8V Vref 15V 12V 8V 390119040102 Rev 001 V100%PWM = 0.643*Vref 9.6V 7.7V 5.1V V0%PWM = 0.357*Vref 5.4V 4.3V 2.9V Page 2 of 3 VDISABLE = 0.16*Vref 2.4V 1.9V 1.3V May-2005 Application Note PWM control of MLX90401 (SPEED ADJUST) Noise. Sufficient care should be taken to minimize the ripple on the SPEED ADJUST input. The jitter on the voltage input may result in a varying PWM on the motor that can generate audible noise. 390119040102 Rev 001 Page 3 of 3 May-2005