NXP 72 MHz, 32-bit Cortex-M3™ microcontrollers LPC1300 Low-power Cortex-M3 based microcontrollers simplify USB designs The LPC1300 series includes USB based LPC134x and low power LPC1300L microcontrollers. The LPC1340 includes on-chip USB drivers for mass storage class (MSC) and human interface device (HID). This greatly simplifies USB implementations since the USB drivers are incorporated in ROM, and saves around 5-6 Kbytes of user code. The LPC1300L includes power profiles in ROM and offers low active power consumption at approximately 170 uA/MHz. Key features } ARM Cortex-M3 processor - 72 MHz operation -N ested Vectored Interrupt Controller for fast deterministic interrupts -W akeup Interrupt Controller allows automatic wake from an priority interrupt -T hree reduced-power modes: Sleep, Deep-sleep, and Deep power-down } Memories - Up to 32 KB Flash memory - Up to 8 KB SRAM } Serial peripherals -U SB 2.0 full-speed device controller with on-chip PHY -U ART with fractional baud rate generation, internal FIFO, and RS-485 support -1 -2 SSP/SPI controller with FIFO and multi-protocol capabilities - I2C-bus interface supporting full I2C-bus specification and Fast-mode plus with a data rate of 1 Mbit/s, multiple address recognition, and monitor mode } Analog peripherals : - 10-bit analog-to-digital converter (ADC) with eight channels and conversion rates up to 400 K samples per second } Other peripherals : - Up to 42 General Purpose I/O (GPIO) pins with configurable pull-up/down resistors and a new, configurable open-drain operating mode - Four general-purpose counter/timers, with a total of four capture inputs and 13 match outputs - Programmable Watchdog timer (WDT) with lock-out feature - System tick timer - Each peripheral has its own clock divider for power savings Applications } White goods } e-Metering } Consumer peripherals } Remote sensors } 16/32-bit applications } Programmable pseudo open-drain mode for GPIO pins LPC1300 block diagram Also, in keeping with NXP’s existing line of more than 50 USBequipped ARM MCUs, the LPC134x offers support for USB full-speed operation. HID and mass storage USB driver software is included in a dedicated on-chip ROM, maximizing the amount of Flash memory available for user code. Tools The LPC1300 series is supported by LPCXpresso, an easyto-use, comprehensive development tool platform for under US$30. It’s also supported by development tools from IAR, Keil, Hitex, Code Red, and many others. For the most current listing, please visit www.nxp.com/microcontrollers. Flash 8/16/32 kB ARM CORTEX-M0 AHB-LITE Bus The LPC1300 series is pin-to-pin compatible with the LPC1100 series, NXP’s new family of Cortex-M0 MCUs, so it gives designers a straightforward migration path to the even lowerpower features of the Cortex-M0 architecture. LPC1300L (LPC131x/01) include the following enhancements: } Power profiles enable lower power consumption in Active and Sleep modes } Four levels for BOD forced reset } Second SSP controller } Windowed Watchdog Timer (WWDT) } Internal pull-up resistors pull up pins to full VDD level Up to 72 MHz SRAM Up to 8 kB ROM (USB drivers*) High-speed GPIO (Up to 42) Bridge 32-bit Timers (2) 16-bit Timers (2) 1 or 2 SSP WDT I2C System Control LPCXpresso supports all Cortex-M devices Power Control PMU, power modes, BOD, single Vdd power supply, POR USB APB Bus Built around a Cortex-M3 Rev2 processor core, the LPC1300 is equipped with up to 32 KB of Flash and up to 8 KB of SRAM, uses a single 3.3 V power supply (for operation between 2.0 and 3.6 V), and is available in LQFP48 or HVQFN33 packages. UART SERIAL INTERFACES Clock Generation Unit -M0 S H LPC1100 LPC11C00 LPC11U00 LPC1200 CAN SB U 12 MHz, 1% IRC OSC, Watchdog OSC, 1-25 MHz System OSC, System PLL ADC SYSTEM ANALOG 10-bit USB e ac rf te In * LPC134x only CX LP -M3 so es pr LPC1300 LPC1700 USB powered by LPC1300 selection guide Type number Flash Total SRAM USB LPC1343 32 KB 8 KB Device LPC1342 16 KB 4 KB Device LPC1313/01 32 KB 8 KB - LPC1311/01 8 KB 2 KB - UART RS-485 I2C/Fast+ SSP/SPI ADC channels 1 1 1 8 LQFP48, HVQFN33 1 1 1 8 HVQFN33 1 1 2 8 LQFP48, HVQFN33 1 1 2 8 HVQFN33 www.nxp.com © 2011 NXP Semiconductors N.V. All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The Date of release: June 2011 information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and Document order number: 9397 750 17136 may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof Printed in the Netherlands does not convey nor imply any license under patent- or other industrial or intellectual property rights. Packages