CSD16322Q5C

CSD16322Q5C
www.ti.com
SLPS241B – DECEMBER 2009 – REVISED MAY 2010
DualCool™ N-Channel NexFET™ Power MOSFETs
Check for Samples: CSD16322Q5C
FEATURES
1
•
•
•
•
•
•
•
•
2
PRODUCT SUMMARY
DualCool™ Package SON 5×6mm
Optimized for Two Sided Cooling
Optimized for 5V Gate Drive
Ultralow Qg and Qgd
Low Thermal Resistance
Avalanche Rated
Pb Free Terminal Plating
RoHS Compliant and Halogen Free
VDS
Drain to Source Voltage
25
V
Qg
Gate Charge Total (4.5V)
6.8
nC
Qgd
Gate Charge Gate to Drain
RDS(on)
VGS(th)
•
DESCRIPTION
The NexFET™ power MOSFET has been designed
to minimize losses in power conversion applications
and optimized for 5V gate drive applications.
Drain
Gate
D
D
Bottom View
D
D
D
S
mΩ
3.9
mΩ
Threshold Voltage
1.1
Package
Media
CSD16322Q5C
13-Inch
Reel
V
Qty
Ship
2500
Tape and
Reel
ABSOLUTE MAXIMUM RATINGS
TA = 25°C unless otherwise stated
VALUE
UNIT
VDS
Drain to Source Voltage
25
V
VGS
Gate to Source Voltage
+10 / –8
V
Continuous Drain Current, TC = 25°C
97
A
Continuous Drain Current(1)
21
A
IDM
Pulsed Drain Current, TA = 25°C(2)
136
A
PD
Power Dissipation(1)
3.1
W
TJ,
TSTG
Operating Junction and Storage
Temperature Range
–55 to 150
°C
EAS
Avalanche Energy, single pulse
ID = 50A, L = 0.1mH, RG = 25Ω
125
mJ
ID
S
G
G
S
S
S
RDS(on) vs VGS
Gate Charge
12
10
ID = 20A
11
VGS - Gate-to-Source Voltage - V
RDS(on) - On-State Resistance - mΩ
4.6
VGS = 8V
(1) RqJA = 39°C/W on 1-inch2 Cu, (2-oz.) on a 0.06" thick FR4
PCB.
(2) Pulse duration ≤300ms, duty cycle ≤2%
S
S
VGS = 4.5V
SON 5x6-mm Plastic
Package
Source
Top View
D
D
mΩ
ORDERING INFORMATION
Point-of-Load Synchronous Buck in
Networking, Telecom and Computing Systems
Optimized for Synchronous or Control FET
Applications
D
nC
5.4
Device
APPLICATIONS
•
Drain to Source On Resistance
1.3
VGS = 3V
10
9
T C = 125°C
8
7
6
5
4
T C = 25°C
3
ID = 20A
VDS = 12.5V
9
8
7
6
5
4
3
2
1
0
2
0
1
2
3
4
5
6
7
8
VGS - Gate-to-Source Voltage - V
9
10
G006
0
2
4
6
8
10
Qg - Gate Charge - nC
12
14
G003
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DualCool, NexFET are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009–2010, Texas Instruments Incorporated
CSD16322Q5C
SLPS241B – DECEMBER 2009 – REVISED MAY 2010
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
UNIT
Static Characteristics
BVDSS
Drain to Source Voltage
VGS = 0V, IDS = 250mA
IDSS
Drain to Source Leakage
VGS = 0V, VDS = 20V
IGSS
Gate to Source Leakage
VDS = 0V, VGS = +10/–8V
VGS(th)
Gate to Source Threshold Voltage
VDS = VGS, ID = 250mA
RDS(on)
Drain to Source On Resistance
gfs
Transconductance
25
0.9
V
1
mA
100
nA
1.1
1.4
V
VGS = 3V, IDS = 20A
5.4
7.2
mΩ
VGS = 4.5V, IDS = 20A
4.6
5.8
mΩ
VGS = 8V, IDS = 20A
3.9
5
mΩ
VDS = 15V, IDS = 20A
106
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
1050 1365
VGS = 0V, VDS = 12.5V,
f = 1MHz
pF
740
950
pF
Reverse Transfer Capacitance
55
70
pF
RG
Series Gate Resistance
1.1
2.2
Ω
Qg
Gate Charge Total (4.5V)
6.8
9.7
nC
Qgd
Gate Charge – Gate to Drain
1.3
nC
Qgs
Gate Charge – Gate to Source
2.4
nC
Qg(th)
Gate Charge at Vth
1.3
nC
Qoss
Output Charge
17
nC
td(on)
Turn On Delay Time
6.1
ns
tr
Rise Time
10.7
ns
td(off)
Turn Off Delay Time
12.3
ns
tf
Fall Time
3.7
ns
VDS = 12.5V,
IDS = 20A
VDS = 13V, VGS = 0V
VDS = 12.5V, VGS = 4.5V,
IDS = 20A, RG =2Ω
Diode Characteristics
VSD
Diode Forward Voltage
Qrr
Reverse Recovery Charge
trr
Reverse Recovery Time
IDS = 20A, VGS = 0V
0.8
VDD = 13V, IF = 20A, di/dt = 300A/ms
1
V
19
nC
21
ns
THERMAL CHARACTERISTICS
(TA = 25°C unless otherwise stated)
MAX
UNIT
RqJC
Thermal Resistance Junction to Case (Top Source) (1)
PARAMETER
3.5
°C/W
RqJC
Thermal Resistance Junction to Case (Bottom drain) (1)
2.4
°C/W
RqJA
Thermal Resistance Junction to Ambient (1) (2)
50
°C/W
(1)
(2)
2
MIN
TYP
2
RqJC is determined with the device mounted on a 1-inch 2-oz. Cu pad on a 1.5 × 1.5-inch 0.06-inch thick FR4 board. RqJC is specified
by design, whereas RqCA is determined by the user’s board design.
Device mounted on FR4 material with 1-inch2 of 2-oz. Cu.
Submit Documentation Feedback
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): CSD16322Q5C
CSD16322Q5C
www.ti.com
SLPS241B – DECEMBER 2009 – REVISED MAY 2010
GATE
GATE
Source
N-Chan 5x6 QFN TTA MIN Rev3
N-Chan 5x6 QFN TTA MAX Rev3
Max RqJA = 50°C/W
when mounted on
1 inch2 of 2-oz. Cu.
Source
Max RqJA = 123°C/W
when mounted on
minimum pad area of
2-oz.Cu.
DRAIN
DRAIN
M0137-02
M0137-01
Text
and
Text
and
Text
and
Text and br Added for Spacing
br
br
br
Added
Added
Added
for
for
for
Spacing
Spacing
Spacing
TYPICAL MOSFET CHARACTERISTICS
(TA = 25°C unless otherwise stated)
ZqJA - Normalized Thermal Impedance
10
1
0.5
0.3
0.1
Duty Cycle = t1/t2
0.1
0.05
0.01
P
0.02
0.01
t1
t2
Single Pulse
0.001
0.001
0.01
Typical RqJA = 98°C/W (min Cu)
TJ = P ´ ZqJA ´ RqJA
0.1
1
tp - Pulse Duration - s
10
100
1k
G012
Figure 1. Transient Thermal Impedance
Submit Documentation Feedback
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): CSD16322Q5C
3
CSD16322Q5C
SLPS241B – DECEMBER 2009 – REVISED MAY 2010
www.ti.com
TYPICAL MOSFET CHARACTERISTICS (continued)
(TA = 25°C unless otherwise stated)
TEXT ADDED FOR SPACING
50
45
45
IDS - Drain-to-Source Current - A
IDS - Drain-to-Source Current - A
TEXT ADDED FOR SPACING
50
40
VGS = 8V
35
30
VGS = 4.5V
25
VGS = 3V
VGS = 2.5V
20
VGS = 2V
15
10
VDS = 5V
T C = 125°C
40
35
30
T C = 25°C
25
20
T C = -55°C
15
10
5
5
0
0
0
0.5
1
1.5
VDS - Drain-to-Source Voltage - V
1
2
1.25
1.5
1.75
2
2.25
2.5
VGS - Gate-to-Source Voltage - V
G001
Figure 2. Saturation Characteristics
3
G002
Figure 3. Transfer Characteristics
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
10
3
ID = 20A
VDS = 12.5V
9
f = 1MHz
VGS = 0V
2.5
8
C - Capacitance - nF
VGS - Gate-to-Source Voltage - V
2.75
7
6
5
4
3
2
2
Coss = Cds + Cgd
Ciss = Cgd + Cgs
1.5
1
Crss = Cgd
0.5
1
0
0
0
2
4
6
8
10
Qg - Gate Charge - nC
12
14
0
5
G003
10
15
20
VDS - Drain-to-Source Voltage - V
Figure 4. Gate Charge
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
12
RDS(on) - On-State Resistance - mΩ
VGS(th) - Threshold Voltage - V
ID = 250µA
1.2
1
0.8
0.6
0.4
0.2
ID = 20A
11
10
9
T C = 125°C
8
7
6
5
4
T C = 25°C
3
2
-25
25
75
T C - Case Temperature - °C
125
175
0
1
2
G005
Figure 6. Threshold Voltage vs. Temperature
4
G004
Figure 5. Capacitance
1.4
0
-75
25
3
4
5
6
7
8
VGS - Gate-to-Source Voltage - V
9
10
G006
Figure 7. On Resistance vs. Gate Voltage
Submit Documentation Feedback
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): CSD16322Q5C
CSD16322Q5C
www.ti.com
SLPS241B – DECEMBER 2009 – REVISED MAY 2010
TYPICAL MOSFET CHARACTERISTICS (continued)
(TA = 25°C unless otherwise stated)
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
1.2
100
ID = 20A
VGS = 4.5V
ISD - Source-to-Drain Current - A
Normalized On-State Resistance
1.4
1
0.8
0.6
0.4
0.2
0
-75
10
T C = 125°C
1
0.1
T C = 25°C
0.01
0.001
0.0001
-25
25
75
T C - Case Temperature - °C
125
175
0
0.2
G007
Figure 8. On Resistance vs. Temperature
TEXT ADDED FOR SPACING
G008
TEXT ADDED FOR SPACING
I(AV) - Peak Avalanche Current - A
IDS - Drain-to-Source Current - A
1.2
100
100
1ms
10
10ms
11110
100ms
1
Area Limited
by RDS(on)
0.01
0.01
1
Figure 9. Typical Diode Forward Voltage
1k
0.1
0.4
0.6
0.8
VSD - Source-to-Drain Voltage - V
1ms
Single Pulse
Typical R θJA = 98°C/W (min Cu)
DC
0.1
1
10
VDS - Drain-to-Source Voltage - V
100
T C = 225°C
10
T C = 125°C
1
0.01
G009
Figure 10. Maximum Safe Operating Area
0.1
1
10
t(AV) - Time in Avalanche - ms
100
G010
Figure 11. Single Pulse Unclamped Inductive Switching
TEXT ADDED FOR SPACING
IDS - Drain-to-Source Current - A
120
100
80
60
40
20
0
-50
-25
0
25
50
75
100 125
T C - Case Temperature - °C
150
175
G011
Figure 12. Maximum Drain Current vs. Temperature
Submit Documentation Feedback
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): CSD16322Q5C
5
CSD16322Q5C
SLPS241B – DECEMBER 2009 – REVISED MAY 2010
www.ti.com
MECHANICAL DATA
Q5C Package Dimensions
E1
K
L
E2
8
8
7
7
6
4
4
5
5
e
3
6
3
Pin 9
D2
D1
E
2
N
1
Exposed
Heat Slug
1
c1
q
2
N1
L
b
M1
M
Top View
Bottom View
Side View
TM
DualCool Pinout
c
E1
A
q
Pin#
Label
1, 2, 3, 9
Source
4
Gate
5, 6, 7, 8
Drain
Front View
M0162-01
DIM
MILLIMETERS
MAX
MIN
MAX
A
0.950
1.050
0.037
0.039
b
0.360
0.460
0.014
0.018
c
0.150
0.250
0.006
0.010
c1
0.150
0.250
0.006
0.010
D1
4.900
5.100
0.193
0.201
D2
4.320
4.520
0.170
0.178
E
4.900
5.100
0.193
0.201
E1
5.900
6.100
0.232
0.240
E2
3.920
4.12
0.154
e
6
INCHES
MIN
1.27 TYP
0.162
0.050
L
0.510
0.710
0.020
0.028
q
–
–
–
–
K
0.760
–
0.030
–
M
3.260
3.460
0.128
0.136
M1
0.520
0.720
0.020
0.028
N
2.720
2.920
0.107
0.115
N1
1.227
1.427
0.048
0.056
Submit Documentation Feedback
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): CSD16322Q5C
CSD16322Q5C
www.ti.com
SLPS241B – DECEMBER 2009 – REVISED MAY 2010
Recommended PCB Pattern
DIM
F1
F7
F3
8
1
F2
F11
F5
F9
5
4
F6
MILLIMETERS
INCHES
MIN
MAX
MIN
MAX
F1
6.205
6.305
0.244
0.248
F2
4.46
4.56
0.176
0.18
F3
4.46
4.56
0.176
0.18
F4
0.65
0.7
0.026
0.028
F5
0.62
0.67
0.024
0.026
F6
0.63
0.68
0.025
0.027
F7
0.7
0.8
0.028
0.031
F8
0.65
0.7
0.026
0.028
F9
0.62
0.67
0.024
0.026
F10
4.9
5
0.193
0.197
F11
4.46
4.56
0.176
0.18
F8
F4
F10
M0139-01
For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through
PCB Layout Techniques.
K0
4.00 ±0.10 (See Note 1)
0.30 ±0.05
2.00 ±0.05
+0.10
–0.00
12.00 ±0.30
Ø 1.50
1.75 ±0.10
Q5C Tape and Reel Information
5.50 ±0.05
B0
R 0.30 MAX
A0
8.00 ±0.10
Ø 1.50 MIN
A0 = 6.50 ±0.10
B0 = 5.30 ±0.10
K0 = 1.40 ±0.10
R 0.30 TYP
M0138-01
Notes:
1. 10-sprocket hole-pitch cumulative tolerance ±0.2
2. Camber not to exceed 1mm in 100mm, noncumulative over 250mm
3. Material: black static-dissipative polystyrene
4. All dimensions are in mm, unless otherwise specified.
5. A0 and B0 measured on a plane 0.3mm above the bottom of the pocket
6. MSL1 260°C (IR and convection) PbF reflow compatible
Submit Documentation Feedback
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): CSD16322Q5C
7
CSD16322Q5C
SLPS241B – DECEMBER 2009 – REVISED MAY 2010
www.ti.com
REVISION HISTORY
Changes from Original (December 2009) to Revision A
Page
•
Changed the labels on the Bottom View pinout image ......................................................................................................... 1
•
Changed the Mechanical Data dimensions table. Added dimensions for M, M1, N and N1 ................................................ 6
Changes from Revision A (April 2010) to Revision B
Page
•
Changed RDS(on) - VGS = 3V in the Electrical Characteristics table From: 7 To: 7.2 in the max column ............................... 2
•
Deleted the Package Marking Information section ............................................................................................................... 7
8
Submit Documentation Feedback
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): CSD16322Q5C
PACKAGE OPTION ADDENDUM
www.ti.com
7-Jan-2016
PACKAGING INFORMATION
Orderable Device
Status
(1)
CSD16322Q5C
ACTIVE
Package Type Package Pins Package
Drawing
Qty
VSON-CLIP
DQU
8
2500
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Pb-Free (RoHS
Exempt)
CU SN
Level-1-260C-UNLIM
Op Temp (°C)
Device Marking
(4/5)
-55 to 150
CSD16322C
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
7-Jan-2016
Addendum-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
Products
Applications
Audio
www.ti.com/audio
Automotive and Transportation
www.ti.com/automotive
Amplifiers
amplifier.ti.com
Communications and Telecom
www.ti.com/communications
Data Converters
dataconverter.ti.com
Computers and Peripherals
www.ti.com/computers
DLP® Products
www.dlp.com
Consumer Electronics
www.ti.com/consumer-apps
DSP
dsp.ti.com
Energy and Lighting
www.ti.com/energy
Clocks and Timers
www.ti.com/clocks
Industrial
www.ti.com/industrial
Interface
interface.ti.com
Medical
www.ti.com/medical
Logic
logic.ti.com
Security
www.ti.com/security
Power Mgmt
power.ti.com
Space, Avionics and Defense
www.ti.com/space-avionics-defense
Microcontrollers
microcontroller.ti.com
Video and Imaging
www.ti.com/video
RFID
www.ti-rfid.com
OMAP Applications Processors
www.ti.com/omap
TI E2E Community
e2e.ti.com
Wireless Connectivity
www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2016, Texas Instruments Incorporated
Similar pages