NXP 150 MHz, 32-bit Cortex-M3™ microcontrollers LPC1800 Fastest Cortex-M3 MCU, Largest SRAM, High Speed USB The LPC1800 series of low power, high-performance Cortex-M3 MCUs features frequencies up to 150 MHz and flexible Dual-Bank Flash for the highest reliability in-application re-programming. Key features 4 150 MHz, 32-bit ARM Cortex-M3 4 Up to 1 MB Flash 4 Up to 200 KB SRAM 4 Memory Protection Unit (MPU) 4 Two High-speed USB 2.0 interfaces – On-chip High-speed PHY 4 Ethernet MAC 4 LCD Interface 4 Quad-SPI Flash Interface 4 State Configurable Timer Subsystem 4 Up to 80 GPIO Additional features 4 8-channel GPDMA controller 4 Two 8-channel 10-bit ADCs and 10-bit DAC (400 K samples per second) 4 Motor Control PWM and Quadrature Encoder Interface 4 Four UARTs 4 Smart card interface 4 Two Fast-mode I2C 4 I2S interface 4 Two SSP/SPI 4 Temperature range: –40 ºC to +85 ºC Lower power and high performance The LPC1800 - designed using NXP’s ultra low-leakage 90 nm process technology - is optimized for low power operation at very low frequencies all the way through to 150 MHz maximum performance from either Flash or RAM. This performance provides maximum connectivity and bandwidth options for a wide range of demanding applications including power conversion, lighting, motor control and audio applications. Large internal memory The LPC1800 offers the industry’s largest on-chip SRAM for a Cortex-M3 with up to 200 KB provided in multiple banks. A flexible dual-bank Flash architecture offers the highest reliability in-application re-programming, and allows for non-stop Flash operation. Extensive peripheral set The LPC1800 also features two new innovative peripherals: a flexible quad-SPI interface and a State Configurable Timer subsystem. The LPC1800 is the first microcontroller to provide a seamless high-speed interface that will connect with virtually all SPI and quad-SPI manufacturers. The LPC1800’s State Configurable Timer Subsystem comprises of a timer array with a state machine enabling complex functionality including LPC1800 block diagram event controlled PWM waveform generation, ADC synchronization and dead time control. This timer subsystem gives embedded designers increased flexibility to create user-defined wave-forms and control signals. LPC1800 ARM CORTEX-M3 Up to 150 MHz Additional peripherals available on the LPC1800 include two HS USB controllers, an on-chip HS PHY, a 10/100T Ethernet controller with hardware enabled TCP/IP checksum calculation, a high-resolution color LCD controller, and AES decryption including two 128-bit secure OTP memories for key storage. Versions with AES encryption are available on request. Brownout Detector Up to 1 MB Dual Bank Flash Debug Trace MPU Power Control Power-on Reset Up to 200 KB System Tick Timer GPDMA Clock Control Watchdog Timer 32 KB ROM & 32-bit OTP SYSTEM MEMORY CORE SRAM ROM Bus System For more information, please visit www.nxp.com/microcontrollers 1 x UART, 3x USART/SC 2x USB 2.0 LCD Controller Timer Subsystem 2x SSP/SPI Eternet MAC SDIO 4 x 32-bit Timers Motor Ctrl PWM Quad Enc Interface MOTOR CONTROL OTP Key Storage 2 x I 2C Quad SPI Interface External Mem Ctrl RTC I 2S CAN 2.0B GPIO Alarm Timer INTERFACES TIMERS SERIAL INTERFACES AES Decryption SECURITY 2 x 8 ch 10-bit ADC 10-bit DAC ANALOG Selection guide Type Memory FLASH LPC1810 LCD Ethernet RAM USB SPI Flash Interface 136 State Config Timer Subsys • • ADC I/O pins Ext bus interface 2x 4-6ch 10b 17-64 8 Temp. range options Package -40 to +85 °C LQFP144, TBGA100 LPC1812 512 (1x512) 104 • • 2x 4-6ch 10b 17-64 8 -40 to +85 °C LQFP144, TBGA100 LPC1813 512 (2x256) 104 • • 2x 4-6ch 10b 17-64 8 -40 to +85 °C LQFP144, TBGA100 LPC1815 768 (2x384) 136 • • 2x 4-6ch 10b 17-64 8 -40 to +85 °C LQFP144, TBGA100 LPC1817 1024 (2x512) 136 • • 2x 4-6ch 10b 17-64 8 -40 to +85 °C LQFP144, TBGA100 • • 2x 4-6ch 10b 17-64 8 -40 to +85 °C LQFP144, TBGA100 LPC1820 168 1 LPC1822 512 (1x512) 104 1 • • 2x 4-6ch 10b 17-64 8 -40 to +85 °C LQFP144, TBGA100 LPC1823 512 (2x256) 104 1 • • 2x 4-6ch 10b 17-64 8 -40 to +85 °C LQFP144, TBGA100 LPC1825 768 (2x384) 136 1 • • 2x 4-6ch 10b 17-64 8 -40 to +85 °C LQFP144, TBGA100 LPC1827 1024 (2x512) 136 1 • • 2x 4-6ch 10b 17-64 8 -40 to +85 °C LQFP144, TBGA100 200 • 2 • • 2x 8ch 10b 80 16-32 -40 to +85 °C LQFP208, BGA256, BGA180 LPC1833 512 (2x256) 136 • 2 • • 2x 8ch 10b 80 16-32 -40 to +85 °C LQFP208, BGA256, BGA180 LPC1837 1024 (2x512) LPC1830 LPC1850 136 200 • • 2 • • 2x 8ch 10b 80 16-32 -40 to +85 °C LQFP208, BGA256, BGA180 • 2 • • 2x 8ch 10b 80 16-32 -40 to +85 °C LQFP208, BGA256, BGA180 LPC1853 512 (2x256) 136 • • 2 • • 2x 8ch 10b 80 16-32 -40 to +85 °C LQFP208, BGA256, BGA180 LPC1857 1024 (2x512) 136 • • 2 • • 2x 8ch 10b 80 16-32 -40 to +85 °C LQFP208, BGA256, BGA180 www.nxp.com © 2010 NXP Semiconductors N.V. All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The Date of release: September 2010 information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and Document order number: 9397 750 17002 may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof Printed in the Netherlands does not convey nor imply any license under patent- or other industrial or intellectual property rights.