AP65355 3A, 18V, 650kHz ADAPTIVE COT STEP-DOWN CONVERTER Description Pin Assignments The AP65355 is an adaptive constant on-time mode synchronous buck converter providing high efficiency, excellent transient response and high DC output accuracy for low-voltage regulation in digital TV and monitor. ( Top View ) EN The constant-on-time control scheme handles wide input/output voltage ratios and provides low external component count. The internal proprietary circuit enables the device to adopt both low equivalent series resistance (ESR) output capacitors, such as SP-CAP or POSCAP and ultra-low ESR ceramic capacitors. FB VREG5 SS PGOOD 1 10 2 9 VIN 8 BS 3 4 5 Exposed Pad 11 PGND VIN 7 SW 6 SW U-DFN3030-10 The adaptive on-time control supports seamless transition between continuous conduction mode (CCM) at higher load conditions and discontinuous conduction mode (DCM) at lighter load conditions. DCM allows AP65355 to maintain high efficiency at light load conditions. The AP65355 also features power good, programmable soft-start, UVLO, OTP, OVP and OCP to protect the circuit. This IC is available in U-DFN3x3-10 package. Applications Gaming Consoles Flat Screen TV Sets and Monitors Set-Top Boxes Home Audio Consumer Electronics Network Systems Green Electronics Features Fixed Frequency Emulated Constant On-Time Control Good Stability Independent of the Output Capacitor ESR Fast Load Transient Response Synchronous Rectification: 90mΩ Internal High-side Switch and 57mΩ Internal Low-Side Switch Wide Input Voltage Range: 4.5V to 18V Output Voltage Range: 0.76V to 6V 3A Continuous Output Current 650kHz Switching Frequency Built-in Over Current Limit Built-in Over Voltage Protection Built-in Thermal Shutdown Protection Programmable Soft-start Pre-biased Start-up Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) Halogen and Antimony Free. “Green” Device (Note 3) Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. 2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. AP65355 Document number: DS37875 Rev. 1 - 2 1 of 15 www.diodes.com August 2015 © Diodes Incorporated AP65355 Typical Applications Circuit INPUT VIN 12V ON OFF IN BST EN SW C1 0.1µF AP65355 PGOOD R2 100kΩ C2 20μF VREG5 L1 1.5μH R1 8.25kΩ PGOOD FB SS C3 44μF C5 1µF PGND C4 8.2nF R3 22.1kΩ VREG5 OUTPUT VOUT 1.05V Figure 1 Typical Application Circuit Pin Descriptions Pin Name Package Function U-DFN3x3-10 EN 1 Enable input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on the regulator, drive it low to turn off. It can be safely connected to VIN directly for automatic startup. FB 2 Feedback Input. FB senses the output voltage and regulates it. Drive FB with a resistive voltage divider connected to it from the output voltage. VREG5 3 Internal power supply output pin to connect an additional capacitor. Connect a 1μF (typical) capacitor as close as possible to the VREG5 and GND. This pin is not active when EN is low. SS 4 Soft-start control input pin. SS controls the soft start period. Connect a capacitor from SS to GND to set the soft-start period. SW 6,7 Power Switching Output. SW is the switching node that supplies power to the output. Connect the output LC filter from SW to the output load. Note that a capacitor is required from SW to BS to power the high-side switch. BS 8 VIN 9,10 PGOOD 5 PGND 11 (Exposed Pad) Bootstrap pin. A bootstrap capacitor is connected between the BS pin and SW pin. The voltage across the bootstrap capacitor drives the internal high-side NMOS switch. A 0.1μF (typical) capacitor is required for proper operation. Supply input. A capacitor should be connected between the VIN pin and GND pin to keep the DC input voltage constant. Open drain power good output. Power ground. Exposed pad must be connected to GND plane and connected to PGND for maximum power dissipation. AP65355 Document number: DS37875 Rev. 1 - 2 2 of 15 www.diodes.com August 2015 © Diodes Incorporated AP65355 Functional Block Diagram Figure 2 Functional Block Diagram AP65355 Document number: DS37875 Rev. 1 - 2 3 of 15 www.diodes.com August 2015 © Diodes Incorporated AP65355 Absolute Maximum Ratings (Note 4) (@TA = +25°C, unless otherwise specified.) Symbol VIN Parameter Supply Voltage Rating Unit -0.3 to 20 V VREG5 VREG5 Pin Voltage -0.3V to +6.0 V VSW Switch Node Voltage -1.0 to VIN +0.3 V VBS Bootstrap Voltage -0.3 to VSW +6.0 V VFB Feedback Voltage -0.3V to +6.0 V VEN Enable/UVLO Voltage -0.3V to VIN V VSS Soft-start PIN -0.3V to +6.0 V VGND GND Pin Voltage -0.3 to 0.3 V TST Storage Temperature -65 to +150 °C TJ Junction Temperature +160 °C TL Lead Temperature +260 °C ESD Susceptibility (Note 5) Notes: HBM Human Body Model MM Machine Model 2 kV 200 V 4. Stresses greater than the 'Absolute Maximum Ratings' specified above may cause permanent damage to the device. These are stress ratings only; functional operation of the device at these or any other conditions exceeding those indicated in this specification is not implied. Device reliability may be affected by exposure to absolute maximum rating conditions for extended periods of time. 5. Semiconductor devices are ESD sensitive and may be damaged by exposure to ESD events. Suitable ESD precautions should be taken when handling and transporting these devices. Thermal Resistance (Note 6) Symbol Parameter Rating Unit θJA Junction to Ambient U-DFN3030-10 45.87 °C/W θJC Junction to Case U-DFN3030-10 6.91 °C/W Recommended Operating Conditions (Note 7) (@TA = +25°C, unless otherwise specified.) Symbol Notes: Min Max Unit VIN Supply Voltage Parameter 4.5 18.0 V TJ Operating Junction Temperature Range -40 +125 °C TA Operating Ambient Temperature Range -40 +85 °C 6. Test condition: Device mounted on 1"x1" FR-4 substrate PCB, 2oz copper, with minimum recommended pad layout. 7. The device function is not guaranteed outside of the recommended operating conditions. AP65355 Document number: DS37875 Rev. 1 - 2 4 of 15 www.diodes.com August 2015 © Diodes Incorporated AP65355 Electrical Characteristics Parameter SUPPLY VOLTAGE (VIN PIN) (@TA = +25°C, VIN = 12V, unless otherwise specified.) Symbol Conditions Min — Typ Max Unit 4.5 — 18 V VFB=0.85V — 0.6 0.75 mA ISHDN VEN=0V — 1 10 μA UVLO Threshold VUVLO VIN Rising Test VREG5 Voltage 3.6 3.85 4.1 V UVLO Hysteresis VHYS VIN Falling Test VREG5 Voltage 0.16 0.35 0.47 V VENH — 1.25 — 18 V VENL — — — 0.85 V Input Voltage VIN Quiescent Current IQ Shutdown Supply Current UNDER VOLTAGE LOCKOUT ENABLE (EN PIN) EN High-level Input Voltage EN Low-level Input Voltage VOLTAGE REFERENCE (FB PIN) Feedback Voltage VFB VOUT=1.05V 0.753 0.765 0.777 V Feedback Bias Current IFB VFB=0.8V -0.1 0 0.1 μA VREG5 OUTPUT VREG5 Output Voltage 6.0V<VIN<18V 0<IVREG5<5mA 4.8 5.1 5.4 V Source Current Capability — VIN=6V, VVREG5=4V — 100 — mA Load Regulation — 0<IVREG5<5mA — — 100 mV Line Regulation — 6.0V<VIN<18V IVREG5=5mA — — 20 mV VVREG5 MOSFET High-side Switch On-resistance RDSONH — — 0.090 — Ω Low-side Switch On-resistance RDSONL — — 0.057 — Ω L=1.5μH 3.9 4.5 5.5 A VIN=12V, VOUT=1.05V — 150 — ns VFB=0.7V — 260 310 ns CURRENT LIMIT High Level Current Limit ILIM-H ON-TIME TIMER On Time Minimum Off Time tON tOFF-MIN THERMAL SHUTDOWN Thermal Shutdown TOTSD — — 150 — °C Thermal Shutdown Hysteresis THYS — — 25 — °C 4.2 6.0 7.8 μA mA SOFT START (SS PIN) Soft-start Source Current Soft-start Discharge Current ISS-SOURCE VSS=1.0V VSS=0.5V 0.1 0.2 — — VFB Rising 85 90 95 — VFB Falling — 85 — — PGOOD = 0.5V — 5 — ISS-DISCHARGE POWER GOOD PGOOD Threshold PGOOD Sink Current AP65355 Document number: DS37875 Rev. 1 - 2 5 of 15 www.diodes.com % mA August 2015 © Diodes Incorporated AP65355 Typical Performance Characteristics (@TA = +25°C, VIN = 12V, VOUT = 1.05V, unless otherwise specified.) 85˚C 25˚C VIN=18V -40˚C VIN=12V VIN=4.5V VIN=18V 85˚C 25˚C VIN=12V -40˚C VIN=4.5V VIN=18V VIN=12V VIN=4.5V AP65355 Document number: DS37875 Rev. 1 - 2 6 of 15 www.diodes.com August 2015 © Diodes Incorporated AP65355 Typical Performance Characteristics (continued) (@TA = +25°C, VIN = 12V, VOUT = 1.05V, unless otherwise specified.) VIN=12V VIN=4.5V VIN=4.5V VIN=18V VIN=12V VIN=18V VIN=18V VIN=12V VO=3.3V Upper Threshold Lower Threshold VIN=4.5V VO=5V VO=5V VO=2.5V VO=3.3V VO=2.5V VO=1.2V VO=1.05V VO=1.05V VO=1.2V VO=1.8V VO=1.8V AP65355 Document number: DS37875 Rev. 1 - 2 7 of 15 www.diodes.com August 2015 © Diodes Incorporated AP65355 Typical Performance Characteristics (cont.) (@TA = +25°C, VIN = 12V, VOUT = 1.05V, L = 1.5µH, C1 = 20µF, C2 = 44µF, unless otherwise specified.) Startup Through VEN 3A Load Startup Through VIN 3A Load Short Circuit Test VOUT (500mV/DIV) VEN (5V/DIV) VIN (12V/DIV) VOUT (1V/DIV) VOUT (1V/DIV) IOUT (3A/DIV) IOUT (3A/DIV) SW (10V/DIV) SW (10V/DIV) IOUT (2A/DIV) Time-1ms/div Shutdown Through VEN 3A Load VEN (5V/DIV) Time-1ms/div Time-200µs/div Shutdown Through VIN 3A Load Short Circuit Recovery VIN (12V/DIV) VOUT (500mV/DIV) VOUT (1V/DIV) VOUT (1V/DIV) IOUT (3A/DIV) IOUT (3A/DIV) IOUT (2A/DIV) SW (10V/DIV) SW (10V/DIV) Time-50µs/div Time-200µs/div Load Transient Response (0 to 3A) Load Transient Response (1 to 3A) VOUT_AC (50mV/DIV) VOUT_AC (50mV/DIV) Time-1ms/div Switching State 3A Load VOUT_AC (50mV/DIV) IL (2A/DIV) IOUT (2A/DIV) IOUT (2A/DIV) Time-100µs/div Startup with VREG5 Time-100µs/div Power Good Rising 3A Load Time-1µs/div Power Good Falling 3A Load VEN (5V/DIV) EN (5V/DIV) VEN (5V/DIV) PGOOD (5V/DIV) VREG5 (5V/DIV) PGOOD (5V/DIV) IOUT (2A/DIV) IOUT (2A/DIV) VOUT (500mV/DIV) VOUT (1V/DIV) VOUT (1V/DIV) Time-1ms/div Time-500µs/div DCM Voltage Ripple (IO=30mA) Voltage Ripple at Input (IO=3A) Time-50µs/div VIN_AC (200mV/DIV) VOUT_AC (100mV/DIV) SW (5V/DIV) SW (5V/DIV) Time-1µs/div AP65355 Document number: DS37875 Rev. 1 - 2 Time-400ns/div 8 of 15 www.diodes.com August 2015 © Diodes Incorporated AP65355 Application Information R4 JP1 VIN VOUT VIN 100KΩ EN 1 2 R1 8.25KΩ R3 22.1KΩ C10 3 R2 EN VIN VREG5 5 PGOOD 100KΩ 4 SS C4 EP C6 1µF 8.2nF 9, 10 C8 10µF C1 AP65355 FB C2 10µF BS SW PGND 8 6, 7 0.1µF VOUT 1.5µH L1 11 C5 22µF C9 22µF Figure 3 Typical Application of AP65355 evaluation board PWM Operation and Adaptive On-time Control The AP65355 is a synchronous step-down converter with internal power MOSFETs. Adaptive constant on-time (COT) control is employed to provide fast, transient response and easy loop stabilization. At the beginning of each cycle, the high-side MOSFET is turned on. This MOSFET is turned off after internal one-shot timer expires. This one shot is set by the converter input voltage (VIN), and the output voltage (VOUT) to maintain a pseudo-fixed frequency over the input voltage range, hence it is called adaptive on-time control. The output voltage variation is sensed by FB voltage. The one-shot timer is reset and the high-side MOSFET is turned on again when FB voltage falls below 0.76V. AP65355 uses an adaptive on-time control scheme and does not have a dedicated in-board oscillator. It runs with a pseudo-constant frequency of 650kHz by using the input voltage and output voltage to set the on-time one-shot timer. The on-time is inversely proportional to the input voltage and proportional to the output voltage. It can be calculated using the following equation: V TON OUT VIN f VOUT is the output voltage VIN is the input voltage f is the switching frequency After an ON-time period, the AP65355 goes into the OFF-time period. The OFF-time period length depends on VFB in most cases. It will end when the FB voltage decreases below 0.76V, at which point the ON-time period is triggered. If the OFF-time period is less than the minimum OFF time, the minimum OFF time will be applied, which is about 260ns typical. Power Save Mode The AP65355 is designed with Power Save Mode (PSM) at light load conditions for high efficiency. The AP65355 automatically reduces the switching frequency and changes the Ton time to Tmin-on time during a light load condition to get high efficiency and low output ripple. As the output current decreases from heavy load condition, the inductor current decreases as well, and eventually comes close to zero current, which is the boundary between CCM and DCM. The low-side MOSFET is turned off when the inductor current reaches level zero. The load is provided only by the output capacitor. When FB voltage is lower than 0.76V, the next ON cycle begins. The on-time is the minimum on time that benefits for decreasing VOUT ripple at light load conditions. When the output current increases from light to heavy load the switching frequency increases to sustain output voltage. The transition point to light load operation can be calculated using the following equation: V V ILOAD IN OUT TON 2L TON is on-time Enable Above the ‘EN high-level input voltage’, the internal regulator is turned on and the quiescent current can be measured above this threshold. The enable (EN) input allows the user to control turning the regulator on or off. To enable the AP65355, EN must be pulled above the ‘EN high-level input voltage.’ To disable the AP65355, EN must be pulled below ‘EN low-level input voltage.’ In Figure 3, EN is a high voltage input that can be safely connected to V IN (up to 18V) directly or through a 100KΩ pull-up to VIN for automatic start-up. AP65355 Document number: DS37875 Rev. 1 - 2 9 of 15 www.diodes.com August 2015 © Diodes Incorporated AP65355 Application Information (continued) Soft-Start The soft-start time of the AP65355 is programmable by selecting different CSS values. When the EN pin becomes high, the CSS is charged by a 6μA current source, generating a ramp signal fed into non-inverting input of the error comparator. Reference voltage VREF, or the internal soft-start voltage SS, (whichever is smaller), dominates the behavior of the non-inverting inputs of the error amplifier. Accordingly, the output voltage will follow the SS signal and ramp up smoothly to its target level. The capacitor value required for a given soft-start ramp time can be expressed as: C V t SS SS FB ISS Where CSS is the required capacitor between SS pin and GND, tSS is the desired soft-start time and VFB is the feedback voltage. Over Current Protection (OCP) Figure 4 shows the overcurrent protection (OCP) scheme of AP65355. In each switching cycle, the inductor current is sensed by monitoring the low-side MOSFET in the OFF period. When the voltage between GND pin and SW pin is smaller than the overcurrent trip level, the OCP will be triggered and the controller keeps the OFF state. A new switching cycle will begin when the measured voltage is larger than the limit voltage. The internal counter is incremented when OCP is triggered. After 16 sequential cycles, the internal OCL (Over Current Logic) threshold is set to a lower level, reducing the available output current. When a switching cycle occurs where the switch current is below the lower OCL threshold, the counter is reset and the OCL limit is returned to a higher value. Because the RDS(ON) of MOSFET increases with temperature, VLimit has a xppm/°C temperature coefficient to compensate this temperature dependency of RDS(ON). R S Q1 Q -266mV OC COMPARATOR Q2 Figure 4 Overcurrent Protection Scheme Under Voltage Lockout The AP65355 provides an undervoltage lockout circuit to prevent it from undefined status during startup. The UVLO circuit shuts down the device when VIN drops below 3.45V. The UVLO circuit has 320mV hysteresis, which means the device starts up again when V REG rises to 3.75V (nonlatch). PGOOD Comparator PGOOD is an open drain output controlled by a comparator connected to the feedback signal. If FB exceeds 90% of the internal reference voltage, PGOOD will be high impedance. Otherwise, the PGOOD output is connected to PGND. Thermal shutdown If the junction temperature of the device reaches the thermal shutdown limit of 160°C, the AP65355 shuts itself off, and both HMOS and LMOS will be turned off. The output is discharged with the internal transistor. When the junction cools to the required level (130°C nominal), the device initiates soft-start as during a normal power-up cycle. Setting the Output Voltage The output voltage can be adjusted from 1.000 to 5V using an external resistor divider. Table 1 shows a list of resistor selection for common output voltages. Resistor R1 is selected based on a design tradeoff between efficiency and output voltage accuracy. For high values of R1 there is less current consumption in the feedback network. However, the tradeoff is output voltage accuracy due to the bias current in the error amplifier. R1 can be determined by the following equation: V R1 R2 OUT 1 0.765 AP65355 Document number: DS37875 Rev. 1 - 2 10 of 15 www.diodes.com August 2015 © Diodes Incorporated AP65355 Application Information (cont.) Figure 5 Feedback Divider Network Output Voltage (V) R1 (kΩ) R3 (kΩ) 1 6.81 22.1 1.05 8.25 22.1 1.2 12.7 22.1 1.5 21.5 22.1 1.8 30.1 22.1 2.5 49.9 22.1 3.3 73.2 22.1 5 124 22.1 Table 1 Resistor Selection for Common Output Voltages Inductor Calculating the inductor value is a critical factor in designing a buck converter. For most designs, the following equation can be used to calculate the inductor value: L VOUT (VIN VOUT ) VIN ΔIL fSW Where ΔIL is the inductor ripple current and fSW is the buck converter switching frequency. Choose the inductor ripple current to be 30% of the maximum load current. The maximum inductor peak current is calculated from: IL(MAX) ILOAD ΔIL 2 Peak current determines the required saturation current rating, which influences the size of the inductor. Saturating the inductor decreases the converter efficiency while increasing the temperatures of the inductor and the internal MOSFETs. Hence choosing an inductor with an appropriate saturation current rating is important. A 1µH to 3.3µH inductor with a DC current rating of at least 25% higher than the maximum load current is recommended for most applications. For highest efficiency, the inductor’s DC resistance should be less than 100mΩ. Use a larger inductance for improved efficiency under light load conditions. The phase boost can be achieved by adding an additional feed forward capacitor (C10) in parallel with R1. Output Voltage (V) 1 1.05 1.2 1.5 1.8 2.5 3.3 5 C10(pF) — — — — 5-22 5-22 5-22 5-22 L1(µH) 1.0-1.5 1.0-1.5 1.0-1.5 1.5 1.5 2.2 2.2 3.3 C5+C9(µF) 22-68 22-68 22-68 22-68 22-68 22-68 22-68 22-68 Table 2 Recommended Component Selection Input Capacitor The input capacitor reduces the surge current drawn from the input supply and the switching noise from the device. The input capacitor has to sustain the ripple current produced during the on time on the upper MOSFET. It must have a low ESR to minimize the losses. The RMS current rating of the input capacitor is a critical parameter that must be higher than the RMS input current. As a rule of thumb, select an input capacitor which has RMs rating greater than half of the maximum load current. Due to large dI/dt through the input capacitors, electrolytic or ceramics should be used. If a tantalum must be used it must be surge protected, otherwise, capacitor failure could occur. For most applications greater than 10µF, ceramic capacitor is sufficient. AP65355 Document number: DS37875 Rev. 1 - 2 11 of 15 www.diodes.com August 2015 © Diodes Incorporated AP65355 Application Information (cont.) Output Capacitor The output capacitor keeps the output voltage ripple small, ensures feedback loop stability and reduces the overshoot of the output voltage. The output capacitor is a basic component for the fast response of the power supply. In fact, during load transient, for the first few microseconds, it supplies the current to the load. The converter recognizes the load transient and sets the duty cycle to maximum, but the current slope is limited by the inductor value. Maximum capacitance required can be calculated from the following equation: ESR of the output capacitor dominates the output voltage ripple. The amount of ripple can be calculated from the equation below: Vout capacitor ΔIinductor * ESR An output capacitor with ample capacitance and low ESR is the best option. For most applications, a 22µF to 68µF ceramic capacitor will be sufficient. ΔIinductor 2 ) 2 Co (Δ V Vout )2 Vout2 L(Iout Where ΔV is the maximum output voltage overshoot. Bootstrap Capacitor To ensure the proper operation, a ceramic capacitor must be connected between the VBST and SW pin. A 0.1µF ceramic capacitor is sufficient. VREG5 Capacitor To ensure the proper operation, a ceramic capacitor must be connected between the VREG5 and GND pin. A 1µF ceramic capacitor is sufficient. PC Board Layout 1. 2. 3. 4. 5. 6. 7. The AP65355 works at 3A load current, heat dissipation is a major concern in layout the PCB. A 2oz Copper in both top and bottom layer is recommended. Provide sufficient vias in the thermal exposed pad for heat dissipate to the bottom layer. Provide sufficient vias in the Output capacitor GND side to dissipate heat to the bottom layer. Make the bottom layer under the device as GND layer for heat dissipation. The GND layer should be as large as possible to provide better thermal effect. Make the Vin capacitors as close to the device as possible. Make the VREG5 capacitor as close to the device as possible. The thermal pad of the device should be soldered directly to the PCB exposed copper plane to work as a heatsink. The thermal vias in the exposed copper plane increase the heat transfer to the bottom layer. Figure 6 PC Board Layout AP65355 Document number: DS37875 Rev. 1 - 2 12 of 15 www.diodes.com August 2015 © Diodes Incorporated AP65355 Ordering Information AP65355 XX - 7 Package Packing FN : U-DFN3030-10 7 : Tape & Reel Part Number Package Code Package Identification Code AP65355FN-7 FN U-DFN3030-10 UJ Quantity Tape and Reel Part Number Suffix 3,000/Tape & Reel -7 Marking Information U-DFN3030-10 ( Top View ) XX Y WX Part Number AP65355FN-7 AP65355 Document number: DS37875 Rev. 1 - 2 XX : Identification Code Y : Year : 0~9 W : Week : A~Z : 1~26 week; a~z : 27~52 week; z represents 52 and 53 week X : Internal Code Package U-DFN3030-10 13 of 15 www.diodes.com Identification Code UJ August 2015 © Diodes Incorporated AP65355 Package Outline Dimensions (All dimensions in mm.) Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for the latest version. U-DFN3030-10 A3 U-DFN3030-10 Dim Min Max Typ A 0.57 0.63 0.60 A1 0 0.05 0.02 A3 0.15 b 0.20 0.30 0.25 D 2.90 3.10 3.00 D2 2.30 2.50 2.40 e 0.50 E 2.90 3.10 3.00 E2 1.50 1.70 1.60 L 0.25 0.55 0.40 z 0.375 All Dimensions in mm A SEATING PLANE A1 D D2 Pin#1 ID E E2 L z b e Suggested Pad Layout Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version. U-DFN3030-10 Y C X1 G X G Dimensions Value (in mm) Z 2.60 G 0.15 X 1.80 X1 0.60 Y 0.30 C 0.50 Z AP65355 Document number: DS37875 Rev. 1 - 2 14 of 15 www.diodes.com August 2015 © Diodes Incorporated AP65355 IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). 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