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MLX90255-BC
Linear Optical Array
Features and Benefits
128 x 1 Sensor-Element Organization (1 Not Connected, 1 dummy, 128 real, 1 dummy
and 1 Dark Pixel)
385 Dots-Per-Inch (DPI) Sensor Pitch
High Linearity and Uniformity for 256 Gray-Scale (8-Bit) Applications
High Sensitivity: 2.0V @ 10µW/cm² @ 0.7ms integration time for open cavity devices
1.7V @ 10µW/cm² @ 0.7ms integration time for glass lid devices
Special Gain Compensation for use with single LED light source
Output Referenced to Ground
Low Image Lag
Single 5V Supply
Replacement for TAOS, Inc. TSL1301 & TSL1401 and MLX90255BA
Operation to 800kHz
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Applications
Linear Position Encoder
Rotary Position Encoder
Steering Torque and Angle Sensing (EPAS, ESP)
Spectrometer Applications
Bio-metrical Applications
OCR and Barcode Applications
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Ordering Information
Part No.
MLX90255
MLX90255
MLX90255
Temperature Suffix
K (-40°C to 125°C)
K (-40°C to 125°C)
K (-40°C to 125°C)
Package Code
XA (SOIC-24 without glass)
WB (GLP-5 with glass)
UC (Die on wafer (un-sawn))
1. Functional Diagram
Pixel 2
2. Description
4
Pixel 132
Integrator Reset
3
Analog OUT
VDD
Pixel 1
Sample
Switching Logic
Hold
Q1
Q2
External
Load
Q132
1
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GND
SI
CLK
132-Bit Shift Register
2
Option code
-BCR
-BCM
-BCV
5
The MLX90255BC linear sensor array consists
of a 128 x 1 array of photodiodes, associated
charge amplifier circuitry and a pixel data-hold
function that provides simultaneous-integration
start and stop times for all pixels. The pixels
measure 200µm (H) by 66 µm (W). Operation is
simplified by internal control logic that requires
only a serial-input (SI) signal and a clock.
The sensor consists of 128 photodiodes
arranged in a linear array. Light energy falling on
a photodiode generates photocurrent, which is
integrated by the active integration circuitry
associated with that pixel. During the integration
period, a sampling capacitor connects to the
output of the integrator through an analog
switch. The amount of charge accumulated at
each pixel is directly proportional to the light
intensity and the integration time. The output
and reset of the integrators is controlled by a
132-bit shift register and reset logic. An output
cycle is initiated by clocking in a logic 1 on SI.
(continued on page 5)
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MLX90255-BC
Linear Optical Array
TABLE OF CONTENTS
FEATURES AND BENEFITS ....................................................................................................................... 1
APPLICATIONS............................................................................................................................................ 1
ORDERING INFORMATION......................................................................................................................... 1
1.
FUNCTIONAL DIAGRAM................................................................................................................... 1-1
2.
DESCRIPTION.................................................................................................................................... 2-1
3.
MLX90255BC ELECTRICAL SPECIFICATIONS ................................................................................ 3
4.
GENERAL DESCRIPTION .................................................................................................................... 5
5.
ABSOLUTE MAXIMUM RATINGS ....................................................................................................... 5
6.
COSINE CORRECTION ........................................................................................................................ 6
7.
PERFORMANCE GRAPHS................................................................................................................... 7
8. STANDARD INFORMATION REGARDING MANUFACTURABILITY OF MELEXIS PRODUCTS
WITH DIFFERENT SOLDERING PROCESSES .......................................................................................... 8
9.
ESD PRECAUTIONS............................................................................................................................. 8
10. PACKAGE INFORMATION................................................................................................................... 9
10.1.
10.2.
10.3.
10.4.
10.5.
MLX90255KXA-BCR (SOIC-24 WITHOUT GLASS) PACKAGE DIMENSIONS ..............................................9
XA (SOIC-24 WITHOUT GLASS) PIN DESCRIPTION ...................................................................................10
MLX90255KWB-BCM (GLP-5 WITH GLASS) PACKAGE DIMENSIONS ....................................................11
WB (GLP-5 WITH GLASS) PIN DESCRIPTION .............................................................................................12
MLX90255KUC-BCV (WAFER POLYIMIDE) ...........................................................................................13
11. DISCLAIMER ....................................................................................................................................... 14
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3. MLX90255BC Electrical Specifications
DC Operating Parameters TA = -40oC to 125oC, VDD = 4.5V to 5.5V (unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
Supply voltage
Vdd
4.5
Input voltage
Vi
High-level input voltage
Low-level input voltage
5
5.5
V
0
Vdd
V
Vih
Vdd*0.7
Vdd
V
Vil
0
Vdd*0.3
V
0.8
V
Hysteresis on SI and CLK
0.2
Wavelength of light source
400
1000
nm
Fclock
64
800
kHz
Sensor integration time below
60°C (1)
Tint
0.125
100
ms
Sensor integration time (full
temperature range) (2)
Tint
0.125
2
ms
Pixel charge transfer time (full
temp range)
Tqt
8
µs
Setup time, serial input
Tsu(SI)
350
ns
Hold time, serial input (3)
Th(SI)
160
ns
Ta
-40
Clock pulse duration (high)
Tw(H)
625
ns
Clock pulse duration (low)
Tw(L)
625
ns
Clock frequency
Operating free-air temperature
0.4
125
°C
Notes:
(1) Reset until clock pulse 18 (on declining flank).
Minimum integration time = (133-18) * CLK period + 10µs (this is the time the S&H cap needs to follow).
At 1MHz clock speed, the minimum integration time becomes 0.125ms.
(2) At 125°C, the integration time should be limited to 2ms.
(3) The SI pulse must go low before the rising edge of the next clock pulse.
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MLX90255-BC
Linear Optical Array
MLX90255BC Electrical specifications
All tests are made with 0.7ms integration time at 25°C at 880nm and with a clock speed of 500kHz in,
250kHz out, and 500kHz, unless otherwise specified in the Test Conditions. 100% light under Test
Conditions means that the light is set in such a way that there is 2.4V at the output of the chip.
Parameter
Symbol Test Conditions
Min
Typ
Max
Units
Sensitivity for devices with glas lid Sensitivity At 25°C
0.135
0.151
0.179
V/µW/
Sensitvity for open devices
0.14
0.16
0.19
cm2
Polyimide Wafer
0.14
0.176
0.21
Illumination (1)
Illum100 At 25°C, 2.4V at output
14
µW/cm²
Average analog output (1)
VaoLight At 25°C, 100% light
2.4
V
Average analog output
Average analog output
Highest Dark Pixel
Initial offset At 25°C, 0% light
VaoDark At 125°C, 0% light
0
0.15
0.3
V
0
0.40
1.4
V
0.8
V
Vaodarkmax At 125°C, 0.25ms integration time
Non Linearity
Nlao1
All Temp
±0.5%
±1.2%
FS
Pixel Response Non Uniformity (2)
PRNU
All Temp, 100% light
±4.0%
±8.5%
FS
Pixel Interaction Test (3)
PIT
AT 25°C
5%
Noise Level (4)
Vn
All Temp
3
6
mV (RMS)
±4.0%
±8.5%
FS
750
ns
Hold spec, same as PRNU
Output Settling Time
Array Lag (5)
Dark Signal Non Uniformity (6)
PRNUH
All Temp, 100% light, 62.5kHz
Ts
All Temp
450
Alag
At 25°C
0.5%
DSNU
At 25°C
80
120
mV
At 125°C
140
440
mV
Analog Output Saturation
All Temp
FS
3.0
Change in sensitivity with
Temperature at 880nm (7)
V
0.3
Operating Free Temp
Supply Current (8)
FS
-40
Idd
2
5
%/°C
125
°C
8
mA
(0) After power on, the first integration scan is not guaranteed correct. This scan is needed for initializing digital levels on chip. After a SI and 133 proper
CLK signals, the system is fully initialized and all further scans are valid. The next SI will provide a valid scan.
(1) Absolute Light measurements are very test-setup dependent and should be regarded with caution. Relative measurements are possible with ±1%
accuracy.
(2) PRNU is defined as the worst case deviation of any PixelValue (pixel 3 till 130) to the average light value. PixelValue = (Vout of a pixel at 100% light
– Vout of same pixel at 0% light) The MLX90255BC has a cosine shaped gain: external pixels have 15% more gain than middle pixels.
(3) PIT = (Vout of pixel 132 @ 10µW – Vout of pixel 132 @0µW) / (Vaverage @10µW – Vaverage @10µW)
(4) Noise: We compare 5 different measurements, normalize them and then take the RMS value.
(5) Array Lag is defined as: (Vaverage 0µW1 Vaverage 0µW2) / ((Vaverage 10µW Vaverage 0µW2). Where 0µW1 is a 0% light level, 1ms after a 100%
light level. (there can still be some light effects). 0µW2 is a 0% light level, 10ms after a 100% light level, which should be a true dark reference.
(6) DSNU is defined as: (max Vout of pixel I @ 0% light) - (min Vout of pixel j @ 0% light) for pixels 3 thru 130
(7) Sensitivity always increases with rising temperature.
(8) Idd is measured with Rload disconnected from the output pin.
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4. General Description
(continued from page 1)
This causes all 132 sampling capacitors to be
disconnected from their respective integrators
and starts an integrator reset period. As the SI
pulse is clocked through the shift register, the
charge stored on the sampling capacitors is
sequentially connected to a charge-coupled
output amplifier that generates a voltage on the
analog output AO. Two dummy pixel values are
shifted out first, then the 128 actual pixel bits,
followed by two additional dummy pixel bits, for
a total of 132 data bits. Although there are only
132 pixels, 133 clock pulses are necessary for a
complete shift out. The final pulse is used to reinitialize the shift register.
The integrator reset period ends 18 clock cycles
after the SI pulse is clocked in. So the lightintegration starts after the 18th CLK pulse. The
light-integration ends at the next SI pulse.
Between the end of the 133th clock pulse and the
next SI pulse, a minimum time of 10µs is
necessary for an effective S&H function. So the
minimum integration time of the MLX90255BC is
(133 -18) * Ts + 10µs and thus dependent on
clock speed. (Ts = clock period) After the 132
data bits are clocked out, the output becomes
high impedance. (see figure) The AO is driven
by a source follower that requires an external
pulldown resistor. (typically 330Ω) The output is
nominally 125mV for no light input and 2.4V for a
nominal full-scale output. The pixel gain is 15%
bigger at the edges than in the middle (cosine
correction) in order to get a flat output when
illuminating the device with a single LED light
source (see also Section 6).
optical linear and rotary encoding. The
MLX90255BC is a replacement for the Texas
Instruments' TSL1301 and TSL1401 parts.
5. Absolute Maximum Ratings
Supply Voltage, Vdd
+7V
Digital Input Current Range
-20 to 20 mA
Operating Free-Air temperature
range, Ta
-40°C to 125°C
(automotive compliant
optical package)
Storage temperature range,
Tstg
-40°C to 125°C
ESD Sensitivity (Human Body
Model according to CDF-AECQ100-002)
2kV
Stresses beyond those listed under "absolute
maximum ratings" may cause permanent
damage to the device.
These are stress ratings only, and functional
operation of the device at these or any other
conditions beyond those indicated under
"recommended operating conditions" is not
implied.
Exposure
to
absolute-maximum
-rated
conditions for extended periods may affect
device reliability.
The MLX90255BC is intended for use in a wide
variety of applications, including: image
scanning, mark and code reading, optical
character recognition (OCR) and contact
imaging, edge detection and positioning, and
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6. Cosine Correction
When using a single LED light source, which is placed above the middle of the die, the light intensity that
falls onto the outer pixels is lower than the light intensity that falls onto the middle pixels (due to the
distance die-LED, the shape of the LED light emission and the sensitivity of pixels vs. angle of incident
light). To compensate for these effects, each pixel in the array has a slightly different gain correction with
respect to the centre of the array. For a light source to photodiode array distance of 15mm the relative
pixels sensitivities are shown in the table below.
Pixel
number
Relative
Pixel
Sensitivity
Pixel
number
Relative
Pixel
Sensitivity
Pixel
number
Relative
Pixel
Sensitivity
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
1.1703
1.1649
1.1596
1.1544
1.1493
1.1442
1.1393
1.1345
1.1298
1.1251
1.1206
1.1161
1.1117
1.1074
1.1032
1.0991
1.0951
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
1.0912
1.0874
1.0836
1.0799
1.0764
1.0729
1.0695
1.0661
1.0629
1.0598
1.0567
1.0537
1.0508
1.0480
1.0453
1.0426
1.0400
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
1.0376
1.0352
1.0328
1.0306
1.0284
1.0263
1.0243
1.0224
1.0206
1.0188
1.0171
1.0155
1.0140
1.0126
1.0112
1.0099
1.0087
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
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115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
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Pixel
number
Relative
Pixel
Sensitivity
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
1.0076
1.0066
1.0056
1.0047
1.0039
1.0031
1.0025
1.0019
1.0014
1.0010
1.0006
1.0003
1.0002
1.0000
1.0000
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
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MLX90255-BC
Linear Optical Array
7. Performance Graphs
Typical Photodiode Spectral Response Curve (%), without Anti
Reflection Coating*
*There is also an option for an Anti Reflection Coating. This will remove the interference
ripples in the figure above. With this special Anti Reflection Coating, the sensitivity curve in
function of wavelength will be somewhat lower (typically 4%) but will no longer display
interference ripples.
MLX90255 Timing Diagram
High impedance
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Linear Optical Array
8. Standard information regarding manufacturability of Melexis
products with different soldering processes
Our products are classified and qualified regarding soldering technology, solderability and moisture
sensitivity level according to following test methods:
Reflow Soldering SMD’s (Surface Mount Devices)
•
•
IPC/JEDEC J-STD-020
Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices
(classification reflow profiles according to table 5-2)
EIA/JEDEC JESD22-A113
Preconditioning of Nonhermetic Surface Mount Devices Prior to Reliability Testing
(reflow profiles according to table 2)
Wave Soldering SMD’s (Surface Mount Devices) and THD’s (Through Hole Devices)
•
•
EN60749-20
Resistance of plastic- encapsulated SMD’s to combined effect of moisture and soldering heat
EIA/JEDEC JESD22-B106 and EN60749-15
Resistance to soldering temperature for through-hole mounted devices
Iron Soldering THD’s (Through Hole Devices)
•
EN60749-15
Resistance to soldering temperature for through-hole mounted devices
Solderability SMD’s (Surface Mount Devices) and THD’s (Through Hole Devices)
•
EIA/JEDEC JESD22-B102 and EN60749-21
Solderability
For all soldering technologies deviating from above mentioned standard conditions (regarding peak
temperature, temperature gradient, temperature profile etc) additional classification and qualification tests
have to be agreed upon with Melexis.
The application of Wave Soldering for SMD’s is allowed only after consulting Melexis regarding assurance
of adhesive strength between device and board.
Melexis is contributing to global environmental conservation by promoting lead free solutions. For more
information on qualifications of RoHS compliant products (RoHS = European directive on the Restriction
Of the use of certain Hazardous Substances) please visit the quality page on our website:
http://www.melexis.com/quality.asp
9. ESD Precautions
Electronic semiconductor products are sensitive to Electro Static Discharge (ESD).
Always observe Electro Static Discharge control procedures whenever handling semiconductor products.
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Linear Optical Array
10.
Package Information
10.1. MLX90255KXA-BCR (SOIC-24 without glass) package dimensions
A = 200um pixel height
B = 132 x 66um = 8712um, mid 128 pixels are usefull pixels
C = 3.53 +/- 0.13 (tolerance is indicated on the drawing as 0.26 in absolute deviation)
D = 4.92 +/- 0.13 (tolerance in again indicated on the drawing as 0.26 in absolute deviation)
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Linear Optical Array
10.2. XA (SOIC-24 without glass) Pin Description
Pin
Sym
bol
Description
5
SI
Serial Input. Si defines the start
of the data-out sequence
6
CLK
Clock. CLK controls the charge
transfer, pixel output and reset
(together with SI)
7
A0
Analog Output
8
Vdd
Supply voltage, for both analog
and digital circuits
3,4,9,10,
Vss
Ground (substrate). All Vss Pins
are referenced to the substrate.
15,16,21,22
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10.3. MLX90255KWB-BCM (GLP-5 with glass) package dimensions
1
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2
3
4
5
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Linear Optical Array
10.4. WB (GLP-5 with glass) Pin
Description
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Rev. 001
Pin
Symb
ol
Description
1
SI
Serial Input. Si defines the start of
the data-out sequence
2
CLK
Clock. CLK controls the charge
transfer, pixel output and reset
(together with SI)
3
A0
Analog Output
4
Vdd
Supply voltage, for both analog
and digital circuits
5
Vss
Ground (substrate). All Vss Pins
are referenced to the substrate.
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MLX90255-BC
Linear Optical Array
10.5. MLX90255KUC-BCV (Wafer Polyimide)
Die on wafer (unsawn) with polyimide passivation.
•
•
Advantages: Extra adhesion by polyimide layer
Disadvantages: The sensitivity of a wafer with polyimide layer is ~20% less than on a normal wafer
without this layer
Light Transmission Properties of Polyimide Layer
Method of Measurement:
• Testwafer with AlSiCu + Passivation Layer
• Measure of absolute Reflectance with NANOSPEC about maximal wavelength area
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Linear Optical Array
11.
Disclaimer
Devices sold by Melexis are covered by the warranty and patent indemnification provisions appearing in
its Term of Sale. Melexis makes no warranty, express, statutory, implied, or by description regarding the
information set forth herein or regarding the freedom of the described devices from patent infringement.
Melexis reserves the right to change specifications and prices at any time and without notice. Therefore,
prior to designing this product into a system, it is necessary to check with Melexis for current information.
This product is intended for use in normal commercial applications. Applications requiring extended
temperature range, unusual environmental requirements, or high reliability applications, such as military,
medical life-support or life-sustaining equipment are specifically not recommended without additional
processing by Melexis for each application.
The information furnished by Melexis is believed to be correct and accurate. However, Melexis shall not
be liable to recipient or any third party for any damages, including but not limited to personal injury,
property damage, loss of profits, loss of use, interrupt of business or indirect, special incidental or
consequential damages, of any kind, in connection with or arising out of the furnishing, performance or
use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow
out of Melexis’ rendering of technical or other services.
© 2005 Melexis NV. All rights reserved.
For the latest version of this document, go to our website at
www.melexis.com
Or for additional information contact Melexis Direct:
Europe, Africa, Asia:
Phone: +32 1367 0495
E-mail: [email protected]
America:
Phone: +1 603 223 2362
E-mail: [email protected]
ISO/TS 16949 and ISO14001 Certified
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