AP2182A 92A

AP2182A/ AP2192A
1.5A DUAL CHANNEL CURRENT-LIMITED POWER SWITCH
Description
Pin Assignments
The AP2182A and AP2192A are dual channel current-limited
( Top View )
integrated high-side power switches optimized for Universal Serial
Bus (USB) and other hot-swap applications. The family of devices
complies with USB standards and available with both polarities of
GND
1
8
FLG1
IN
2
7
OUT1
EN1 3
6
OUT2
EN2 4
5
FLG2
Enable input.
The devices have fast short-circuit response time for improved overall
system robustness, and have integrated output discharge function to
ensure completely controlled discharging of the output voltage
capacitor. They provide a complete protection solution for application
SO-8
subject to heavy capacitive loads and the prospect of short circuit,
and offer reverse current blocking, over-current, over-temperature
and short-circuit protection, as well as controlled rise time and under-
( Top View )
voltage lockout functionality. A 7ms deglitch capability on the opendrain Flag output prevents false over-current reporting and does not
require any external components.
GND
1
8
FLG1
IN
2
7
OUT1
OUT2
FLG2
All devices are available in SO-8, MSOP-8EP and U-DFN3030-8
EN1
3
6
packages.
EN2
4
5
MSOP-8EP
Features

( Top View )
Dual Channel Current-Limited Power Switch with Output
Discharge

Fast Short-Circuit Response Time: 2µs

2.0A Accurate Current Limiting

Reverse Current Blocking

GND
1
8
FLG1
IN
2
7
OUT1
85mΩ On-Resistance
EN1
3
6
OUT2

Input Voltage Range: 2.7V - 5.5V
EN2
4
5
FLG2

Built-In Soft-Start with 0.6ms Typical Rise Time

Short Circuit and Thermal Protection

Fault Report (FLG) with Blanking Time (7ms typ)

ESD protection: 2kV HBM, 300V MM

Active High (AP2192A) or Active Low (AP2182A) Enable

Ambient Temperature Range: -40°C to +85°C

SO-8, MSOP-8EP and DFN3030E-8 (Exposed Pad): Available
U-DFN3030-8
Applications
in “Green” Molding Compound (No Br, Sb)

Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)

Halogen and Antimony Free. “Green” Device (Note 3)

UL Recognized, File Number E322375

IEC60950-1 CB Scheme Certified
Notes:

LCD TVs & Monitors

Set-Top-Boxes, Residential Gateways

Laptops, Desktops, Servers,

Printers, Docking Stations, HUBs
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green"
and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
AP2182A/ AP2192A
Document number: DS32193 Rev. 3 - 2
1 of 16
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March 2013
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AP2182A/ AP2192A
Typical Applications Circuit
AP 2192 A Enable Active High
Power Supply
2.7V to 5.5V
IN
10k
OUT1
10uF*
1uF
10uF*
1uF
10k
FLG 1
FLG 2
ON
OFF
Load
1uF
EN1
EN2
OUT2
Load
GND
Note: * USB 2.0 requires 120uF per hub
Available Options
Current Limit
(typ)
2.0A
Recommended Maximum
Continuous Load Current
2
Enable Pin
(EN)
Active Low
2
Active High
2.0A
1.5A
Part Number
Channel
AP2182A
AP2192A
1.5A
Pin Descriptions
Pin Name
Pin Number
MSOP-8EP
SO-8
U-DFN3030-8
GND
IN
EN1
EN2
FLG2
OUT2
1
2
3
4
5
6
1
2
3
4
5
6
OUT1
FLG1
7
8
7
8
Exposed Pad
—
Function
Ground
Voltage input pin
Switch 1 enable input, active low (AP2142A) or active high (AP2152A)
Switch 2 enable input, active low (AP2142A) or active high (AP2152A)
Switch 2 over-current and over-temperature fault report; open-drain flag is active low when triggered
Switch 2 voltage output pin
Switch 1 voltage output pin
Switch 1 over-current and over-temperature fault report; open-drain flag is active low when triggered
Exposed Pad:
Exposed Pad It should be connected to GND and thermal mass for enhanced thermal impedance.
It should not be used as electrical ground conduction path.
AP2182A/ AP2192A
Document number: DS32193 Rev. 3 - 2
2 of 16
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AP2182A/ AP2192A
Functional Block Diagram
AP2182A, AP2192A
FLG 1
T h e rm a l
S ense
D e g litc h
EN1
C u rre n t
L im it
D riv e r
GND
U VLO
C u rre n t
S ense
O UT1
D is c h a rg e
C o n tro l
IN
C u rre n t
S ense
D is c h a rg e
C o n tro l
U VLO
FLG 2
C u rre n t
L im it
D riv e r
EN2
O UT2
D e g litc h
T h e rm a l
S ense
GND
Absolute Maximum Ratings (@TA = +25°C, unless otherwise specified.)
Symbol
ESD HBM
Parameter
Human Body Model ESD Protection
ESD MM
VIN
Unit
kV
Machine Model ESD Protection
300
V
Input Voltage
6.5
V
VOUT
Output Voltage
VIN +0.3
V
VEN , VFLG
Enable Voltage
6.5
V
Internal Limited
A
150
°C
-65 to +150
°C
Maximum Continuous Load Current
ILOAD
Maximum Junction Temperature
TJ(MAX)
Storage Temperature Range (Note 4)
TST
Note:
Ratings
2
4. UL Recognized Rating from -30°C to +70°C (Diodes qualified TST from -65°C to +150°C)
Recommended Operating Conditions (@TA = +25°C, unless otherwise specified.)
Symbol
Parameter
Min
Max
Unit
2.7
5.5
V
Output Current
0
1.5
A
VIH
High-Level Input Voltage on EN or EN
2
VIN
V
VIL
Low-Level Input Voltage on EN or EN
TA
Operating Ambient Temperature Range
VIN
Input Voltage
IOUT
AP2182A/ AP2192A
Document number: DS32193 Rev. 3 - 2
3 of 16
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0
0.8
V
-40
+85
°C
March 2013
© Diodes Incorporated
AP2182A/ AP2192A
Electrical Characteristics (@TA = +25°C, VIN = +5.0V, unless otherwise specified.)
Symbol
Parameter
VUVLO
Input UVLO
ISHDN
Input Shutdown Current
Input Quiescent Current, Dual
IQ
Test Conditions (Note 5)
Min
Typ
Max
1.6
2.0
2.4
V
Disabled, IOUT = 0
0.1
1
µA
Enabled, IOUT = 0
115
180
µA
1
µA
0.01
0.1
µA
90
110
85
105
ILEAK
Input Leakage Current
Disabled, OUT grounded
IREV
Reverse Leakage Current
Disabled, VIN = 0V, VOUT = 5V, IREV at VIN
VIN = 5V, IOUT = 1.5A,
TA = +25°C
RDS(ON)
Switch On-Resistance
SO-8
MSOP-8EP,
U-DFN3030-8
VIN = 5V, IOUT = 1.5A, -40°C ≤ TA ≤ +85°C
VIN = 3.3V, IOUT = 1.5A,
TA = +25°C
135
SO-8
MSOP-8EP,
U-DFN3030-8
110
130
105
125
VIN = 3.3V, IOUT = 1.5A, -40°C ≤ TA ≤ +85°C
ILIMIT
ILIMIT_G
Unit
mΩ
170
Over-Load Current Limit
VIN = 5V, VOUT = 4V, CL = 10µF
-40°C ≤ TA ≤ +85°C
1.6
2.0
2.4
A
Ganged Over-Load Current Limit
VIN = 5V, VOUT = 4.6V, OUT1 &
OUT2 tied together, CL = 10µF
-40°C ≤ TA ≤ +85°C
3.2
4.0
4.8
A
Current Limiting Trigger Threshold
Output Current Slew rate (<100A/s), CL = 10µF
2.5
A
ITrig_G
Ganged Current Limiting Trigger
Threshold
OUT1 & OUT2 tied together, Output Current Slew rate
(<100A/s), CL = 10µF
5.0
A
IOS
Short-Circuit Current per Channel
OUTx connected to ground, device enabled into short
circuit, CL = 10µF
2.0
A
IOS_G
Ganged Short-Circuit Current
OUT1 & OUT2 connected to ground, device enabled into
short-circuit, CL = 10µF
TSHORT
Short-Circuit Response Time
VOUT = 0V to IOUT = ILIMIT (output shorted to ground)
VIL
EN Input Logic Low Voltage
VIN = 2.7V to 5.5V
VIH
EN Input Logic High Voltage
VIN = 2.7V to 5.5V
EN Input Leakage
VEN = 0V to 5.5V
ITrig
ISINK
4.0
4.8
2
A
µs
0.8
2
V
V
1
µA
0.5
1
µA
CL = 1µF, RLOAD = 5Ω
0.6
1.5
ms
CL = 1µF, RLOAD = 5Ω
0.05
0.3
ms
Output Turn-On Delay Time
CL = 100µF, RLOAD = 5Ω
0.2
0.5
ms
ms
Output Leakage Current
Disabled, VOUT = 0V
TR
Output Turn-On Rise Time
TF
Output Turn-Off Fall Time
TD(ON)
TD(OFF)
ILEAK-O
3.2
Output Turn-Off Delay Time
CL = 100µF, RLOAD = 5Ω
0.1
0.3
RFLG
FLG Output FET On-Resistance
IFLG = 10mA
20
40
Ω
IFOH
FLG Off Current
VFLG = 5V
0.01
1
µA
TBlank
FLG Blanking Time
CL = 10µF
7
15
ms
4
RDIS
Discharge Resistance (Note 6)
VIN = 5V, disabled, IOUT =1mA
100
Ω
TSHDN
Thermal Shutdown Threshold
Enabled, RLOAD =1kΩ
140
C
THYS
Thermal Shutdown Hysteresis
25
C
SO-8 (Note 7)
115
θJA
Notes:
Thermal Resistance Junction-to-Ambient MSOP-8EP (Note 8)
U-DFN3030-8 (Note 8)
75
60
°C/W
5. Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
6. The discharge function is active when the device is disabled (when enable is de-asserted or during power-up / power-down when VIN < VUVLO). The
discharge function offers a resistive discharge path for the external storage capacitor for limited time.
7. Test condition for SO-8: Device mounted on FR-4 substrate PCB with minimum recommended pad layout.
8. Test condition for MSOP-8EP and U-DFN3030-8: Device mounted on 2” x 2” FR-4 substrate PCB, 2oz copper, with minimum recommended pad on top
layer and thermal vias to bottom layer ground plane.
AP2182A/ AP2192A
Document number: DS32193 Rev. 3 - 2
4 of 16
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March 2013
© Diodes Incorporated
AP2182A/ AP2192A
Typical Performance Characteristics
VEN
50%
TD(ON)
TF
TD(ON)
90%
10%
TD(OFF)
TR
TF
90%
50%
50%
TD(OFF)
TR
VOUT
VEN
50%
VOUT
10%
90%
10%
90%
10%
Figure 1. Voltage Waveforms: AP2182A (left), AP2192A (right)
Figure 2. Response Time to Short Circuit Waveform
All Enable Plots are for AP2182A Active Low
Turn-On Delay and Rise Time
Turn-Off Delay and Fall Time
EN
5V/div
EN
5V/div
CL=1F
Iin
500mA/div
TA= +25°C
Iin
500mA/div
RL=5Ω
CL=1F
Vout
2V/div
TA= +25°C
RL=5Ω
Vout
2V/div
500µs/div
AP2182A/ AP2192A
Document number: DS32193 Rev. 3 - 2
500µs/div
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AP2182A/ AP2192A
Typical Performance Characteristics (cont.)
Turn-Off Delay and Fall Time
Turn-On Delay and Rise Time
EN
5V/div
EN
5V/div
CL=100F
TA= +25°C
Iin
500mA/div
Iin
500mA/div
RL=5Ω
Vout
2V/div
Vout
2V/div
CL=100F
TA= +25°C
RL=5Ω
500us/div
500us/div
Short Circuit Current,
Device Enabled Into Short
Inrush Current with
Different Load Capacitance
EN
5V/div
EN
5V/div
CL=100F
Iout
500mA/div
CL=220F
CL=470F
Iin
500mA/div
VIN=5V
VIN=5V
TA= +25°C
TA= +25°C
CL=1F
RL=3Ω
500us/div
500us/div
1 Ω Load Connected to Enabled Device
0.6 Ω Load Connected to Enabled Device
VIN=5V
VIN=5V
TA= +25°C
TA= +25°C
CL=1F
CL=1F
FLG
2V/div
FLG
2V/div
Iout
1A/div
Iout
1A/div
2ms/div
AP2182A/ AP2192A
Document number: DS32193 Rev. 3 - 2
2ms/div
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AP2182A/ AP2192A
Typical Performance Characteristics (cont.)
Short Circuit with Blanking Time and Recovery
Power On
FLG
5V/div
Vout
5V/div
TA= +25°C
CL=1F
Iout
500mA/div
FLG
5V/div
RL=3Ω
VIN=5V
TA= +25°C
Vin
5V/div
CL=1F
Iout
1A/div
Vout
5V/div
20ms/div
1ms/div
Power Off
FLG
5V/div
Device Enabled
TA= +25°C
CL=1F
FLG
5V/div
RL=3Ω
Iout
500mA/div
Iout
500mA/div
Vin
5V/div
EN
5V/div
Vout
5V/div
Vout
5V/div
TA= +25°C
CL=1F
RL=3Ω
10ms/div
1ms/div
Device Disabled
UVLO Increasing
FLG
5V/div
TA= +25°C
Iout
500mA/div
Vin
2V/div
CL=1F
RL=3Ω
Vout
5V/div
EN
5V/div
Iout
1A/div
Vout
5V/div
TA= +25°C
CL=1F
RL=3Ω
1ms/div
AP2182A/ AP2192A
Document number: DS32193 Rev. 3 - 2
1ms/div
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AP2182A/ AP2192A
Typical Performance Characteristics (cont.)
UVLO Decreasing
UVLO Increasing (No Load)
TA= +25°C
CL=1F
Vin
2V/div
Vin
2V/div
RL=3Ω
Vout
5V/div
Vout
5V/div
Iout
1A/div
TA= +25°C
CL=1F
RL=0Ω
10ms/div
1ms/div
UVLO Decreasing (No Load)
Channel 1 Enabled and Shorted
with Channel 2 Enabled
VIN=5V
TA= +25°C
CL=1F
Vin
2V/div
RL=0Ω
TA= +25°C
CL=1F
Vout1
5V/div
FLG1
5V/div
Vout2
5V/div
Vout
5V/div
FLG2
5V/div
20ms/div
5ms/div
Channel 2 Enabled and Shorted
with Channel 1 Enabled
Channels 1 and 2 Enabled and
Shorted
Vout1
5V/div
FLG1
5V/div
VIN=5V
TA=25°C
CL=1F
Vout2
5V/div
FLG2
5V/div
5ms/div
5ms/div
AP2182A/ AP2192A
Document number: DS32193 Rev. 3 - 2
8 of 16
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AP2182A/ AP2192A
Typical Performance Characteristics (cont.)
CL=100uF
CL=100uF
RL=5Ω
RL=5Ω
TA=25°C
TA=25°C
CL=1uF
RL=5Ω
TA=25°C
CL=1uF
RL=5Ω
TA=25°C
Vin=5.0V
Vin=5.0V
Vin=5.5V
Vin=5.5V
Vin=2.7V
AP2182A/ AP2192A
Document number: DS32193 Rev. 3 - 2
Vin=2.7V
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AP2182A/ AP2192A
Typical Performance Characteristics (cont.)
Vin=3.3V
Vin=3.3V
Vin=5V
Vin=5V
CL=1µF
UVLO Rising
UVLO Falling
VIN=5V
VOUT=4V
CL=1µF
VIN=5V
TA= +25°C
CL=1µF
TA= +25°C
CL=1µF
AP2182A/ AP2192A
Document number: DS32193 Rev. 3 - 2
10 of 16
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AP2182A/ AP2192A
Application Information
Power Supply Considerations
A 0.1μF to 1μF X7R or X5R ceramic bypass capacitor between IN and GND, close to the device, is recommended. Placing a high-value electrolytic
capacitor on the input and output pin(s) is recommended when the output load is heavy. This precaution reduces power-supply transients that may
cause ringing on the input. Additionally, bypassing the output with a 1μF ceramic capacitor improves the immunity of the device to short-circuit
transients.
Over-Current and Short Circuit Protection
An internal sensing FET is employed to check for over-current conditions. Unlike current-sense resistors, sense FETs do not increase the series
resistance of the current path. When an overcurrent condition is detected, the device maintains a constant output current and reduces the output
voltage accordingly. Complete shutdown occurs only if the fault stays long enough to activate thermal limiting.
Three possible overload conditions can occur. In the first condition, the output has been shorted to GND before the device is enabled or before VIN
has been applied. The AP2182A/AP2192A senses the short circuit and immediately clamps output current to a certain safe level namely ILIMIT.
In the second condition, an output short or an overload occurs while the device is enabled. At the instance the overload occurs, higher inrush
current may flow for a very short period of time before the current limit function can react. The input capacitor(s) rapidly discharge through the
device, activating current limit circuitry. Protection is achieved by momentarily opening the P-MOS high-side power switch and then gradually
turning it on. After the current limit function has tripped (reached the over-current trip threshold), the device switches into current limiting mode and
the current is clamped at ILIMIT. The threshold for activating current limiting is 2A typical per channel.
In the third condition, the load has been gradually increased beyond the recommended operating current. The current is permitted to rise until the
current-limit threshold (ITRIG) is reached or until the thermal limit of the device is exceeded. The AP2182A/AP2192A is capable of delivering current
up to the current-limit threshold without damaging the device. Once the threshold has been reached, the device switches into its current limiting
mode and is set at ILIMIT.
FLG Response
When an over-current or over-temperature shutdown condition is encountered, the FLG open-drain output goes active low after a nominal 7-ms
deglitch timeout. The FLG output remains low until both over-current and over-temperature conditions are removed. Connecting a heavy capacitive
load to the output of the device can cause a momentary over-current condition, which does not trigger the FLG due to the 7-ms deglitch timeout.
The AP2182A/AP2192A is designed to eliminate false over-current reporting without the need of external components to remove unwanted pulses.
Power Dissipation and Junction Temperature
The low on-resistance of the internal MOSFET allows the small surface-mount packages to pass large current. Using the maximum operating
ambient temperature (TA) and RDS(ON), the power dissipation can be calculated by:
2
PD = RDS(ON)× I
Finally, calculate the junction temperature:
TJ = PD x RJA + TA
Where:
TA = Ambient temperature C
RθJA = Thermal resistance
PD = Total power dissipation
Thermal Protection
Thermal protection prevents the IC from damage when heavy-overload or short-circuit faults are present for extended periods of time. The
AP2182A/AP2192A implements a thermal sensing to monitor the operating junction temperature of the power distribution switch. Once the die
temperature rises to approximately 140°C due to excessive power dissipation in an over-current or short-circuit condition the internal thermal sense
circuitry turns the power switch off, thus preventing the power switch from damage. Hysteresis is built into the thermal sense circuit allowing the
device to cool down approximately 25°C before the switch turns back on. The switch continues to cycle in this manner until the load fault or input
power is removed. The FLG open-drain output is asserted when an over-temperature shutdown or over-current occurs with 7-ms deglitch.
AP2182A/ AP2192A
Document number: DS32193 Rev. 3 - 2
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AP2182A/ AP2192A
Application Information (cont.)
Under-Voltage Lockout (UVLO)
Under-voltage lockout function (UVLO) keeps the internal power switch from being turned on until the power supply has reached at least 2V, even if
the switch is enabled. Whenever the input voltage falls below approximately 2V, the power switch is quickly turned off. This facilitates the design of
hot-insertion systems where it is not possible to turn off the power switch before input power is removed.
Discharge Function
The discharge function of the device is active when enable is disabled or de-asserted. The discharge function with the N-MOS power switch
implementation is activated and offers a resistive discharge path for the external storage capacitor. This is designed for discharging any residue of
the output voltage when either no external output resistance or load resistance is present at the output.
Host/Self-Powered HUBs
Hosts and self-powered hubs (SPH) have a local power supply that powers the embedded functions and the downstream ports. This power supply
must provide from 5.25V to 4.75V to the board side of the downstream connection under both full-load and no-load conditions. Hosts and SPHs are
required to have current-limit protection and must report over-current conditions to the USB controller. Typical SPHs are desktop PCs, monitors,
printers, and stand-alone hubs.
Generic Hot-Plug Applications
In many applications it may be necessary to remove modules or pc boards while the main unit is still operating. These are considered hot-plug
applications. Such implementations require the control of current surges seen by the main power supply and the card being inserted. The most
effective way to control these surges is to limit and slowly ramp the current and voltage being applied to the card, similar to the way in which a
power supply normally turns on. Due to the controlled rise times and fall times of the AP2182A/AP2192A, these devices can be used to provide a
softer start-up to devices being hot-plugged into a powered system. The UVLO feature of the AP2182A/AP2192A also ensures that the switch is off
after the card has been removed, and that the switch is off during the next insertion.
By placing the AP2182A/AP2192A between the VCC input and the rest of the circuitry, the input power reaches these devices first after insertion.
The typical rise time of the switch is approximately 1ms, providing a slow voltage ramp at the output of the device. This implementation controls
system surge current and provides a hot-plugging mechanism for any device.
Ordering Information
Part Number
Package
Code
Packaging
AP21X2ASG-13
AP21X2AMPG-13
S
MP
SO-8
MSOP-8EP
AP21X2AFGEG-7
FGE
U-DFN3030-8
AP2182A/ AP2192A
Document number: DS32193 Rev. 3 - 2
7”/13” Tape and Reel
Quantity
Part Number Suffix
250/Tape & Reel
-13
2500/Tape & Reel
-13
3000/Tape & Reel
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AP2182A/ AP2192A
Marking Information
(1)
SO-8
( Top view )
8
7
6
5
2 : 2 Channel
YY : Year : 08, 09,10~
WW : Week : 01~52; 52
represents 52 and 53 week
X : Internal Code
G : Green
Logo
Part Number
8 : Active Low
9 : Active High
AP21X X A
YY WW X X
1
(2)
MSOP-8EP
(3)
U-DFN3030-8
2
3
4
( Top View )
XX
YW X
XX : Identification Code
Y : Year : 0~9
W : Week : A~Z : 1~26 week;
a~z : 27~52 week; z represents
52 and 53 week
X : A~Z : Green
Part Number
Package
Identification Code
AP2182AFGEG-7
AP2192AFGEG-7
U-DFN3030-8
U-DFN3030-8
AA
AB
AP2182A/ AP2192A
Document number: DS32193 Rev. 3 - 2
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© Diodes Incorporated
AP2182A/ AP2192A
Package Outline Dimensions (All dimensions in mm.)
Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for latest version.
0.254
(1) Package Type: SO-8
E1 E
Gauge Plane
Seating Plane
A1
L
Detail ‘A’
7°~9°
h
45°
Detail ‘A’
A2 A A3
b
e
SO-8
Dim
Min
Max
A
1.75
A1
0.10
0.20
A2
1.30
1.50
A3
0.15
0.25
b
0.3
0.5
D
4.85
4.95
E
5.90
6.10
E1
3.85
3.95
e
1.27 Typ
h
0.35
L
0.62
0.82
0
8

All Dimensions in mm
D
(2)
Package Type: MSOP-8EP
D
4X
10
°
0.25
D1
x
E
E2
Gauge Plane
Seating Plane
a
y
1
4X
10
°
8Xb
e
Detail C
E3
A1
L
A3
c
A2
A
D
E1
See Detail C
(3)
MSOP-8EP
Dim Min Max Typ
A
1.10
A1
0.05 0.15 0.10
A2
0.75 0.95 0.86
A3
0.29 0.49 0.39
b
0.22 0.38 0.30
c
0.08 0.23 0.15
D
2.90 3.10 3.00
D1
1.60 2.00 1.80
E
4.70 5.10 4.90
E1
2.90 3.10 3.00
E2
1.30 1.70 1.50
E3
2.85 3.05 2.95
e
0.65
L
0.40 0.80 0.60
a
0°
8°
4°
x
0.750
y
0.750
All Dimensions in mm
Package Type: U-DFN3030-8
U-DFN3030-8
Type E
Dim Min Max Typ
A
0.57 0.63 0.60
A1
0
0.05 0.02
A3
0.15


b
0.20 0.30 0.25
D
2.95 3.05 3.00
D2 2.15 2.35 2.25
E
2.95 3.05 3.00
e
0.65


E2 1.40 1.60 1.50
L
0.30 0.60 0.45
Z
0.40


All Dimensions in mm
A
A3
A1
D
D2
L (x8)
E
E2
Z (x4)
AP2182A/ AP2192A
Document number: DS32193 Rev. 3 - 2
e
b (x8)
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© Diodes Incorporated
AP2182A/ AP2192A
Suggested Pad Layout
Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version.
(1) Package Type: SO-8
X
Dimensions
X
Y
C1
C2
C1
Value (in mm)
0.60
1.55
5.4
1.27
C2
Y
(2)
Package Type: MSOP-8EP
X
C
Y
G
Y2
Dimensions
C
G
X
X1
Y
Y1
Y2
Y1
X1
(3)
Value
(in mm)
0.650
0.450
0.450
2.000
1.350
1.700
5.300
Package Type: U-DFN3030-8
X (x8)
C
Y
(x8)
Y1
Dimensions
C
C1
X
Y
Y1
Y2
Y2
Value (in mm)
0.65
2.35
0.30
0.65
1.60
2.75
C1
AP2182A/ AP2192A
Document number: DS32193 Rev. 3 - 2
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© Diodes Incorporated
AP2182A/ AP2192A
IMPORTANT NOTICE
DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
(AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).
Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes
without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the
application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or
trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume
all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated
website, harmless against all damages.
Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel.
Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and
hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or
indirectly, any claim of personal injury or death associated with such unintended or unauthorized application.
Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings
noted herein may also be covered by one or more United States, international or foreign trademarks.
This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the
final and determinative format released by Diodes Incorporated.
LIFE SUPPORT
Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express
written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:
A. Life support devices or systems are devices or systems which:
1. are intended to implant into the body, or
2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the
labeling can be reasonably expected to result in significant injury to the user.
B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the
failure of the life support device or to affect its safety or effectiveness.
Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any
use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related
information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its
representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems.
Copyright © 2013, Diodes Incorporated
www.diodes.com
AP2182A/ AP2192A
Document number: DS32193 Rev. 3 - 2
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March 2013
© Diodes Incorporated
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