MLX90609 AN4
Digital output of the MLX90609
Digital output of the MLX90609
Application Note 4
MLX90609 AN1
Rev 1.0
Page 1 of 13
October 2008
MLX90609 AN4
Digital output of the MLX90609
TABLE OF CONTENTS
1. Introduction ............................................................................................................... 3
2. MLX90609 digital output: principle of operation .................................................... 3
3. SPI commands of the ADC control.......................................................................... 5
•
Command of the Status Reading (STATR)................................................................6
•
Command of the ADC Control (ADCC)......................................................................6
•
Command of the ADC Reading (ADCR) ....................................................................6
•
Refusal answer ...........................................................................................................6
4. How to work with the ADC ....................................................................................... 7
•
Digital data acquisition based on polling..................................................................7
•
Digital data acquisition based on delays ................................................................11
5. Disclaimer................................................................................................................ 13
GLOSSARY OF TERMS
ADC – Analog-to-Digital Converter;
CLK – Clock;
DSP – Digital Signal Processor;
GPIO – General Purpose I/O port;
I/O – Input/Output;
LSB – Least Significant Bit;
MISO – Master In, Slave Out;
MOSI – Master Out, Slave In;
MSB – Most Significant Bit;
NSS – Not Slave Select;
SCK – Serial Clock;
SPI – Serial Peripheral Interface;
SYSCLK – System Clock;
µC – Microcontroller.
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Digital output of the MLX90609
1. Introduction
This Application note explains an operation principle of the MLX90609 internal ADC controlled by
the SPI logic. It includes some hints and SW examples written in ‘C’ easing the use of the
MLX90609 digital output. All examples are compatible with the Keil Cx51TM compiler.
2. MLX90609 digital output: principle of operation
The MLX90609 digital output is based on the 2 channel 11-bit successive-approximation analog-todigital converter (ADC). The main channel 0 is used to digitize the voltage on the angular rate
output (OUTAR-pin). The channel 1 can be used to digitize the output of the internal temperature
sensor (OUTTEMP-pin).
Figure 1: Block diagram of the MLX90609 ADC.
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Digital output of the MLX90609
The ADC includes a 2-channel multiplexer, sample-and-hold circuit (S/H), an 11-bit successiveapproximation register (SAR), digital-to-analog converter (DAC), and an analog comparator
(COMP).
The SAR generates a sequence of the 11-bit codes that supply the DAC to approach the input
signal stored in the S/H-capacitor. The SAR also includes logic that controls the S/H-circuit and
generates End of Conversion signal (EOC). The multiplexer is controlled by the bit CHAN defined
by the ADCC-command of the SPI. It connects the 3/4 of the OUTAR-voltage (CHAN=0) or the
whole OUTTEMP-voltage (CHAN=1) to the S/H circuit. The COMP provides a feedback that is
used by the SAR to define an approximation direction during conversion. The 11-bit code
generated at the last approximation stage is a conversion result that can be read as as a serial data
stream of the SPI.
A conversion is initiated by the ADCC SPI command. This command turns the ADC on (bit
ADEN=1), sets a necessary channel (bit CHAN) and starts a conversion. To read a status of the
conversion the ADCR or STATR commands can be used. The result can be read in the answer of
the command ADCR, as soon as the conversion is completed.
The conversion formulas below reflect the typical ADC behaviour and can be used to evaluate the
voltage on the OUTAR and OUTTEMP pins:
VOUTAR ( mV ) =
25
ADCcode + 400 (1)
12
VOUTTEMP (mV ) =
25
ADCcode + 300 (2)
16
The ADCcode represents the 11-bit result of the AD-conversion.
NOTE:
1. After a power-up the ADC is in a sleep mode. It's recommended to use an initial
dummy conversion first, before using the ADC for data acquisition. After conversions
the ADC can be put in the sleep mode again. As the ADC consumes about 0.25 mA,
this value can be saved in the sleep mode.
2. In order to minimize a current through the input resistors one can keep inputs SCLK
and SS in the high level and MOSI in the low level while SPI is not used. By this way
approximately 0.25 mA of the total current consumption can be saved.
WARNING:
Do not overload output OUTAR. According to the MLX90609 Data Sheet the OUTAR
load has to be more than 200 kΩ. The OUTAR overload causes additional output
nonlinearity.
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Digital output of the MLX90609
3. SPI commands of the ADC control
The MLX90609 communication interface is compatible with a standard SPI based on the four lines:
MOSI, MISO, SS (or NSS) and SCLK (or SCK). It always operates in a slave mode. A mode of the
SPI clock polarity and phase is fixed: CPHA=1, CPOL=1. Please see the MLX90609 Data Sheet for
the SPI timing characteristics and other details.
There are three SPI commands that are used to control the MLX90609 ADC: STATR, ADCC and
ADCR. Each of these commands includes 8-bit instruction and 16-bit answer. The instruction is
serially transmitted to the MLX90609 via MOSI-line. Afterwards the answer can be serially received
via MISO-line. Most Significant Bit (MSB) is the first bit transmitted and received. Signal SCLK is a
serial clock generated by master device. It initializes any transmission and receiving and provides
data synchronization. SS -line has to be in zero state while SPI is active. The answer can be
truncated or completely cancelled by applying a high level to the SS -line.
The table below gives a description of the bits used for the ADC handling:
ADEN
The ADEN bit selects the power management mode of the ADC:
ADEN=0: ADC is switched to the sleep mode, no AD-conversion is allowed.
ADEN=1: AD-conversion is allowed.
This bit is set by the ADCC-command. After power-up bit ADEN is cleared.
BUSY
This bit is set after reset during an initialization procedure of the MLX90609. It goes down after
a successful completion of the procedure. While BUSY=1, only refusal answers will be sent.
CHAN
The CHAN bit is used to select the input source for the ADC.
CHAN=0: the angular rate channel.
CHAN=1: the temperature sensor channel.
This bit is set by the ADCC-command. After power-up bit CHAN is cleared.
EOC
End of AD-conversion bit. EOC bit indicates an ADC state.
EOC=0 : ADC in progress and can not be restarted, result is not still valid.
EOC=1 : AD-conversion has been completed and can be restarted.
Any attempt of starting the ADC will be rejected by a refusal answer if EOC=0.
OPC
Unknown Operation Code. This bit is set when a received operation code was not recognized.
X
These bits are reserved or have an undefined state.
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Command of the Status Reading (STATR)
•
STATR instruction:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1
0
0
0
1
0
0
0
STATR answer:
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
X
EOC
X
X
X
X
X
X
X
X
X
CHAN
ADEN
X
X
Command of the ADC Control (ADCC)
•
ADCC instruction:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1
0
0
1
CHAN
ADEN
0
0
ADCC answer:
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
X
EOC
X
X
X
X
X
X
X
X
X
CHAN
ADEN
X
X
Command of the ADC Reading (ADCR)
•
ADCR instruction:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1
0
0
0
0
0
0
0
ADCR answer:
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
X
EOC
X
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
0
AD10…AD0
A result of the AD-conversion. These bits are valid only when EOC bit is set.
Refusal answer
•
If the MLX90609 is not able to accept the instruction a refusal answer will be transmitted out. This
answer has a unique format: the MSB is set. The other bits help to determine a possible reason for
the instruction rejection:
Refusal answer:
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1
OPC
EOC
X
X
BUSY
X
X
X
X
X
X
X
X
X
X
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Digital output of the MLX90609
4. How to work with the ADC
The general sequence of the ADC handling is like follows:
Step A: Put the ADC to the active mode if it is not
Step B: Start a new conversion
Step C: Wait the end of the conversion
Step D: Result reading
Step E: Go to the Step B or put the ADC to the sleep mode if it is necessary
This section describes two ways to implement the above sequence. The first one is based on
polling while the second way uses delays. The polling or/and delays are needed to ensure a
previous conversion is finished before a new conversion (ADCC-command) and before reading the
result (ADCR-command).
•
Digital data acquisition based on polling
This approach doesn’t require using of an external timer and a crystal oscillator because the end of
conversion is defined by the polling of the MLX90609. On the other hand the polling needs a high
use of the MLX90609 SPI and hence additional output noise can be created by the digital signals
on the SPI-lines. Also polling doesn't provide periodicity of the data acquisition that can be desired
for the next processing of data.
The digital data acquisition algorithm includes three polling procedures. This is shown on the right
flow chart in figure 2, stages 2, 4 and 5. The two polling procedures based either on the ADCC or
on the ADCR command are shown in the two left flow charts on the left of figure . Both include a
loop that is built on the checking of the 15th and 13th (EOC) bits of the answers. During the ADCC
polling other bits are not needed. Thus the ADCC answer can be truncated everywhere after the 3rd
received bit. In case of ADCR command a full 16-bit answer must be received as it includes an 11bit result of conversion.
The ADCC command in the Stage 2 of the full flow sets the active mode of the ADC. The next
ADCC command (Stage 4) starts a conversion to measure a signal on the channel specified by the
bit CHAN (Stage 3). The polling is used here to ensure the previous ADC-cycle is finished. The
polling procedure with ADCR command (Stage 5) provides a valid data output after the end of
conversion. Eventually the ADC can be turned off (Stages 9, 10 and 11) without the polling, as by
this time the conversion is already finished.
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Digital output of the MLX90609
Polling procedure with ADCC command
Chart flow of the full polling procedure
Input bits:
ADEN and CHAN
START
1. Set SS=0
1. Is ADC in
sleep mode?
2. Send 8-bit instruction ADCC (MOSI)
Ignore MISO
“No"
“Yes"
2. In order to activate the ADC
implement the polling procedure
with ADCC command:
bit ADEN = 1, bit CHAN = any
Ignore the answer
3. Send 8-bit zero data (MOSI)
Note: any 3 bits can be enough
In parallel accept 3 first bits
of the answer: 15th, 14th and 13th (MISO)
“Error”
4. Truncate the answer by setting SS=1
3. Define CHAN bit:
“0” - to measure OUTAR; “1” - to measure OUTTEMP
5. Check 15th bit
of the answer
4. Polling procedure
with ADCC command (ADEN=1)
Ignore the answer
“Error”
5. Polling procedure
with ADCR command
“Error”
“1”
“0”
“0”
6. Check 13th bit
of the answer
“1”
Output:
Hardware ERROR!
Output:
ADCC has been
successfully sent
6. Store 11-bit digital output
“No”
7. Was it the last
measurement
Polling procedure with ADCR command
Input: void
Output:
Hardware ERROR!
“Yes”
1. Set SS=0
8. Should ADC go
to sleep mode
2. Send 8-bit instruction ADCR=0x80 (MOSI)
Ignore MISO
“No”
9. Set SS=0
10. Send 8-bit instruction ADCC
with ADEN = 0 (MOSI)
Ignore MISO
11. Set SS=1
3. Send 16-bit zero data (MOSI)
In parallel accept 16-bit answer (MISO)
4. Set SS=1
“1”
5. Check 15th bit
of the answer
“Yes”
END
“0”
“0”
6. Check 13th bit
of the answer
“1”
7. Extract 11-bit digital output
AD[10:0] from the answer
Output:
Hardware ERROR!
Output:
11-bit digital output
Figure 2: Digital data acquisition based on polling
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Digital output of the MLX90609
Below you can find examples of the two polling procedures written in “C”: ADCC_polling and
ADCR_polling. The function ADCC_polling returns “0” if the ADCC command is accepted by the
MLX90609. Otherwise it returns an error code “1”. The function ADCC_polling returns 11-bit result
of the last digital conversion. Otherwise it returns an error code “0xFFFF”.
Both functions use a function SPI_EXCH, which is a simplest 8-bit SPI exchange procedure:
unsigned char SPI_EXCH(unsigned char out);
The input parameter out is a byte transmitted by the master to the MLX90609. The function returns
a byte received bit by bit from the MISO-line in parallel with the transmission. Before return the
function recovers the default MOSI-stale (zero level).
Depending on the structure of the used master device the SPI_EXCH function can be implemented
in different ways. Use of an embedded hardware SPI can save handling time of the master. If the
master does not have a hardware SPI, a software implementation can be used instead.
The code below gives an example of the SPI software implementation written for the 8051-core
microcontrollers:
/* The example code assumes that the part specific header file is included */
sbit
sbit
sbit
sbit
SCLK
MISO
MOSI
NSS
=
=
=
=
P1^0;
P1^1;
P1^2;
P1^3;
/*
/*
/*
/*
Any available 8051-ports */
can be used to emulate */
SPI signals: */
SCLK, MISO, MOSI and NSS */
/* Macros NSS_Low and NSS_High are needed for ADCC_polling and ADCC_polling */
#define NSS_Low
NSS = 0
#define NSS_High NSS = 1
unsigned char SPI_EXCH(unsigned char out)
{
unsigned char support, inp;
for (inp = 0, support = 0x80; support != 0; support >>= 1)
{
MOSI = out & support;
SCLK = 0;
SCLK = 1;
if(MISO) inp |= support;
}
MOSI = 0;
return inp;
}
The bit addressable input-output ports of the 8051 are assigned there to emulate SPI-signals. The
example includes also the definition of two macros (NSS_Low and NSS_High) used in the
functions ADCC_polling and ADCR_polling.
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/* The example code assumes that the part specific header file is included */
/* Function SPI_EXCH() and macros NSS_Low and NSS_High must be defined above */
#define EOC_COUNT 100
/* Polling procedure with ADCC command */
bit ADCC_polling(bit chan, bit aden)
{
unsigned char counter = 0;
unsigned char tmp, adcc;
/* counter to avoid endless polling */
adcc = (aden) ? 0x94:0x90;
/* NSS = 0; */
if(chan) adcc |= 0x08;
Start:
NSS_Low;
/* NSS = 0; */
SPI_EXCH(adcc);
/* Send ADCC-instruction */
tmp = SPI_EXCH(0x00);
/* Read the first byte of the answer */
NSS_High;
/* NSS = 1; */
if((tmp & 0x80) == 0) return 0;
/* ADCC has been successfully sent */
else if(tmp & 0x20) return 1;
/* HW Error! */
else if((++counter) < EOC_COUNT) goto Start; /* Continue polling */
else return 1;
/* HW Error: long polling */
}
/* Polling procedure with ADCR command */
unsigned int ADCR_polling(void)
{
union intData
{unsigned int dd;
unsigned char d[2];
}inp;
#define Dat_H inp.d[0]
#define Dat_L inp.d[1]
#define Dat_HL inp.dd
unsigned char counter = 0;
/* counter to avoid endless polling */
Start:
NSS_Low;
/* NSS = 0; */
SPI_EXCH(0x80);
/* Send ADCR-instruction */
Dat_H = SPI_EXCH(0);
/* Read the first byte of the answer */
Dat_L = SPI_EXCH(0);
/* Read the last byte of the answer */
NSS_High;
/* NSS = 1; */
if(Dat_H & 0x80) return 0xFFFF;
/* HW Error! */
else if(Dat_H & 0x20) return (Dat_HL & 0xFFF)>>1; /* Result is valid */
else if((++counter) < EOC_COUNT) goto Start;
/* Continue polling */
else return 0xFFFF;
/* HW Error: too long polling */
}
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•
Digital data acquisition based on delays
According to the MLX90609 Data Sheet the conversion time of the internal ADC is always less than
115 µs. Thus after 115 µs the conversion will always be finished. The result of the conversion will
be valid and the next ADCC command can be sent to start a new conversion even without
checking the EOC bit.
The Figure 3 shows a time diagram of the ADC-cycle using a delay instead of poling. We assume
that before the first rising SCLK edge of the ADCC command the EOC bit was already set (the
ADC was not in progress). This condition can be ensured by respecting a delay of more then 115
µs before the sending ADCC command (it’s not shown on the Figure 3). In this case, the
MLX90609 AD-conversion will start at the 8th rising SCLK edge of the ADCC command. The ADCC
answer is predefined and can be skipped. After the next delay of more then 115 µs the started
conversion is finished and the ADCR command can be used to read the 11-bit conversion result
AD10…AD0. The EOC bit will always be set in the ADCR answer.
Figure 3: Time diagram of the ADC handling based on delay
Observation : there is no SPI activity while an AD-conversion is in progress. This approach based
on the delays minimizes SPI activity and hence the additional output noise. It usually requires using
a timer of the external microcontroller.
The acquisition procedure can be built on the timer interruptions with a period bigger then 115 µs.
In this case a service routine can start from forming a positive SS pulse. After that the ADCR
command can read result of the previous AD-conversion. And at the end of the routine 8 bits of the
ADCC instruction should be sent to start a new conversion.
NOTE:
The positive SS pulse truncates SPI commands, but it affects the ADC in no way. Thus
the rising edge of the signal SS can be generated exactly after sending of the ADCC
instruction when AD-conversion is in progress. It can be suitable for instance in case of
the multi-slave SPI.
Figure 4 shows a generic data acquisition algorithm free of polling.
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START
1. Delay > 115 us to ensure the ADC is stopped
and the next ADCC instruction will be accepted
“No"
“Yes"
2. Is ADC in
the sleep mode?
3. Set SS=0
4. In order to activate the ADC
send 8-bit ADCC instruction (MOSI):
bit ADEN = 1, bit CHAN = 0/1
Ignore MISO
5. Set SS=1
6. Delay > 115 us
7. Define CHAN bit:
“0” - to measure OUTAR; “1” - to measure OUTTEMP
8. Set SS=0
9. Send 8-bit instruction ADCC with ADEN = 1 (MOSI)
Ignore MISO
10. Delay > 115 us
11. Set SS=1
12. Delay > 50 ns
13. Set SS=0
14. Send 8-bit instruction ADCR (MOSI)
Ignore MISO
15. Send 16-bit zero data (MOSI)
Accept 16-bit answer in parallel (MISO)
Extract and store 11-bit digital output AD[10:0] from the answer
16. Set SS=1
“No”
17. Was it the last
measurement
“No”
“Yes”
18. Should ADC go
to sleep mode
“Yes”
19. Set SS=0
20. Send 8-bit instruction ADCC with ADEN = 0 (MOSI)
Ignore MISO
21. Set SS=1
END
Figure 4: Digital data acquisition based on delays
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5. Disclaimer
Devices sold by Melexis are covered by the warranty and patent indemnification provisions
appearing in the Terms of Sale. Melexis makes no warranty, express, statutory, implied, or by
description regarding the information set forth herein or regarding the freedom of the described
devices from patent infringement. Melexis reserves the right to change specifications and pricing at
any time and without notice. Therefore, prior to designing this product into a system, it is necessary
to check with Melexis for current information. This product is intended for use in normal commercial
applications.
Applications requiring extended temperature range, unusual environmental
requirements, or high reliability applications, such as military, medical life-support or life-sustaining
equipment are specifically not recommended without additional processing by Melexis for each
application.
The information furnished by Melexis is believed to be correct and accurate. However, Melexis
shall not be liable to recipient or any third party for any damages, including but not limited to
personal injury, property damage, loss of profits, loss of use, interruption of business or indirect,
incidental or consequential damages, of any kind, in connection with or arising out of the furnishing,
performance or use of the technical data herein. No obligation or liability to recipient or any third
party shall arise or flow out of Melexis’ rendering of technical or other services.
Copyright© 2008 Melexis Microelectronic Systems. All Rights Reserved
Certified ISO/ TS 16949, ISO 14001
For the latest version of this document, visit our website at:
www.melexis.com
For additional information contact Melexis Direct:
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