MP44010HS

MP44010
Boundary Mode PFC Controller
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP44010 is a boundary conduction mode
PFC controller which can provide simple and
high performance active power factor correction
using minimum external components.
•
The output voltage is accurately regulated by a
high performance voltage mode amplifier with
an accurate internal voltage reference.
•
Boundary Conduction Mode PFC Controller
for Pre-regulator
Zero-crossing Compensation to Minimum
THD of AC Input Current
Precise Adjustable Output Over-voltage
Protection
Ultra-low (15μA) Start-up Current.
Low (0.46mA) Quiescent Current
On-chip Filter on Current Sense Pin
Disable Function
-800/+1150mA Peak Gate Drive Current
Available in SOIC-8 Package
•
•
•
•
•
•
•
The precise adjustable output over-voltage
protection greatly enhances the system
reliability.
The on-chip R/C filter on the current sense pin
can eliminate the external R/C filter.
APPLICATIONS
The extremely low start-up current, quiescent
current and the disable function can reduce the
power consumption and result in excellent
efficiency performance.
•
•
•
•
The MP44010 is available in SOIC-8 package.
Offline Adaptor
Electronic Ballast
LLC Front End
Other PFC Pre-regulators
All MPS parts are lead-free, halogen free, and adhere to the RoHS directive. For
MPS green status, please visit MPS website under Quality Assurance. “MPS”
and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
Other Patents Pending.
TYPICAL APPLICATION
D4
L1
R3
D2
D3
D1
Vo
R9
C2 R4
R5
C4 R6
R1
C5
Vac
C1
U1
ZCS
VIN
MULT
R2
COMP
MP44010
GND
FB
+
R7
C6
Q1
GATE
CS
R10
C3
R8
MP44010 Rev. 1.2
3/18/2015
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1
MP44010 – BOUNDARY MODE PFC CONTROLLER
ORDERING INFORMATION
Part Number
Package
SOIC-8
MP44010HS*
Top Marking
MP44010
* For Tape & Reel, add suffix –Z (e.g. MP44010HS–Z).
For RoHS compliant packaging, add suffix –LF (e.g. MP44010HS–LF–Z)
PACKAGE REFERENCE
TOP VIEW
FB
1
8
VIN
COMP
2
7
GATE
MULT
3
6
GND
CS
4
5
ZCS
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
Supply Voltage VIN ................. -0.5V to Self Limit
ZCS pin .................................. -0.3V to Self Limit
Other Analog Inputs and Outputs ..-0.3V to 6.5V
ZCS Max. current......................-2.5mA to 10mA
Continuous Power Dissipation (TA = +25°C) (2)
SOIC-8 ....................................................... 1.4W
Junction Temperature………………… …..150°C
Lead Temperature (Solder).......................260°C
Storage Temperature............... -55°C to +150°C
SOIC-8 ....................................90 ...... 45 ... °C/W
Recommended Operating Conditions
(3)
Supply Voltage VIN .........................13.4V to 22V
Analog inputs and outputs .............-0.3V to 6.5V
Operating Junction Temp. (TJ). -40°C to +125°C
MP44010 Rev. 1.2
3/18/2015
(4)
θJA
θJC
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any
ambient
temperature
is
calculated
by
D(MAX)=(TJ(MAX)-TA)/θJA.
Exceeding
the
maximum
allowable power dissipation will cause excessive die
temperature, and the regulator will go into thermal shutdown.
Internal thermal shutdown circuitry protects the device from
permanent damage.
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
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2
MP44010 – BOUNDARY MODE PFC CONTROLLER
ELECTRICAL CHARACTERISTICS
VIN = 15V, TA = TJ = -40°C to +125°C, unless otherwise noted
Parameter
Supply Voltage
Operating Range
Turn On Threshold
Turn Off Threshold
Hysteresis
Zener Voltage
Supply Current
Start-up Current
Quiescent Current
Symbol
Condition
Min
VIN
VIN_on
VIN_off
VIN_hys
Vz
After turn on
10.7
11
8.7
2.1
22
Istartup
Iq
VIN=11V
No switch
During OVP(either
static or dymanic) or
VIN≤150mV
Fs =70kHz, CLOAD=1nF
Quiescent Current
Iq
Operating Current
Multiplier
Input Bias Current
Linear Operation Range
Icc
IIN=20mA
IMULT
VMULT
Gain(5)
K
Max
Units
25
22
13.5
10.7
3
28
V
V
V
V
V
15
0.46
40
0.65
µA
mA
12.4
9.8
0.42
1.6
mA
2.5
mA
-1
µA
V
0 to 3
VMULT=0 to 1V ,
ΔVCS/ΔVMULT VCOMP=upper clamp,
TJ = 25°C
Output Max. Slope
Typ
1.5
1.73
V/V
VMULT=1V, VCOMP=4V
0.45
0.64
0.8
1/V
TJ = 25°C
2.465
2.5
2.535
V
VIN =10.7V to 22V
TJ = -40°C to +125°C
2.44
Error Amplifier
Feedback Voltage
Feedback
Regulation
Voltage
VFB
Line
VFB_LR
Feedback Bias Current
IFB
Open Loop Voltage Gain
GV
Gain-Bandwidth Product
GB
Source Current
VIN =10.7V to 22V
2.56
2
60
5
mV
0.2
µA
80
dB
1
MHz
ICOMP_source
-5.5
-3
Sink Current
ICOMP_sink
2.5
5.5
Upper Clamp Voltage
VCOMP_H
5.3
6
6.6
V
Lower Clamp Voltage
VCOMP_L
1.8
2.1
2.3
V
-1
450
1.83
µA
ns
V
mV
mV
Current Sense Comparator
Input Bias Current
Delay
Current Sense Clamp Voltage
VCS_Clamp
Current Sense Offset
VCS_Offset
MP44010 Rev. 1.2
3/18/2015
ICS
TDT
1.58
VMULT=0V
VMULT=2.5V
300
1.72
30
5
-1
mA
mA
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© 2015 MPS. All Rights Reserved.
3
MP44010 – BOUNDARY MODE PFC CONTROLLER
ELECTRICAL CHARACTERISTICS (continued)
VIN = 15V, TA = TJ =-40°C to +125°C, unless otherwise noted.
Parameter
Zero Current Sensor
Upper Clamp Voltage
Lower Clamp Voltage
Zero Current Sensing Threshold
ZCS_EN Threshold
ZCS_EN Hysteresis
Source Current Capability
Restart Current After Disable
Re-Starter
Re-Start Time
Over-Voltage
Dynamic OVP Current
Hysteresis
Static OVP Threshold
Gate Driver
Dropout Voltage
Symbol
Condition
Min
Typ
Max
Units
IZCS=2.5mA
IZCS=-1.8mA
VZCS rising
VZCS falling
VZCS rising
7.2
0.3
8.35
0.8
2.5
57
7.8
0.55
2.1
1.35
310
120
4
85
V
V
V
V
mV
mV
mA
µA
Tstart
80
175
280
µs
IOVP
29
49
IOVP_Hys
VOVP
1.85
39
30
2.15
µA
µA
V
VZCSclamp_H
VZCSclamp_L
VZCS_H
VZCS_L
VZCS_EN_R
VZCS_EN_hys
IZCS_source
IZCS_res
VOH
VOL
Tf
Tr
VD_max
Voltage Fall Time
Voltage Rise Time
Max Output Drive Voltage
Source Current Capability
Sink Current Capability
IGate_source
IGate_sink
UVLO Saturation Voltage
VSaturation
0.9
IGDsource=20mA
IGDsource=200mA
IGDsink=200mA
12
VIN=0 to VIN_ON,
IGate_sink=10mA
2.4
3.9
0.5
30
40
13.5
-800
1150
2.35
3.1
4.5
1.5
70
80
14
V
V
V
ns
ns
V
mA
mA
0.3
V
Note:
5) The multiplier Gain is calculated by: K=Vcs /(VMUTL·(VCOMP-2.5))
MP44010 Rev. 1.2
3/18/2015
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4
MP44010 – BOUNDARY MODE PFC CONTROLLER
TYPICAL PERFORMANCE CHARACTERISTICS
14
10
100
Operating Current
13
10
1
12
Quiescent Current
1
Rising
11
0.1
Falling
0.1
10
0.01
Start-up Current
0
5
10
15
20
25
30
28
0.01
-50
0
50
9
100
150
8
-50
2.6
500
2.55
400
2.5
300
2.45
200
0
50
100
150
26
24
20
-50
0
50
100
150
2.4
-50
1.8
50
1.6
1.4
45
1.2
1
40
0.8
0
50
100
150
0
50
100
150
0
50
100
150
0.8
0.6
0.4
0.6
35
100
-50
1
COMP=Upper clamp
22
0.4
0.2
0.2
30
-50
0
MP44010 Rev. 1.2
3/18/2015
50
100
150
0
0
1
2
3
4
0
-50
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5
MP44010 – BOUNDARY MODE PFC CONTROLLER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
ZCS Clamp Levels vs. TJ
Gate-Drive Output
High Saturation
UPPER CLAMP
6
4
2
0
-50
LOWER CLAMP
0
MP44010 Rev. 1.2
3/18/2015
50
100
150
10
2
8
1.5
VGD DROPOUT (V)
8
VGD DROPOUT (V)
MULTIPLIER GAIN
10
Gate-Drive Output
Low Saturation
6
4
2
0
100 200 300 400 500 600
IGD (mA)
1
0.5
0
0
100
200 300
IGD (mA)
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400
500
6
MP44010 – BOUNDARY MODE PFC CONTROLLER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Performance waveforms are generated using the evaluation board built with design example on
page 11. VAC=220V, VOUT=400V, POUT=100W, TA=25oC, unless otherwise noted.
MP44010
MP44010 Rev. 1.2
3/18/2015
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© 2015 MPS. All Rights Reserved.
7
MP44010 – BOUNDARY MODE PFC CONTROLLER
PIN FUNCTIONS
Pin #
1
Name
FB
2
COMP
3
MULT
4
CS
5
ZCS
6
GND
7
GATE
8
VIN
MP44010 Rev. 1.2
3/18/2015
Description
Feedback pin. The output voltage is fed into this pin through a resistor divider.
Output of the error amplifier. A compensation network is connected between this pin and FB
pin.
Input of the multiplier. Connect this pin to the rectified main voltage via a resistor divider to
provide the sinusoidal reference for the current control loop.
Current sense pin. The current through MOSFET is fed into this pin via a resistor. The
resulting voltage on this pin is compared with the output of internal multiplier to get an internal
sinusoidal-shaped reference, to determine MOSFET’s turn-off. On-chip R/C filter can reduce
high frequency noise on this pin.
Inductor’s zero-crossing current sensing input. A negative-transition edge triggers MOSFET’s
turn-on.
Ground.
Gate driver output. The high output current of the gate driver is able to drive low-cost power
MOSFET. The high-level voltage of this pin is clamped to 12V in case this pin is supplied with
a high VIN.
Supply voltage of both the signal path of the IC and the gate driver. A bypass capacitor from
this pin to ground is needed to reduce noise.
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8
MP44010 – BOUNDARY MODE PFC CONTROLLER
BLOCK DIAGRAM
ZCS
Disable
Voltage
regulator
-
2.1V
1.35V
+
+
Vref -
UVLO
VIN
Starter
Driver
GATE
S Q
R
Overvoltage
detection
GND
-
+
2pF
-
Multiplier
+
150k
CS
MULT
FB
2.5V
COMP
Figure 1—Functional Block Diagram
MP44010 Rev. 1.2
3/18/2015
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9
MP44010 – BOUNDARY MODE PFC CONTROLLER
OPERATION
The MP44010 is a boundary conduction mode
PFC controller which is optimized for the PFC
pre-regulator up to 300W and fully complies with
the IEC1000-3-2 specification.
Output Voltage Regulation
The output voltage is sensed at the FB pin
through a resistor divider from output voltage to
ground. The accurate on-chip reference voltage
and the high performance error amplifier regulate
the output voltage accurately.
Over-Voltage Protection (OVP)
The MP44010 offers two stages of over-voltage
protection: dynamic over-voltage protection and
static over-voltage protection. With two-stage
protection, the circuit can operate reliably.
The MP44010 achieves OVP by monitoring the
current flow through the COMP pin.
At steady-state operation, the current flow
through high-side feedback resistor R9 and lowside feedback resistor R10 is:
IR9 =
VO − VFB
V
= IR10 = FB
R9
R10
If there is an abrupt rise on the output (ΔVO), and
the compensation network connected between
FB pin and COMP pin takes time to achieve high
power factor (PF) due to the long RC time
constant. The voltage on FB pin will still be kept
at the reference value. The current through R10
remains equal to VFB/R10, but the current through
R9 will become:
'
=
IR9
VO + ΔVO − VFB
R9
This current has to flow into the COMP pin. At
the same time, this current is monitored inside
the chip. If it rises to 35µA, the output voltage of
the multiplier will be forced to decrease and the
energy delivering to output will be reduced. If this
current continues to rise to about 40µA, the
dynamic OVP could be triggered. Consequently,
the gate driver is blocked to turn off the external
power MOSFET and the device enters an idle
state. This state is maintained until the current
falls below 10µA, the point at which, the internal
starter will be re-enabled and allows the
switching to restart.
MP44010 Rev. 1.2
3/18/2015
When the load is very light, the output voltage
tends to stay steadily above the nominal value. In
this condition, the error amplifier output will
saturate low. When the error amplifier output is
lower than 2.2V, static OVP will be triggered.
Consequently, the gate driver will be blocked to
turn off the external power MOSFET and the
device enters an idle state. Normal operation is
resumed once the error amplifier output goes
back into the regulated region.
UVLO
Driver
GATE
Vo
IR9
Overvoltage
detection
R9
FB
-
Multiplier
+
MULT
2.5V
IR10
R10
COMP
Figure 2—OVP Detector Block
Disable Function
The MP44010 can be disabled by pulling the
zero current sensing (ZCS) pin lower than
190mV. This can help to further reduce quiescent
current when the PFC pre-regulator needs to be
shutdown. After releasing the ZCS pin, it will stay
at lower clamp voltage when there is no external
voltage from auxiliary winding.
Boundary Conduction Mode
V aux
ZCS
Disable
2.1V
1.35V
starter
+
Driver
GATE
S Q
R
Figure 3—ZCS, Triggering and Disable Block
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10
MP44010 – BOUNDARY MODE PFC CONTROLLER
When the current of the Boost inductor reaches
zero, the voltage on the inductor will be reversed.
Then ZCS generates the turn-on signal of the
MOSFET by sensing the falling edge of the
voltage on the auxiliary winding coupled with the
inductor. If the voltage of the ZCS pin rises above
2.1V, the comparator waits until the voltage falls
below 1.35V. Once the voltage falls below 1.35V,
the MP44010 turns on the MOSFET. The 7.8V
high clamp and 0.55V low clamp protect the ZCS
pin. The internal 175µs timer generates a signal
to turn on the MOSFET if the driver signal has
been low for more than 175µs. This also allows
the MOSFET to turn on during start-up period
since no signal is generated from ZCD then.
Zero-crossing Compensation
The MP44010 offers 30mV voltage offset for
multiplier output near the zero-crossing of the line
voltage which can force the circuit to process
more energy at the bottom of the line voltage.
With this function, the THD of the current could
be evidently reduced.
from the output of the multiplier. When the
external power MOSFET turns on, the inductor
current rises linearly. When the peak current hits
the sinusoidal-shaped signal, the external power
MOSFET begins to turn off and the diode turns
on. The inductor current also begins to fall. When
the inductor current reaches zero, the power
MOSFET begins to turn on again, which causes
the inductor current to start rising again. The
power circuit works in boundary conduction mode,
and the envelope of the inductor current is
sinusoidal-shaped. The average input current is
half of the peak current, so the average input
current is also sinusoidal-shaped. A high power
factor can be achieved through this control
method.
Multiplier output
Inductor current
Input average current
To prevent redundant energy, this offset is
reduced as the instantaneous line voltage
increases. Therefore the offset will be negligible
near the top of the line voltage.
Power Factor Correction
The MP44010 senses the inductor current
through the current sense pin and compares to
the sinusoidal-shaped signal which is generated
Figure 4—Inductor Current Waveform
The control flow chart of the MP44010 is shown
in Figure 5.
Turn On
COMP Clamp to
2.2V
N
VZCD <190mV?
Y
Y
VIN > 12.4V
Latch off IC
Very low
consumption
N
Monitor VIN
Y
VIN< 9.5 V
V COMP<2.2V
N
2.5V< VCOMP<5.7V
Burst operation
Y
EA output
goes back
to linear
region?
IC is disabled.
Very low
consumption
Monitor ? ICOMP
Monitor VCOMP
? ICOMP <37uA
Continuous operation
? ICOMP >40uA
37uA< ? ICOMP<40uA
OVP step 1:
the Mult output is
forced to decrease
OVP step 2:
Gate driver is
off
N
N
Y
? ICOMP <10uA
Figure 5—Control Flow Chart
MP44010 Rev. 1.2
3/18/2015
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11
MP44010 – BOUNDARY MODE PFC CONTROLLER
Layout Guide
For boundary mode PFC operation, the output is
fed back to FB pin and is compared with the
reference voltage. So a constant reference
voltage is very important for output voltage
accuracy. Therefore, the wire from FB pin to the
feedback resistors should be as short as possible.
achieve using short wire, an external filter from
sensing resistor to CS pin is recommended.
To keep the chip operating with a stable VIN
voltage, a big E-cap and a small ceramic cap are
good combination as VIN caps. In addition, the
VIN caps should be close to VIN pin to prevent
VIN voltage fluctuation.
The envelope of the inductor current is from the
multiplier output which is generated by rectified
AC voltage. Therefore a good layout should keep
MULT pin immune to noise. It is recommended
that placing a small ceramic cap from MULT pin
to GND.
Please see the MP44010 demo board for
recommended layout.
Design Example
Case 1:
Below is a design example following the
application guideline for the specifications:
For zero current sensing, R5 should be placed
close to ZCS and a long connection wire should
be avoided. If the long wire is necessary, a small
bypass cap is needed to avoid noise.
85~265V
400V
100W
VAC
VOUT
POUT
The detailed application schematic is shown in
Figure 6. The typical performance and circuit
waveforms have been shown in the Typical
Performance Characteristics section. For more
possible applications of this device, please refer
to related Evaluation Board Datasheets.
For inductor current sensing, although there is
on-chip filter on CS pin, it is still recommended
that the wire from current sensing resistor to CS
pin should be as short as possible to prevent
falsely turning off MOSFET. If it is difficult to
D5
RS1J
D4
MURS160
L1
EI30-550
D1
GBU406
Vac
D2
1N4148
C2
3.3nF
C4
3.3
R5
68k
D3
BZT52C20
Lcm
Ldm
40mH 350 H
C1
1
400V
CX1
0.1 F
275 V
R9
1M
R6
6.04k
C5
0.47
U1
ZCS
VIN
CX2
0.47 F
275 V
COMP
+
R7
10
FB
Q1
IPP50R350CP
MP44010 GATE
MULT
CS
GND
R2
10k
C3
22 F
50V
C7
Vo=400V
Po=100W
Turn ratio
51:8
R4
R3
499k
RT1
2
C8
10nF
50V
C9
NS
C6
100
450V
R10
R8
0.3
Figure 6—100W MP44010 Design Example
MP44010 Rev. 1.2
3/18/2015
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12
MP44010 – BOUNDARY MODE PFC CONTROLLER
Case 2:
At light load, the power loss can be saved by
inserting LN60A01 to disconnect the resistor of
voltage divider. The implement circuit is shown in
the Figure 7.
At light load, the pin 9 of HR1000 is asserted low
when it operates at burst mode, and the signal
generated from pin 9 is applied to synchronize
the ON/OFF of MP44010; it also can drive
LN60A1 to connect or disconnect resistor of
voltage divider at the same time. And the control
signal of LN60A01 also can be external signal
from MCU system. For more details, please refer
to AN of MP44010.
Vbus
8
7
6
5
LN60A01
1
AC
input
2
3
4
Control Signal
3
7
MP44010
5
1
1
9
HR1000
7
VIN
GND
Figure 7—Power Consumption Reduction with LN60A01
MP44010 Rev. 1.2
3/18/2015
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13
MP44010 – BOUNDARY MODE PFC CONTROLLER
PACKAGE INFORMATION
SOIC-8
0.189(4.80)
0.197(5.00)
8
0.050(1.27)
0.024(0.61)
5
0.063(1.60)
0.150(3.80)
0.157(4.00)
PIN 1 ID
1
0.228(5.80)
0.244(6.20)
0.213(5.40)
4
TOP VIEW
RECOMMENDED LAND PATTERN
0.053(1.35)
0.069(1.75)
SEATING PLANE
0.004(0.10)
0.010(0.25)
0.013(0.33)
0.020(0.51)
0.0075(0.19)
0.0098(0.25)
SEE DETAIL "A"
0.050(1.27)
BSC
SIDE VIEW
FRONT VIEW
0.010(0.25)
x 45o
0.020(0.50)
GAUGE PLANE
0.010(0.25) BSC
0o-8o
0.016(0.41)
0.050(1.27)
DETAIL "A"
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AA.
6) DRAWING IS NOT TO SCALE.
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP44010MP44010 Rev. 1.2
www.MonolithicPower.com
3/18/2015
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
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